Cangyuan Li - RankMe

14 papers A* 2A 1Journal 10Unranked 1

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	TriMoE: Augmenting GPU with AMX-Enabled CPU and DIMM-NDP for High-Throughput MoE Inference via Offloading. CoRR Yudong Pan, Yintao He, Tianhua Han, Lian Liu, Shixin Zhao, Zhirong Chen, Mengdi Wang, Cangyuan Li, Yinhe Han, Ying Wang
2026	J	`jnl`	Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL. CoRR Siyang Cai, Cangyuan Li, Yinhe Han, Ying Wang
2025	J	`jnl`	A data-centric chip design agent framework for Verilog code generation. ACM Trans. Design Autom. Electr. Syst. Kaiyan Chang, Wenlong Zhu, Kun Wang, Xinyang He, Nan Yang, Zhirong Chen, Dantong Jin, Cangyuan Li, Yunhao Zhou, Hao Yan, Zhuoliang Zhao, Yuan Cheng, Mengdi Wang, Shengwen Liang, Yinhe Han, Xiaowei Li, Huawei Li, Ying Wang
2025	J	`jnl`	AutoSilicon: Scaling Up RTL Design Generation Capability of Large Language Models. ACM Trans. Design Autom. Electr. Syst. Cangyuan Li, Chujie Chen, Yudong Pan, Wenjun Xu, Yiqi Liu, Kaiyan Chang, Yujie Wang, Mengdi Wang, Huawei Li, Yinhe Han, Ying Wang
2025	J	`jnl`	ChipSeek-R1: Generating Human-Surpassing RTL with LLM via Hierarchical Reward-Driven Reinforcement Learning. CoRR Zhirong Chen, Kaiyan Chang, Zhuolin Li, Xinyang He, Chujie Chen, Cangyuan Li, Mengdi Wang, Haobo Xu, Yinhe Han, Ying Wang
2025	J	`jnl`	Large Processor Chip Model. CoRR Kaiyan Chang, Mingzhi Chen, Yunji Chen, Zhirong Chen, Dongrui Fan, Junfeng Gong, Nan Guo, Yinhe Han, Qinfen Hao, Shuo Hou, Xuanjing Huang, Pengwei Jin, Changxin Ke, Cangyuan Li, Guangli Li, Huawei Li, Kuan Li, Naipeng Li, Shengwen Liang, Cheng Liu, Hongwei Liu, Jiahua Liu, Junliang Lv, Jianan Mu, Jin Qin, Bin Sun, Chenxi Wang, Duo Wang, Mingjun Wang, Ying Wang, Chenggang Wu, Peiyang Wu, Teng Wu, Xiao Xiao, Mengyao Xie, Chenwei Xiong, Ruiyuan Xu, Mingyu Yan, Xiaochun Ye, Kuai Yu, Rui Zhang, Shuoming Zhang, Jiacheng Zhao
2024	A*	`conf`	Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework. DAC Kaiyan Chang, Kun Wang, Nan Yang, Ying Wang, Dantong Jin, Wenlong Zhu, Zhirong Chen, Cangyuan Li, Hao Yan, Yunhao Zhou, Zhuoliang Zhao, Yuan Cheng, Yudong Pan, Yiqi Liu, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li
2024	J	`jnl`	Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework. CoRR Kaiyan Chang, Kun Wang, Nan Yang, Ying Wang, Dantong Jin, Wenlong Zhu, Zhirong Chen, Cangyuan Li, Hao Yan, Yunhao Zhou, Zhuoliang Zhao, Yuan Cheng, Yudong Pan, Yiqi Liu, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li
2024	J	`jnl`	GTA: a new General Tensor Accelerator with Better Area Efficiency and Data Reuse. CoRR Chenyang Ai, Lechuan Zhao, Zhijie Huang, Cangyuan Li, Xinan Wang, Ying Wang
2024	A	`conf`	Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation. ICCAD Kaiyan Chang, Zhirong Chen, Yunhao Zhou, Wenlong Zhu, Kun Wang, Haobo Xu, Cangyuan Li, Mengdi Wang, Shengwen Liang, Huawei Li, Yinhe Han, Ying Wang
2024	J	`jnl`	Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation. CoRR Kaiyan Chang, Zhirong Chen, Yunhao Zhou, Wenlong Zhu, Kun Wang, Haobo Xu, Cangyuan Li, Mengdi Wang, Shengwen Liang, Huawei Li, Yinhe Han, Ying Wang
2023	A*	`conf`	APPEND: Rethinking ASIP Synthesis in the Era of AI. DAC Cangyuan Li, Ying Wang, Huawei Li, Yinhe Han
2023	J	`jnl`	Can We Trust Race Prediction? CoRR Cangyuan Li
2021	—	`conf`	GLIST: Towards In-Storage Graph Learning. USENIX ATC Cangyuan Li, Ying Wang, Cheng Liu, Shengwen Liang, Huawei Li, Xiaowei Li