Cameron D. Patterson

36 papers A 3B 9C 1Journal 9Unranked 14
YearRankTypeTitle / Venue / Authors
2019 J jnl
Semidefinite Relaxation-Based PAPR-Aware Precoding for Massive MIMO-OFDM Systems.
IEEE Trans. Veh. Technol.
Miao Yao, Matt Carrick, Munawwar M. Sohul, Vuk Marojevic, Cameron D. Patterson, Jeffrey H. Reed
2018 J jnl
Surveying the Hardware Trojan Threat Landscape for the Internet-of-Things.
J. Hardw. Syst. Secur.
Vivek Venugopalan, Cameron D. Patterson
2017 — conf
Architectural refinements for enhancing trust and securing cyber-physical systems.
SmartWorld/SCALCOM/UIC/ATC/CBDCom/IOP/SCI
Vivek Venugopalan, Cameron D. Patterson
2016 C conf
A hands-on modular laboratory environment to foster learning in control system security.
FIE
Pallavi P. Deshmukh, Cameron D. Patterson, William T. Baumann
2016 — conf
Detecting and thwarting hardware trojan attacks in cyber-physical systems.
CNS
Vivek Venugopalan, Cameron D. Patterson, Devu Manikantan Shila
2015 J jnl
Enhancing Trust in Reconfigurable Based Hardware Systems with Tags and Monitors.
IACR Cryptol. ePrint Arch.
Devu Manikantan Shila, Vivek Venugopalan, Cameron D. Patterson
2015 — conf
FIDES: Enhancing trust in reconfigurable based hardware systems.
HPEC
Devu Manikantan Shila, Vivek Venugopalan, Cameron D. Patterson
2015 — conf
The Trustworthy Autonomic Interface Guardian Architecture for Cyber-Physical Systems.
CIT/IUCC/DASC/PICom
Kevin G. Lyn, Lee W. Lerner, Christopher J. McCarty, Cameron D. Patterson
2015 B conf
Unraveling the Security Puzzle: A Distributed Framework to Build Trust in FPGAs.
NSS
Devu Manikantan Shila, Vivek Venugopalan, Cameron D. Patterson
2015 — conf
Using Heterogeneous Computing to Implement a Trust Isolated Architecture for Cyber-Physical Control Systems.
CPSS@ASIACSS
N. Teja Chiluvuri, Omkar A. Harshe, Cameron D. Patterson, William T. Baumann
2014 A conf
Application-Level Autonomic Hardware to Predict and Preempt Software Attacks on Industrial Control Systems.
DSN
Lee W. Lerner, Zane R. Franklin, William T. Baumann, Cameron D. Patterson
2014 J jnl
High-Level Abstractions and Modular Debugging for FPGA Design Validation.
ACM Trans. Reconfigurable Technol. Syst.
Yousef Iskander, Cameron D. Patterson, Stephen D. Craven
2014 A conf
Using high-level synthesis and formal analysis to predict and preempt attacks on industrial control systems.
FPGA
Lee W. Lerner, Zane R. Franklin, William T. Baumann, Cameron D. Patterson
2012 — conf
Interacting with Hardware Trojans over a network.
HOST
Mohammed M. Farag, Lee W. Lerner, Cameron D. Patterson
2012 — conf
Run-time prediction and preemption of configuration attacks on embedded process controllers.
SECURIT
Lee W. Lerner, Mohammed M. Farag, Cameron D. Patterson
2011 B conf
Improved Abstractions and Turnaround Time for FPGA Design Validation and Debug.
FPL
Yousef Iskander, Cameron D. Patterson, Stephen D. Craven
2011 B conf
Thwarting Software Attacks on Data-Intensive Platforms with Configurable Hardware-Assisted Application Rule Enforcement.
FPL
Mohammed M. Farag, Lee W. Lerner, Cameron D. Patterson
2010 — conf
Accelerating FPGA development through the automatic parallel application of standard implementation tools.
FPT
Athira Chandrasekharan, Sureshwar Rajagopalan, Guruprasad Subbarayan, Tony Frangieh, Yousef Iskander, Stephen D. Craven, Cameron D. Patterson
2010 J jnl
MetaWire: Using FPGA configuration circuitry to emulate a network-on-chip.
IET Comput. Digit. Tech.
Matthew Shelburne, Cameron D. Patterson, Peter Athanas, Mark Jones, Brian S. Martin, Ryan Fong
2010 — conf
PATIS: Using partial configuration to improve static FPGA design productivity.
IPDPS Workshops
Tannous Frangieh, Athira Chandrasekharan, Sureshwar Rajagopalan, Yousef Iskander, Stephen D. Craven, Cameron D. Patterson
2010 — conf
Using partial reconfiguration and high-level models to accelerate FPGA design validation.
FPT
Yousef Iskander, Stephen D. Craven, Athira Chandrasekharan, Sureshwar Rajagopalan, Guruprasad Subbarayan, Tannous Frangieh, Cameron D. Patterson
2009 J jnl
Cognitive Radio and Networking Research at Virginia Tech.
Proc. IEEE
Allen B. MacKenzie, Jeffrey H. Reed, Peter M. Athanas, Charles W. Bostian, R. Michael Buehrer, Luiz A. DaSilva, Steven W. Ellingson, Y. Thomas Hou, Michael S. Hsiao, Jung-Min Park, Cameron D. Patterson, Sanjay Raman, Claudio R. C. M. da Silva
2009 A conf
Data streaming and simd support for the microblaze architecture.
FPGA
Paul E. Marks, Cameron D. Patterson
2009 J jnl
Searching for Transient Pulses with the ETA Radio Telescope.
ACM Trans. Reconfigurable Technol. Syst.
Cameron D. Patterson, Steven W. Ellingson, Brian S. Martin, K. Deshpande, John H. Simonetti, Michael Kavic, Sean E. Cutchin
2009 J jnl
Slotless module-based reconfiguration of embedded FPGAs.
ACM Trans. Embed. Comput. Syst.
Cameron D. Patterson, Peter Athanas, Matthew Shelburne, John W. Bowen, Jorge Surís, T. Dunham, J. Rice
2008 B conf
An efficient run-time router for connecting modules in FPGAS.
FPL
Jorge Surís, Cameron D. Patterson, Peter Athanas
2008 J jnl
Exploiting Process Locality of Reference in RTL Simulation Acceleration.
EURASIP J. Embed. Syst.
Aric D. Blumer, Cameron D. Patterson
2008 B conf
Metawire: Using FPGA configuration circuitry to emulate a Network-on-Chip.
FPL
Matthew Shelburne, Cameron D. Patterson, Peter Athanas, Mark Jones, Brian S. Martin, Ryan Fong
2007 — conf
A Holistic Approach Towards a Unified CpE Laboratory Platform.
MSE
Peter M. Athanas, Cameron D. Patterson
2007 — conf
FPGA Cluster Computing in the ETA Radio Telescope.
FPT
Cameron D. Patterson, Brian S. Martin, Steven W. Ellingson, John H. Simonetti, Sean E. Cutchin
2007 B conf
Formal Modeling of Process Migration.
FPL
Aric D. Blumer, Henning S. Mortveit, Cameron D. Patterson
2007 B conf
Hardware/Software Process Migration and RTL Simulation.
FPL
Aric D. Blumer, Cameron D. Patterson
2007 B conf
Wires On Demand: Run-Time Communication Synthesis for Reconfigurable Computing.
FPL
Peter M. Athanas, John W. Bowen, T. Dunham, Cameron D. Patterson, J. Rice, Matthew Shelburne, Jorge Surís, Mark B. Bucciero, Jonathan Graf
2006 — conf
A Methodology for Generating Application-Specific Heterogeneous Processor Arrays.
HICSS
Stephen D. Craven, Cameron D. Patterson, Peter M. Athanas
2004 B conf
JHDLBits: The Merging of Two Worlds.
FPL
Alexandra Poetter, Jesse Hunter, Cameron D. Patterson, Peter M. Athanas, Brent E. Nelson, Neil Steiner
2004 — conf
VTSim: A Virtex-II Device Simulator.
ERSA
Jesse Hunter, Peter Athanas, Cameron D. Patterson