Cagla Cakir

11 papers A 1B 1C 1Unranked 8
YearRankTypeTitle / Venue / Authors
2019 — conf
A 4GHz 16nm SRAM Architecture with Low-Power Features for Heterogeneous Computing Platforms.
VLSI Circuits
Cagla Cakir, Andy W. Chen, Y. K. Chong, Sriram Thyagarajan, Mark P. McCartney, Peixuan Tan, Yulin Shi, Mudit Bhargava
2016 — conf
Scalable High-Radix Modular Crossbar Switches.
Hot Interconnects
Cagla Cakir, Ron Ho, Jon K. Lexau, Ken Mai
2015 — conf
A 32kB secure cache memory with dynamic replacement mapping in 65nm bulk CMOS.
A-SSCC
Burak Erbagci, Fangfei Liu, Cagla Cakir, Nail Etkin Can Akkaya, Ruby B. Lee, Ken Mai
2015 B conf
DELPHI: a framework for RTL-based architecture design evaluation using DSENT models.
ISPASS
Michael Papamichael, Cagla Cakir, Chen Sun, Chia-Hsin Owen Chen, James C. Hoe, Ken Mai, Li-Shiuan Peh, Vladimir Stojanovic
2015 A conf
High-efficiency crossbar switches using capacitively coupled signaling.
ISLPED
Cagla Cakir, Ron Ho, Jon K. Lexau, Ken Mai
2015 — conf
Modeling and Design of High-Radix On-Chip Crossbar Switches.
NOCS
Cagla Cakir, Ron Ho, Jon K. Lexau, Ken Mai
2012 — conf
6T SRAM and 3T DRAM data retention and remanence characterization in 65nm bulk CMOS.
CICC
Cagla Cakir, Mudit Bhargava, Ken Mai
2012 — conf
Comparison of bi-stable and delay-based Physical Unclonable Functions from measurements in 65nm bulk CMOS.
CICC
Mudit Bhargava, Cagla Cakir, Ken Mai
2012 — conf
Reliability enhancement of bi-stable PUFs in 65nm bulk CMOS.
HOST
Mudit Bhargava, Cagla Cakir, Ken Mai
2011 C conf
An Overlapped Block Motion Compensation Hardware for Frame Rate Conversion.
DSD
Tevfik Zafer Ozcan, Cagla Cakir, Mert Cetin, Ilker Hamzaoglu
2010 — conf
Attack Resistant Sense Amplifier based PUFs (SA-PUF) with Deterministic and Controllable Reliability of PUF Responses.
HOST
Mudit Bhargava, Cagla Cakir, Ken Mai