C. Patrick Yue

115 papers A* 2A 2C 4Journal 46Unranked 59

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A 48-Gb/s Inductorless PAM-4 Optical Receiver With 1.28-pJ/bit Efficiency in 28-nm CMOS. IEEE J. Solid State Circuits Chongyun Zhang, Li Wang, Fuzhan Chen, Quan Pan, Xianbo Li, C. Patrick Yue
2026	J	`jnl`	VIKIN: A Reconfigurable Accelerator for KANs and MLPs with Two-Stage Sparsity Support. CoRR Wenhui Ou, Zhuoyu Wu, Yipu Zhang, Zheng Wang, C. Patrick Yue
2025	J	`jnl`	A 0.32-pJ/b 100-Gb/s PAM-4 TIA in 28-nm CMOS. IEEE Solid State Circuits Lett. Chongyun Zhang, Li Wang, Fuzhan Chen, C. Patrick Yue
2025	—	`conf`	A 100Gbaud 4Vppd Distributed Linear Driver with Cross-Folded Transmission Lines and Cross-Coupled Gm Cells for Built-in 5-Tap FFE in 0.13µm SiGe BiCMOS. ISSCC Fuzhan Chen, C. Patrick Yue, Quan Pan
2025	J	`jnl`	A 25-GHz PLL Achieving 8-ns Phase-Shifting Time With Double-Path Modulation Scheme. IEEE Trans. Very Large Scale Integr. Syst. Weichen Zhao, Weichen Tao, Yongheng Liu, Jingyuan Zhang, Zhongjun Zhang, Xu Yan, C. Patrick Yue, Fujiang Lin
2025	J	`jnl`	A 5-10-GHz Quadrature Clock Generator With Open-Loop Quadrature Error Correction in 28-nm CMOS. IEEE Solid State Circuits Lett. Shaokang Zhao, Li Wang, C. Patrick Yue
2025	J	`jnl`	A 56-Gb/s PAM-4 VCSEL Transmitter With Piecewise Compensation Scheme in 40-nm CMOS. IEEE J. Solid State Circuits Fuzhan Chen, Chongyun Zhang, Li Wang, Quan Pan, C. Patrick Yue
2025	J	`jnl`	A Compact 20-24-GHz Sub-Sampling PLL With Charge-Domain Bandwidth Control Scheme. IEEE J. Solid State Circuits Li Wang, Zilu Liu, Ruitao Ma, C. Patrick Yue
2025	—	`conf`	Design of A 5-10 GHz Open-Loop Quadrature Clock Generator for High-Speed Wireline Systems. NewCAS Shaokang Zhao, Li Wang, C. Patrick Yue
2025	C	`conf`	PDR-KAN: Pipeline-Driven Reconfigurable Accelerator for Kolmogorov-Arnold Networks with Cross-Mode Sparsity Support. ISCAS Wenhui Ou, Zhuoyu Wu, Yike Li, Alexandra Geciova, Zheng Wang, C. Patrick Yue
2024	—	`conf`	A 20-24-GHz DPSSPLL with Charge-Domain Bandwidth Optimization Scheme Achieving 61.3-fs RMS Jitter and -253-dB FoMJitter. CICC Li Wang, Zilu Liu, Ruitao Ma, C. Patrick Yue
2024	C	`conf`	A 25Gbps Single-Ended to Differential Low-Noise Transimpedance Amplifier in 45nm SOI for High-Speed Optical Transceivers. TENCON Juncheng Deng, Luyao Yuan, Zeyu Zhou, JinFeng Xie, Ahmed Wahba, Ping Ma, Yizhe Hu, Fujiang Lin, C. Patrick Yue, Liheng Lou
2024	—	`conf`	A 48-Gb/s Half-Rate PAM4 Optical Receiver with 0.27-pJ/bit TIA Efficiency, 1.28-pJ/bit RX Efficiency, and 0.06-mm VLSI Technology and Circuits Chongyun Zhang, Li Wang, Zilu Liu, Fuzhan Chen, Quan Pan, Xianbo Li, C. Patrick Yue
2024	—	`conf`	A 56-Gbaud 7.3-Vppd Linear Modulator Transmitter with AMUX-Based Reconfigurable FFE and Dynamic Triple-Stacked Driver in 130-nm SiGe BiCMOS. CICC Fuzhan Chen, C. Patrick Yue, Quan Pan
2024	J	`jnl`	A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM-4 Receiver With a Jitter Compensation CDR. IEEE J. Solid State Circuits Li Wang, Zhao Zhang, Can Wang, Rehan Azmat, Weimin Shi, C. Patrick Yue
2024	J	`jnl`	Editor-in-Chief. IEEE Access Derek Abbott, Sonia Aissa, Anuradha Annaswamy, Nirwan Ansari, Jun Cai, Kun-Shan Chen, Yixin Chen, J.-C. Chiao, Ayman El-Baz, Shaikh Fattah, Hoay Gooi, Maya B. Gokhale, Chih-Lin I, Giuseppe Iannaccone, Yumi Iwashita, Bruce Jacob, Abbas Jamalipour, Bahram Javidi, Weihua Jiang, Okyay Kaynak, Hulya Kirkici, Germano Lambert-Torres, Shengtao Li, Michal Mrozowski, Michele Nappi, Dalma Novak, Hugo Proença, Yi Qian, Zhihua Qu, Susanto Rahardja, Mehrdad Saif, Ali Serpengüzel, Peter H. Siegel, Ashitey Trebi-Ollennu, Daniela Tuninetti, Ge Wang, Keith A. Wear, Andreas Weisshaar, C. Patrick Yue, Enrico Zio
2024	J	`jnl`	FPGA-based Acceleration of Neural Network for Image Classification using Vitis AI. CoRR Zhengdong Li, Frederick Ziyang Hong, C. Patrick Yue
2024	J	`jnl`	Real-Time 3D Visual Perception by Cross-Dimensional Refined Learning. IEEE Trans. Circuits Syst. Video Technol. Ziyang Hong, C. Patrick Yue
2023	—	`conf`	A 2.05-pJ/b 56-Gb/s PAM-4 VCSEL Transmitter with Piecewise Nonlinearity Compensation and Asymmetric Equalization in 40-nm CMOS. ESSCIRC Fuzhan Chen, Chongyun Zhang, Li Wang, Quan Pan, C. Patrick Yue
2023	—	`conf`	A 24-30 GHz Cascaded QPLL Achieving 56.8-fs RMS Jitter and -248.6-dB FoMjitter. VLSI Technology and Circuits Li Wang, Zilu Liu, C. Patrick Yue
2023	J	`jnl`	A Fully-Integrated Micro-Display System With Hybrid Voltage Regulator. IEEE J. Emerg. Sel. Topics Circuits Syst. Junmin Jiang, Xu Zhang, Xun Liu, Zhaojun Liu, Liusheng Sun, Shing Hin Yuen, Wing Cheung Chong, Wing-Hung Ki, C. Patrick Yue, Kei May Lau
2023	J	`jnl`	Adaptive Hybrid Optimization Learning-Based Accurate Motion Planning of Multi-Joint Arm. IEEE Trans. Neural Networks Learn. Syst. Chengchao Bai, Jiawei Zhang, Jifeng Guo, C. Patrick Yue
2023	—	`conf`	Cross-Dimensional Refined Learning for Real-Time 3D Visual Perception from Monocular Video. ICCV (Workshops) Ziyang Hong, C. Patrick Yue
2023	J	`jnl`	Cross-Dimensional Refined Learning for Real-Time 3D Visual Perception from Monocular Video. CoRR Ziyang Hong, C. Patrick Yue
2023	—	`conf`	Design of Chip-to-PCB Matching Network for Millimeter-Wave On-Chip Transmitter and On-PCB Antenna. ASICON Zilu Liu, Li Wang, Hamed Fallah, C. Patrick Yue
2023	J	`jnl`	Dual-Photodiode Differential Receivers Achieving Double Photodetection Area for Gigabit-Per-Second Optical Wireless Communication. IEEE J. Solid State Circuits Xianbo Li, Hengbo Wang, Jianping Zhu, C. Patrick Yue
2023	—	`conf`	Optimizing Field-of-View for Multi-Agent Path Finding via Reinforcement Learning: A Performance and Communication Overhead Study. CDC Hoi Chuen Cheng, Ling Shi, C. Patrick Yue
2022	—	`conf`	A 56-Gb/s PAM-4 Transmitter Using Silicon Photonic Microring Modulator in 40nm CMOS. MWSCAS Chongyun Zhang, Fuzhan Chen, C. Patrick Yue
2022	J	`jnl`	Camera Pose Estimation Using a VLC-Modulated Single Rectangular LED for Indoor Positioning. IEEE Trans. Instrum. Meas. Babar Hussain, Yiru Wang, Runzhou Chen, C. Patrick Yue
2022	J	`jnl`	Efficient-Grad: Efficient Training Deep Convolutional Neural Networks on Edge Devices with Gradient Optimizations. ACM Trans. Embed. Comput. Syst. Ziyang Hong, C. Patrick Yue
2022	J	`jnl`	LiDR: Visible-Light-Communication-Assisted Dead Reckoning for Accurate Indoor Localization. IEEE Internet Things J. Babar Hussain, Yiru Wang, Runzhou Chen, Hoi Chuen Cheng, C. Patrick Yue
2022	J	`jnl`	VLP Landmark and SLAM-Assisted Automatic Map Calibration for Robot Navigation with Semantic Information. Robotics Yiru Wang, Babar Hussain, C. Patrick Yue
2021	J	`jnl`	A 0.25-0.4-V, Sub-0.11-mW/GHz, 0.15-1.6-GHz PLL Using an Offset Dual-Path Architecture With Dynamic Charge Pumps. IEEE J. Solid State Circuits Zhao Zhang, Guang Zhu, C. Patrick Yue
2021	J	`jnl`	A 52-Gb/s Sub-1-pJ/bit PAM4 Receiver in 40-nm CMOS for Low-Power Interconnects. IEEE Open J. Circuits Syst. Can Wang, Li Wang, Zhao Zhang, Milad Kalantari Mahmoudabadi, Weimin Shi, C. Patrick Yue
2021	—	`conf`	A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM4 Receiver with a -8-dB JTRAN 40-MHz 0.2-UIPP JTOL Clock and Data Recovery. VLSI Circuits Li Wang, Zhao Zhang, C. Patrick Yue
2021	J	`jnl`	A W-Band Single-Antenna FMCW Radar Transceiver With Adaptive Leakage Cancellation. IEEE J. Solid State Circuits Milad Kalantari, Li Wang, Hossein Shirinabadi, Ali Fotowat-Ahmady, C. Patrick Yue
2021	—	`conf`	An Integrated System Evaluation Engine for Cross-Domain Simulation and Design Optimization of High-Speed 5G Millimeter-Wave Wireless SoCs. ASICON Weimin Shi, Fuzhan Chen, Xinyi Liu, Chongyun Zhang, Zilu Liu, Tianxin Min, Bo Xu, Li Wang, Jian Kang, C. Patrick Yue
2021	J	`jnl`	Design and Analysis of Continuous-Mode Doherty Power Amplifier With Second Harmonic Control. IEEE Trans. Circuits Syst. II Express Briefs Weimin Shi, Wen Shi, Jun Peng, Linping Feng, Yong Gao, Songbai He, C. Patrick Yue
2021	—	`conf`	Design and Co-Simulation of QPSK and NRZ/PAM-4/PAM-8 VCSEL-Based Optical Links Utilizing an Integrated System Evaluation Engine. ASICON Fuzhan Chen, Chongyun Zhang, Tianxin Min, Bo Xu, Quan Pan, C. Patrick Yue
2021	—	`conf`	Design and Verification of a 334-Mb/s DCO-OFDM Li-Fi Transceiver Using Integrated System Evaluation Engine. ASICON Tianxin Min, Jian Kang, Bo Xu, Weimin Shi, C. Patrick Yue
2021	J	`jnl`	Efficient Training Convolutional Neural Networks on Edge Devices with Gradient-pruned Sign-symmetric Feedback Alignment. CoRR Ziyang Hong, C. Patrick Yue
2021	—	`conf`	High Precision Indoor Robot Localization Using VLC Enabled Smart Lighting. OFC Yiru Wang, Weipeng Guan, Babar Hussain, C. Patrick Yue
2021	—	`conf`	On-Chip Filter for Mitigating EMI-Related Common-Mode Noise in High-Speed PAM-4 Transmitter. ASICON Zilu Liu, Rehan Azmat, Xinyi Liu, Li Wang, C. Patrick Yue
2021	C	`conf`	Orthogonally Interweaved Data Encryption Method for Screen to Camera Communication. PCS Yiru Wang, C. Patrick Yue
2021	J	`jnl`	Sensing and Cancellation Circuits for Mitigating EMI-Related Common Mode Noise in High-Speed PAM-4 Transmitter. IEEE Trans. Circuits Syst. I Regul. Pap. Rehan Azmat, Li Wang, Khawaja Qasim Maqbool, Can Wang, C. Patrick Yue
2021	—	`conf`	Smart-Home Control System Using VLC-Enabled High-Power LED Lightbulb. GCCE Bo Xu, Babar Hussain, Xinyi Liu, Tianxin Min, Hoi Chuen Cheng, C. Patrick Yue
2021	J	`jnl`	Technology Report : Robotic Localization and Navigation System for Visible Light Positioning and SLAM. CoRR Weipeng Guan, Babar Hussain, C. Patrick Yue
2020	—	`conf`	4.7 A Single-Antenna W-Band FMCW Radar Front-End Utilizing Adaptive Leakage Cancellation. ISSCC Milad Kalantari, Hossein Shirinabadi, Ali Fotowat-Ahmadi, C. Patrick Yue
2020	J	`jnl`	A 0.65-V 12-16-GHz Sub-Sampling PLL With 56.4-fs IEEE J. Solid State Circuits Zhao Zhang, Guang Zhu, C. Patrick Yue
2020	J	`jnl`	A 28-GHz 16-Gb/s High Efficiency 16-QAM Transmitter in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Xiangyu Meng, Milad Kalantari, Baoyong Chi, Wenhua Chen, Zhijian Chen, Xiaoling Lin, C. Patrick Yue
2020	J	`jnl`	A 32-Gb/s 0.46-pJ/bit PAM4 CDR Using a Quarter-Rate Linear Phase Detector and a Self-Biased PLL-Based Multiphase Clock Generator. IEEE J. Solid State Circuits Zhao Zhang, Guang Zhu, Can Wang, Li Wang, C. Patrick Yue
2020	J	`jnl`	A 42-dB Ω 25-Gb/s CMOS Transimpedance Amplifier With Multiple-Peaking Scheme for Optical Communications. IEEE Trans. Circuits Syst. II Express Briefs Quan Pan, Yipeng Wang, C. Patrick Yue
2020	J	`jnl`	A Low-Power PAM4 Receiver With an Adaptive Variable-Gain Rectifier-Based Decoder. IEEE Trans. Very Large Scale Integr. Syst. Quan Pan, Li Wang, Xiongshi Luo, C. Patrick Yue
2020	—	`conf`	A Real-Time RGB PAM-4 Visible Light Communication System Based on a Transceiver Design with Pre- and Post-equalizations. MLICOM Jian Kang, Xuanzheng Wang, Li Wang, Can Wang, C. Patrick Yue
2020	—	`conf`	An RGB-LED Driver with Feed-Forward Equalization Used for PAM-4 Visible Light Communication. MLICOM Bo Xu, Li Wang, Jian Kang, Cong Qiu, C. Patrick Yue
2020	—	`conf`	Performance Analysis and Evaluation of Outdoor Visible Light Communication Reception. MLICOM Yiru Wang, Bo Xu, Jian Kang, Cong Qiu, C. Patrick Yue
2019	—	`conf`	A 0.25-0.4V, Sub-0.11mW/GHz, 0.15-1.6GHz PLL Using an Offset Dual-Path Loop Architecture with Dynamic Charge Pumps. VLSI Circuits Zhao Zhang, Guang Zhu, C. Patrick Yue
2019	—	`conf`	A 0.65V 12-to-16GHz Sub-Sampling PLL with 56.4fsrms Integrated Jitter and -256.4dB FoM. ISSCC Zhao Zhang, Guang Zhu, C. Patrick Yue
2019	—	`conf`	A 28-GHz Compact SPDT Switch Using LC-Based Spiral Transmission Lines in 65-nm CMOS. A-SSCC Xiangyu Meng, Zhenpeng Zheng, Jiaqi Zhang, C. Patrick Yue
2019	—	`conf`	A 32-Gb/s 0.46-pJ/bit PAM4 CDR Using a Quarter-Rate Linear Phase Detector and a Low-Power Multiphase Clock Generator. A-SSCC Zhao Zhang, Guang Zhu, Can Wang, Li Wang, C. Patrick Yue
2019	—	`conf`	A 52-Gb/s Sub-1pJ/bit PAM4 Receiver in 40-nm CMOS for Low-Power Interconnects. VLSI Circuits Can Wang, Guang Zhu, Zhao Zhang, C. Patrick Yue
2019	—	`conf`	A Universal VLC Modulator for Retrofitting LED Lighting and Signage. GCCE Babar Hussain, Cong Qiu, C. Patrick Yue
2019	—	`conf`	An AC-Powered Smart LED Bulb for 3D Indoor Localization Using VLC. GCCE Bo Xu, Zhaojun Liu, C. Patrick Yue
2019	—	`conf`	Bluetooth Based Wireless Control for iBeacon and VLC Enabled Lighting. GCCE Cong Qiu, Babar Hussain, C. Patrick Yue
2019	—	`conf`	Design of a Real-Time Visible Laser Light Communication System with Basedband in FPGA for High Definition video Transmission. GCCE Jian Kang, Li Wang, C. Patrick Yue
2019	—	`conf`	Smart Lighting Control and Services Using Visible Light Communication and Bluetooth. GCCE Babar Hussain, Cong Qiu, C. Patrick Yue
2018	—	`conf`	A 16-GB/S 0-DB Power Back-Off 16-QAM Transmitter at 28 GHZ in 65-NM CMOS. VLSI Circuits Xiangyu Meng, Can Wang, Milad Kalantari, C. Patrick Yue
2018	J	`jnl`	A Full Ka-Band Power Amplifier With 32.9% PAE and 15.3-dBm Power in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Haikun Jia, Clarissa C. Prawoto, Baoyong Chi, Zhihua Wang, C. Patrick Yue
2018	J	`jnl`	EMI-Related Common-Mode (CM) Noise Analysis and Prediction of High-Speed Source-Series Terminated (SST) I/O Driver in System-on-Package (SOP). IEEE Trans. Circuits Syst. II Express Briefs Khawaja Qasim Maqbool, Duona Luo, Xingyun Luo, Huichun Yu, C. Patrick Yue
2017	J	`jnl`	A 60-GHz 4-Gb/s Fully Integrated NRZ-to-QPSK Fiber-Wireless Modulator. IEEE Trans. Circuits Syst. I Regul. Pap. Yipeng Wang, Duona Luo, Quan Pan, Liwen Jing, Zhixin Li, C. Patrick Yue
2017	—	`conf`	A low-power PAM4 receiver using 1/4-rate sampling decoder with adaptive variable-gain rectification. A-SSCC Guang Zhu, Quan Pan, John Zhuang, Charlie Zhi, C. Patrick Yue
2017	C	`conf`	EMI common-mode (CM) noise suppression from self-calibration of high-speed SST driver using on-chip process monitoring circuit. ISCAS Khawaja Qasim Maqbool, Duona Luo, Guang Zhu, Xingyun Luo, Huichun Yu, C. Patrick Yue
2017	—	`conf`	Fully-integrated AMLED micro display system with a hybrid voltage regulator. A-SSCC Junmin Jiang, Liusheng Sun, Xu Zhang, Shing Hin Yuen, Xianbo Li, Wing-Hung Ki, C. Patrick Yue, Kei May Lau
2016	—	`conf`	A 32.9% PAE, 15.3 dBm, 21.6-41.6 GHz power amplifier in 65nm CMOS using coupled resonators. A-SSCC Haikun Jia, Clarissa C. Prawoto, Baoyong Chi, Zhihua Wang, C. Patrick Yue
2016	—	`ed.`	Proceedings of the 3rd Workshop on Visible Light Communication Systems, VLCS@MobiCom 2016, New York City, NY, USA, October 3-7, 2016 VLCS@MobiCom Xia Zhou, C. Patrick Yue
2015	—	`conf`	20.4 A 123-phase DC-DC converter-ring with fast-DVS for microprocessors. ISSCC Yan Lu, Junmin Jiang, Wing-Hung Ki, C. Patrick Yue, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2015	—	`conf`	A 60GHz 4Gb/s fully integrated NRZ-to-QPSK modulator SoC for backhaul links in fiber-wireless networks. ESSCIRC Yipeng Wang, Duona Luo, Quan Pan, Liwen Jing, Zhixin Li, C. Patrick Yue
2015	J	`jnl`	A Fully-Integrated Low-Dropout Regulator With Full-Spectrum Power Supply Rejection. IEEE Trans. Circuits Syst. I Regul. Pap. Yan Lu, Yipeng Wang, Quan Pan, Wing-Hung Ki, C. Patrick Yue
2015	—	`conf`	A fully integrated IEEE 802.15.7 visible light communication transmitter with on-chip 8-W 85% efficiency boost LED driver. VLSIC Babar Hussain, Fengyu Che, Feng Zhang, Tak-Sang Yim, Lin Cheng, Wing-Hung Ki, C. Patrick Yue, Liang Wu
2015	—	`conf`	An AMLED microdisplay driver SoC with built-in 1.25-Mb/s VLC transmitter. VLSIC Liang Wu, Xianbo Li, Wing Cheung Chong, Zhaojun Liu, Fengyu Che, Babar Hussain, Kei May Lau, C. Patrick Yue
2014	—	`conf`	17.11 A 0.65ns-response-time 3.01ps FOM fully-integrated low-dropout regulator with full-spectrum power-supply-rejection for wideband communication systems. ISSCC Yan Lu, Wing-Hung Ki, C. Patrick Yue
2014	J	`jnl`	A 26-28-Gb/s Full-Rate Clock and Data Recovery Circuit With Embedded Equalizer in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Li Sun, Quan Pan, Keh-Chung Wang, C. Patrick Yue
2014	—	`conf`	A 41-mW 30-Gb/s CMOS optical receiver with digitally-tunable cascaded equalization. ESSCIRC Quan Pan, Yipeng Wang, Zhengxiong Hou, Li Sun, Liang Wu, Wing-Hung Ki, Patrick Chiang, C. Patrick Yue
2014	—	`conf`	A 48-mW 18-Gb/s fully integrated CMOS optical receiver with photodetector and adaptive equalizer. VLSIC Quan Pan, Zhengxiong Hou, Yipeng Wang, Yan Lu, Wing-Hung Ki, Keh-Chung Wang, C. Patrick Yue
2014	J	`jnl`	Concurrent Design Analysis of High-Linearity SP10T Switch With 8.5 kV ESD Protection. IEEE J. Solid State Circuits X. Shawn Wang, Xin Wang, Fei Lu, Chen Zhang, Zongyu Dong, Li Wang, Rui Ma, Zitao Shi, Albert Z. Wang, Mau-Chung Frank Chang, Dawn Wang, Alvin J. Joseph, C. Patrick Yue
2014	A	`conf`	Towards indoor localization using Visible Light Communication for consumer electronic devices. IROS Ming Liu, Kejie Qiu, Fengyu Che, Shaohua Li, Babar Hussain, Liang Wu, C. Patrick Yue
2013	—	`conf`	A 13.56MHz fully integrated 1X/2X active rectifier with compensated bias current for inductively powered devices. ISSCC Yan Lu, Xing Li, Wing-Hung Ki, Chi-Ying Tsui, C. Patrick Yue
2013	—	`conf`	A 25-Gb/s 32.1-dB CMOS limiting amplifier for integrated optical receivers. ASICON Zhengxiong Hou, Yipeng Wang, Quan Pan, C. Patrick Yue
2013	—	`conf`	A 65-nm CMOS P-well/Deep N-well avalanche photodetector for integrated 850-nm optical. ASICON Quan Pan, Zhengxiong Hou, Yipeng Wang, C. Patrick Yue
2013	—	`conf`	A smartphone SP10T T/R switch in 180-nm SOI CMOS with 8kV+ ESD protection by co-design. CICC X. Shawn Wang, Xin Wang, Fei Lu, Li Wang, Rui Ma, Zongyu Dong, Li Sun, Albert Z. Wang, C. Patrick Yue, Dawn Wang, Alvin J. Joseph
2013	J	`jnl`	A ±0.5% Precision On-Chip Frequency Reference With Programmable Switch Array for Crystal-Less Applications. IEEE Trans. Circuits Syst. II Express Briefs Yan Lu, Gang Yuan, Lawrence Der, Wing-Hung Ki, C. Patrick Yue
2012	—	`conf`	A near-threshold, multi-node, wireless body area sensor network powered by RF energy harvesting. CICC Jiao Cheng, Lingli Xia, Chao Ma, Yong Lian, Xiaoyuan Xu, C. Patrick Yue, Zhiliang Hong, Patrick Yin Chiang
2012	—	`conf`	Input-adaptive dual-output power management unit for energy harvesting devices. MWSCAS Yan Lu, Wing-Hung Ki, C. Patrick Yue
2012	—	`conf`	The evolution of fabless IC industry in China: Past, present, and future. VLSI-DAT Ping K. Ko, C. Patrick Yue
2012	—	`conf`	Welcome from the general chairs. VLSI-DAT Michel Brillouët, Shyh-Jye Jou, C. Patrick Yue
2012	—	`conf`	Wireless power link design using silicon-embedded inductors for brain-machine interface. VLSI-DAT Rongxiang Wu, Salahuddin Raju, Mansun Chan, Johnny K. O. Sin, C. Patrick Yue
2009	—	`conf`	A 1-mW 12-Gb/s continuous-time adaptive passive equalizer in 90-nm CMOS. CICC Dong Hun Shin, Ji-Eun Jang, Frank O'Mahony, C. Patrick Yue
2009	—	`conf`	A 1.1V 150GHz amplifier with 8dB gain and +6dBm saturated output power in standard digital 65nm CMOS using dummy-prefilled microstrip lines. ISSCC Munkyo Seo, Basanth Jagannathan, Corrado Carta, John J. Pekarik, Luis Chen, C. Patrick Yue, Mark J. W. Rodwell
2008	—	`conf`	Modeling of triple-well isolation and the loading effects on circuits up to 50 GHz. CICC Piljae Park, C. Patrick Yue
2007	—	`conf`	A 1-V, 1.4-2.5 GHz Charge-Pump-Less PLL for a Phase Interpolator Based CDR. CICC Jaejin Park, J. F. Liu, L. Richard Carley, C. Patrick Yue
2007	A	`conf`	A two-tone test method for continuous-time adaptive equalizers. DATE Dongwoo Hong, Shadi Saberi, Kwang-Ting Cheng, C. Patrick Yue
2005	—	`conf`	A 10-Gbps, 8-PAM parallel interface with crosstalk cancellation for future hard disk drive channel ICs. ISCAS (2) Jaejin Park, Ruifeng Sun, L. Rick Carley, C. Patrick Yue
2005	—	`conf`	A low-power, 20-Gb/s continuous-time adaptive passive equalizer. ISCAS (2) Ruifeng Sun, Jaejin Park, Frank O'Mahony, C. Patrick Yue
2004	J	`jnl`	Integrated CMOS transmit-receive switch using LC-tuned substrate bias for 2.4-GHz and 5.2-GHz applications. IEEE J. Solid State Circuits Niranjan A. Talwalkar, C. Patrick Yue, Haitao Gan, S. Simon Wong
2003	J	`jnl`	A 10-GHz global clock distribution using coupled standing-wave oscillators. IEEE J. Solid State Circuits Frank O'Mahony, C. Patrick Yue, Mark A. Horowitz, S. Simon Wong
2003	A*	`conf`	Design of a 10GHz clock distribution network using coupled standing-wave oscillators. DAC Frank O'Mahony, C. Patrick Yue, Mark Horowitz, S. Simon Wong
2003	J	`jnl`	Near speed-of-light signaling over on-chip electrical interconnects. IEEE J. Solid State Circuits Richard Chang, Niranjan Talwalkar, C. Patrick Yue, S. Simon Wong
2003	—	`conf`	On-Chip Interconnect Inductance - Friend or Foe (Invited). ISQED S. Simon Wong, C. Patrick Yue, Richard Chang, So-Young Kim, Bendik Kleveland, Frank O'Mahony
2002	J	`jnl`	A 5-GHz CMOS transceiver for IEEE 802.11a wireless LAN systems. IEEE J. Solid State Circuits Masoud Zargari, David K. Su, C. Patrick Yue, Shahriar Rabii, David Weber, Brian J. Kaczynski, Srenik S. Mehta, Kalwant Singh, Sunetra Mendis, Bruce A. Wooley
1999	A*	`conf`	Design Strategy of On-Chip Inductors for Highly Integrated RF Systems. DAC C. Patrick Yue, S. Simon Wong
1999	—	`ch.`	RF Passive IC Components. The VLSI Handbook Thomas H. Lee, Maria del Mar Hershenson, Sunderarajan S. Mohan, Kirad Samavati, C. Patrick Yue
1998	J	`jnl`	A 115-mW, 0.5-μm CMOS GPS receiver with wide dynamic-range active filters. IEEE J. Solid State Circuits Derek K. Shaeffer, Arvin Shahani, Sunderarajan S. Mohan, Hirad Samavati, Hamid R. Rategh, Maria del Mar Hershenson, Min Xu, C. Patrick Yue, Daniel J. Eddleman, Thomas H. Lee
1998	J	`jnl`	Low-power dividerless frequency synthesis using aperture phase detection. IEEE J. Solid State Circuits Arvin Shahani, Derek K. Shaeffer, Sunderarajan S. Mohan, Hirad Samavati, Hamid R. Rategh, Maria del Mar Hershenson, Min Xu, C. Patrick Yue, Daniel J. Eddleman, Mark A. Horowitz, Thomas H. Lee
1998	J	`jnl`	On-chip spiral inductors with patterned ground shields for Si-based RF ICs. IEEE J. Solid State Circuits C. Patrick Yue, S. Simon Wong
1993	J	`jnl`	Improved universal MOSFET electron mobility degradation models for circuit simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. C. Patrick Yue, Victor Martin Agostinelli Jr., Gregory Munson Yeric, A. F. Tasch Jr.