Byungsub Kim

110 papers A* 1A 2C 4Journal 65Unranked 37
YearRankTypeTitle / Venue / Authors
2026 J jnl
A Self-Supervised Learning of a Foundation Model for Analog Layout Design Automation.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sungyu Jeong, Won Joon Choi, Junung Choi, Anik Biswas, Byungsub Kim
2025 J jnl
A CNN-Based Technique to Assist Layout-to-Generator Conversion for Analog Circuits.
CoRR
Sungyu Jeong, Minsu Kim, Byungsub Kim
2025 J jnl
A Fast Design Optimization of On-Chip Equalizing Links Using Particle Swarm Optimization.
IEEE Trans. Very Large Scale Integr. Syst.
Hyoseok Song, Kwangmin Kim, Gain Kim, Byungsub Kim
2025 J jnl
A Self-Supervised Learning of a Foundation Model for Analog Layout Design Automation.
CoRR
Sungyu Jeong, Won Joon Choi, Junung Choi, Anik Biswas, Byungsub Kim
2025 J jnl
An On-Chip Low-Cost Averaging Digital Sampling Scope for 80-GS/s Measurement of Wireline Pulse Responses.
IEEE Trans. Very Large Scale Integr. Syst.
Won Joon Choi, Myungguk Lee, Junung Choi, Jaeik Cho, Gain Kim, Byungsub Kim
2025 J jnl
Guest Editorial Introduction to the Special Section on the 2024 Asian Solid-State Circuits Conference (A-SSCC).
IEEE J. Solid State Circuits
Pei-Yun Tsai, Tsung-Heng Tsai, Minoru Fujishima, Byungsub Kim
2024 J jnl
3×16 Gb/s Compact Single-Ended PAM4 Transmitters With Inverter-Based Crosstalk Compensation for Memory Interfaces.
IEEE Trans. Circuits Syst. II Express Briefs
Changjae Moon, Iksu Jang, Sungmin Lim, Yaejoon Huh, Byungsub Kim
2024 J jnl
A Layout-to-Generator Conversion Framework With Graphical User Interface for Visual Programming of Analog Layout Generators.
IEEE Access
Sungyu Jeong, Chanhyong Lee, Minsu Kim, Iksu Jang, Myungguk Lee, Junung Choi, Byungsub Kim
2024 J jnl
A Single-Ended Inverter-Based Addition-Only Feed-Forward Equalization Transmitter.
IEEE J. Solid State Circuits
Changjae Moon, Jaeyoung Seo, Myungguk Lee, Iksu Jang, Byungsub Kim
2024 J jnl
Compact Single-Ended Transceivers Demonstrating Flexible Generation of 1/N-Rate Receiver Front-Ends for Short-Reach Links.
IEEE Trans. Circuits Syst. I Regul. Pap.
Myungguk Lee, Jaeik Cho, Junung Choi, Won Joon Choi, Jiyun Lee, Iksu Jang, Changjae Moon, Gain Kim, Byungsub Kim
2023 J jnl
A 20-Gb/s/Pin Compact Single-Ended DCC-Less DECS Transceiver With CDR-Less RX Front-End for On-Chip Links.
IEEE J. Solid State Circuits
Jaeyoung Seo, Sooeun Lee, Myungguk Lee, Changjae Moon, Byungsub Kim
2023 J jnl
A Speculative Divide-and-Conquer Optimization Method for Large Analog/Mixed-Signal Circuits: A High-Speed FFE SST Transmitter Example.
IEEE Trans. Very Large Scale Integr. Syst.
Kwangmin Kim, Hyoseok Song, ByeongCheol Lee, Byungsub Kim
2023 — conf
Review: A Speculative Divide-and-Conquer Optimization Method for Large Analog/Mixed-Signal Circuits.
ISOCC
Hyoseok Song, Kwangmin Kim, Changyoon Han, Byungsub Kim
2022 — conf
A 20 Gb/s/pin 1.18pJ/b 1149µm
ISSCC
Changjae Moon, Jaeyoung Seo, Myungguk Lee, Iksu Jang, Byungsub Kim
2022 — conf
A 20-Gb/s/pin 0.0024-mm
ISSCC
Jaeyoung Seo, Sooeun Lee, Myungguk Lee, Changjae Moon, Byungsub Kim
2022 — conf
A 50 Mb/s Full HBC TRX with Adaptive DFE and Variable-Interval 3x Oversampling CDR in 28nm CMOS Technology for A 75 cm Body Channel Moving at 0.75 Cycle/sec.
ESSCIRC
Jaehyun Ko, Iksu Jang, Chanho Kim, Jihoon Park, Changjae Moon, Sooeun Lee, Byungsub Kim
2022 J jnl
A Compact Single-Ended Inverter-Based Transceiver With Swing Improvement for Short-Reach Links.
IEEE Trans. Circuits Syst. I Regul. Pap.
Myungguk Lee, Puneet Kanwar Kaur, Jaeyoung Seo, Seungho Han, Byungsub Kim
2022 — conf
A Cost-efficient FPGA-based Embedded System for Biosensor Platform.
ISOCC
Iksu Jang, Jaeyoung Seo, Changjae Moon, Byungsub Kim
2022 — conf
A Fast Eye Size Evaluation Method for High Speed Signal.
ISOCC
Hyoseok Song, Kwangmin Kim, Changyoon Han, Byungsub Kim
2022 — conf
A Layout Generator of Latch, Flip-Flop, and Shift Register for High-Speed Links.
ISOCC
Junung Choi, Jaeik Cho, Won Joon Choi, Myungguk Lee, Byungsub Kim
2022 — conf
A Study On Reliable High-Speed HBC Enhanced by ECC for Wearable Neural Interfaces.
AICAS
Seungsik Moon, Jaehyun Ko, Byungsub Kim, Youngjoo Lee
2021 J jnl
A DFE-Enhanced Phase-Difference Modulation Signaling for Multi-Drop Memory Interfaces.
IEEE Trans. Circuits Syst. II Express Briefs
Sooeun Lee, Jaeyoung Seo, Changyoon Han, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
2021 J jnl
The development of a micro-pattern manufacturing method using rotating active tools with compensation of estimated errors and an LMS algorithm.
J. Intell. Manuf.
Soo-Bong Cho, Seung-Kook Ro, Byungsub Kim, Sungcheul Lee, Jong-Kweon Park
2020 J jnl
A 7.8 Gb/s/pin, 1.96 pJ/b Transceiver With Phase-Difference-Modulation Signaling for Highly Reflective Interconnects.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sooeun Lee, Jaeyoung Seo, Kyunghyun Lim, Jahyun Koo, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
2020 J jnl
A 7.8-Gb/s 2.9-pJ/b Single-Ended Receiver With 20-Tap DFE for Highly Reflective Channels.
IEEE Trans. Very Large Scale Integr. Syst.
Jaeyoung Seo, Jaehyun Ko, Kyunghyun Lim, Sooeun Lee, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
2020 J jnl
A Body Channel Communication Technique Utilizing Decision Feedback Equalization.
IEEE Access
Ji-Hoon Lee, Jaehyun Ko, Kwangmin Kim, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
2020 J jnl
A pattern-dependent injection-locked CDR for clock-embedded signaling.
Microelectron. J.
Jaehyeong Hong, Dong Hoon Baek, Hyunwoo Son, Cheolmin Ahn, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2020 J jnl
An 18-Gb/s NRZ Transceiver With a Channel-Included 2-UI Impulse-Response Filtering FFE and 1-Tap DFE Compensating up to 32-dB Loss.
IEEE Trans. Circuits Syst.
Cheolmin Ahn, Jaehyeong Hong, Jongshin Shin, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2020 A* conf
GUI-Enhanced Layout Generation of FFE SST TXs for Fast High-Speed Serial Link Design.
DAC
Seungho Han, Sungyu Jeong, Chanho Kim, Hong-June Park, Byungsub Kim
2020 J jnl
Low-Power Small-Area Inverter-Based DSM for MEMS Microphone.
IEEE Trans. Circuits Syst.
Seong-Eun Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2019 — conf
A 143nW Glucose-Monitoring Smart Contact Lens IC with a Dual-Mode Transmitter for Wireless-Powered Backscattering and RF-Radiated Transmission Using a Single Loop Antenna.
VLSI Circuits
Cheonhoo Jeon, Jahyun Koo, Kyongsu Lee, Su-Kyoung Kim, Sei Kwang Hahn, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2019 J jnl
A 192-pW Voltage Reference Generating Bandgap- $V_{\text{th}}$ With Process and Temperature Dependence Compensation.
IEEE J. Solid State Circuits
Youngwoo Ji, Jungho Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2019 — conf
A 192pW Hybrid Bandgap-Vth Reference with Process Dependence Compensated by a Dimension-Induced Side-Effect.
ISSCC
Youngwoo Ji, Jungho Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2019 J jnl
A Code Inversion Encoding Technique to Improve Read Margin of A Cross-Point Phase Change Memory.
IEEE Trans. Very Large Scale Integr. Syst.
Kwangmin Kim, Seokjoon Kang, Byungsub Kim
2019 J jnl
A Multilayer-Learning Current-Mode Neuromorphic System With Analog-Error Compensation.
IEEE Trans. Biomed. Circuits Syst.
Hyunwoo Son, Hwasuk Cho, Jungho Lee, Seongun Bae, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2019 J jnl
A Quadrature RC Oscillator With Noise Reduction by Voltage Swing Control.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jahyun Koo, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2018 — conf
A 0.3-to-1.2V frequency-scalable fractional-N ADPLL with a speculative dual-referenced interpolating TDC.
ISSCC
Minseob Lee, Shinwoong Kim, Hwasuk Cho, Jahyun Koo, Kwang-Hee Choi, Jin-Hyeok Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2018 — conf
A 12-Gb/s AC-Coupled FFE TX With Adaptive Relaxed Impedance Matching Achieving Adaptation Range of 35-75Ω Z0 and 30-550Ω RRX.
A-SSCC
Minsoo Choi, Myungguk Lee, Byungsub Kim
2018 — conf
A 16.6-pJ/b 150-Mb/s body-channel communication transceiver with decision feedback equalization improving >200x area efficiency.
ASP-DAC
Ji-Hoon Lee, Kwangmin Kim, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
2018 — conf
A 7.8Gb/s/pin 1.96pJ/b compact single-ended TRX and CDR with phase-difference modulation for highly reflective memory interfaces.
ISSCC
Sooeun Lee, Jaeyoung Seo, Kyunghyun Lim, Jaehyun Ko, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
2018 — conf
A 9.3 nW all-in-one bandgap voltage and current reference circuit using leakage-based PTAT generation and DIBL characteristic.
ASP-DAC
Youngwoo Ji, Cheonhoo Jeon, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2018 — conf
A Rule-of-thumb Condition to Avoid Large HRS Current in ReRAM Crossbar Array Design.
ISOCC
Yelim Youn, Kwangmin Kim, Byungsub Kim
2018 J jnl
A Search Algorithm for the Worst Operation Scenario of a Cross-Point Phase-Change Memory Utilizing Particle Swarm Optimization.
IEEE Trans. Very Large Scale Integr. Syst.
Kwangmin Kim, Seokjoon Kang, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
2018 J jnl
A Study on Bandgap Reference Circuit With Leakage-Based PTAT Generation.
IEEE Trans. Very Large Scale Integr. Syst.
Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2018 J jnl
A Time-Based Receiver With 2-Tap Decision Feedback Equalizer for Single-Ended Mobile DRAM Interface.
IEEE J. Solid State Circuits
Il-Min Yi, Min-Kyun Chae, Seok-Hun Hyun, Seung-Jun Bae, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2018 — conf
A low-power wide dynamic-range current readout circuit for biosensors.
ASP-DAC
Hyunwoo Son, Hwasuk Cho, Jahyun Koo, Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2018 J jnl
An 84.6-dB-SNDR and 98.2-dB-SFDR Residue-Integrated SAR ADC for Low-Power Sensor Applications.
IEEE J. Solid State Circuits
Seungnam Choi, Hwan-Seok Ku, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2018 J jnl
An Approximate Closed-Form Transfer Function Model for Multiconductor Transmission Lines.
IEEE Trans. Circuits Syst. II Express Briefs
Jaeyoung Seo, Minsoo Choi, Byungsub Kim
2018 J jnl
An FFE Transmitter Which Automatically and Adaptively Relaxes Impedance Matching.
IEEE J. Solid State Circuits
Minsoo Choi, Sooeun Lee, Myungguk Lee, Ji-Hoon Lee, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
2018 J jnl
An On-Chip Learning Neuromorphic Autoencoder With Current-Mode Transposable Memory Read and Virtual Lookup Table.
IEEE Trans. Biomed. Circuits Syst.
Hwasuk Cho, Hyunwoo Son, Kihwan Seong, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2018 — conf
Experimental Verification of a Simple, Intuitive, and Accurate Closed-Form Transfer Function Model for Diverse High-Speed Interconnects.
ISOCC
Kyunghyun Lim, Minsoo Choi, Myat Thu Linn Aung, Kyunghwan Kim, Ji-Seong Kim, Rock-Hyun Baek, Ho-Jin Song, Tony Tae-Hyoung Kim, Byungsub Kim
2017 — conf
23.7 A time-based receiver with 2-tap DFE for a 12Gb/s/pin single-ended transceiver of mobile DRAM interface in 0.8V 65nm CMOS.
ISSCC
Il-Min Yi, Min-Kyun Chae, Seok-Hun Hyun, Seung-Jun Bae, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2017 — conf
5.5 A quadrature relaxation oscillator with a process-induced frequency-error compensation loop.
ISSCC
Jahyun Koo, Kyoung-sik Moon, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2017 — conf
5.8 A 9.3nW all-in-one bandgap voltage and current reference circuit.
ISSCC
Youngwoo Ji, Cheonhoo Jeon, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2017 — conf
8.7 A 0.0047mm
ISSCC
Hwasuk Cho, Kihwan Seong, Kwang-Hee Choi, Jin-Hyeok Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2017 — conf
A 10-GHz multi-purpose reconfigurable built-in self-test circuit for high-speed links.
A-SSCC
Myungguk Lee, Seungho Han, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
2017 J jnl
A 250-µW 2.4-GHz Fast-Lock Fractional-N Frequency Generation for Ultralow-Power Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Seunghwan Hong, Shinwoong Kim, Seungnam Choi, Hwasuk Cho, Jaehyeong Hong, Young Hun Seo, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2017 J jnl
A Low-Power Wide Dynamic-Range Current Readout Circuit for Ion-Sensitive FET Sensors.
IEEE Trans. Biomed. Circuits Syst.
Hyunwoo Son, Hwasuk Cho, Jahyun Koo, Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2017 J jnl
A Phase-Interpolator-Based Fractional Counter for All-Digital Fractional-N Phase-Locked Loop.
IEEE Trans. Circuits Syst. II Express Briefs
Young-Ho Choi, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2017 J jnl
A Self-Biased Current-Mode Amplifier With an Application to 10-bit Pipeline ADC.
IEEE Trans. Circuits Syst. I Regul. Pap.
Seungnam Choi, Yunjae Suh, Joohyun Lee, Jinkyu Kim, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2017 J jnl
A Single-Chip 64-Channel Ultrasound RX-Beamformer Including Analog Front-End and an LUT for Non-Uniform ADC-Sample-Clock Generation.
IEEE Trans. Biomed. Circuits Syst.
Yoon-Jee Kim, Sung-Eun Cho, Ji-Yong Um, Min-Kyun Chae, Jihoon Bang, Jongkeun Song, Taeho Jeon, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2017 J jnl
All-Synthesizable Current-Mode Transmitter Driver for USB2.0 Interface.
IEEE Trans. Very Large Scale Integr. Syst.
Kihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2017 J jnl
An Approximate Transfer Function Model of Two Serially Connected Heterogeneous Transmission Lines.
IEEE Trans. Circuits Syst. II Express Briefs
Jaeyoung Seo, Minsoo Choi, Sanquan Song, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
2017 J jnl
Automatic ReRAM SPICE Model Generation From Empirical Data for Fast ReRAM-Circuit Coevaluation.
IEEE Trans. Very Large Scale Integr. Syst.
Jaehyun Seo, Sangheon Lee, Kwangmin Kim, Sooeun Lee, Hyunsang Hwang, Byungsub Kim
2017 J jnl
Investigation on the Worst Read Scenario of a ReRAM Crossbar Array.
IEEE Trans. Very Large Scale Integr. Syst.
Yelim Youn, Kwangmin Kim, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
2016 J jnl
A 0.65-to-10.5 Gb/s Reference-Less CDR With Asynchronous Baud-Rate Sampling for Frequency Acquisition and Adaptive Equalization.
IEEE Trans. Circuits Syst. I Regul. Pap.
Seungnam Choi, Hyunwoo Son, Jongshin Shin, Sang-Hyun Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2016 J jnl
A 2 GHz Synthesized Fractional-N ADPLL With Dual-Referenced Interpolating TDC.
IEEE J. Solid State Circuits
Shinwoong Kim, Seunghwan Hong, Kapseok Chang, Hyungsik Ju, Jaewook Shin, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2016 J jnl
A 40 mV-Differential-Channel-Swing Transceiver Using a RX Current-Integrating TIA and a TX Pre-Emphasis Equalizer With a CML Driver at 9 Gb/s.
IEEE Trans. Circuits Syst. I Regul. Pap.
Il-Min Yi, Soo-Min Lee, Seung-Jun Bae, Young-Soo Sohn, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2016 J jnl
A Coefficient-Error-Robust Feed-Forward Equalizing Transmitter for Eye-Variation and Power Improvement.
IEEE J. Solid State Circuits
Seungho Han, Sooeun Lee, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
2016 J jnl
A Delay Locked Loop With a Feedback Edge Combiner of Duty-Cycle Corrector With a 20%-80% Input Duty Cycle for SDRAMs.
IEEE Trans. Circuits Syst. II Express Briefs
Ji-Hoon Lim, Jun-Hyun Bae, Jaemin Jang, Hae-Kang Jung, Hyunbae Lee, Yongju Kim, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2016 J jnl
A Single-Ended Parallel Transceiver With Four-Bit Four-Wire Four-Level Balanced Coding for the Point-to-Point DRAM Interface.
IEEE J. Solid State Circuits
Soo-Min Lee, Ji-Hoon Lim, Il-Min Yi, Young Jae Jang, Hae-Kang Jung, Kyunghoon Kim, Dae-Han Kwon, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2016 — conf
A low-EMI four-bit four-wire single-ended DRAM interface by using a three-level balanced coding scheme.
VLSI Circuits
Il-Min Yi, Seung-Jun Bae, Min-Kyun Chae, Soo-Min Lee, Young Jae Jang, Young-Chul Cho, Young-Soo Sohn, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2016 — conf
A low-power LDO circuit with a fast load regulation.
APCCAS
Young Jae Jang, Seong-Eun Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2016 — conf
All-synthesizable 6Gbps voltage-mode transmitter for serial link.
A-SSCC
Young-Ho Choi, Kihwan Seong, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2016 — conf
All-synthesizable transmitter driver and data recovery circuit for USB2.0 interface.
ISOCC
Kihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2016 — conf
Read margin analysis in an ReRAM crossbar array.
APCCAS
Jaehyun Seo, Byungsub Kim
2015 — conf
5.7 A 29nW bandgap reference circuit.
ISSCC
Jongmi Lee, Youngwoo Ji, Seungnam Choi, Young-Chul Cho, Seong-Jin Jang, Joo-Sun Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2015 A conf
A Sample Reduction Technique by Aliasing Channel Response for Fast Equalizing Transceiver Design.
ICCAD
Sooeun Lee, Gunbok Lee, Jae-Yoon Sim, Hong-June Park, Wee Sang Park, Byungsub Kim
2015 J jnl
A Single-Chip 32-Channel Analog Beamformer With 4-ns Delay Resolution and 768-ns Maximum Delay Range for Ultrasound Medical Imaging With a Linear Array Transducer.
IEEE Trans. Biomed. Circuits Syst.
Ji-Yong Um, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2015 J jnl
An Approximate Closed-Form Transfer Function Model for Diverse Differential Interconnects.
IEEE Trans. Circuits Syst. I Regul. Pap.
Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
2015 — conf
An input pole tuned switching equalization scheme for high-speed serial links.
MWSCAS
Sanquan Song, Jian Xu, Fengxiang Cai, Xin Ma, Zibing Yang, Matthew Becker, Larry Tate, Byungsub Kim, Samuel Palermo, William J. Bowhill
2014 — conf
2.6 A 5.67mW 9Gb/s DLL-based reference-less CDR with pattern-dependent clock-embedded signaling for intra-panel interface.
ISSCC
Dong Hoon Baek, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2014 — conf
2.7 A coefficient-error-robust FFE TX with 230% eye-variation improvement without calibration in 65nm CMOS technology.
ISSCC
Seungho Han, Sooeun Lee, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
2014 — conf
24.8 An analog-digital-hybrid single-chip RX beamformer with non-uniform sampling for 2D-CMUT ultrasound imaging to achieve wide dynamic range of delay and small chip area.
ISSCC
Ji-Yong Um, Eun-Woo Song, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Jongkeun Song, Bae-Hyung Kim, Seunghun Lee, Jihoon Bang, Youngil Kim, Kyungil Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2014 C conf
A 0.4 V driving multi-touch capacitive sensor with the driving signal frequency set to (n+0.5) times the inverse of the LCD VCOM noise period.
ISCAS
Jae-Seung Lee, Dong-Hee Yeo, Sang-Soo Lee, Hye-Jung Kwon, Jae-Yoon Sim, Byungsub Kim, Hong-June Park
2014 J jnl
A 0.5-V, 1.47- µW 40-kS/s 13-bit SAR ADC With Capacitor Error Compensation.
IEEE Trans. Circuits Syst. II Express Briefs
Hyunsoo Ha, Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2014 J jnl
A 40-mV-Swing Single-Ended Transceiver for TSV with a Switched-Diode RX Termination.
IEEE Trans. Circuits Syst. II Express Briefs
Il-Min Yi, Soo-Min Lee, Seung-Jun Bae, Young-Soo Sohn, Jung-Hwan Choi, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2014 — conf
A voltage-scalable 10-b pipelined ADC with current-mode amplifier.
CICC
Yunjae Suh, Seungnam Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2014 J jnl
An 80 mV-Swing Single-Ended Duobinary Transceiver With a TIA RX Termination for the Point-to-Point DRAM Interface.
IEEE J. Solid State Circuits
Soo-Min Lee, Il-Min Yi, Hae-Kang Jung, Hyunbae Lee, Yong-Ju Kim, Yunsaing Kim, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2014 J jnl
An Analog-Digital Hybrid RX Beamformer Chip With Non-Uniform Sampling for Ultrasound Medical Imaging With 2D CMUT Array.
IEEE Trans. Biomed. Circuits Syst.
Ji-Yong Um, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Jongkeun Song, Bae-Hyung Kim, Seung-Hun Lee, Jihoon Bang, Youngil Kim, Kyungil Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2014 J jnl
An Approximate Closed-Form Channel Model for Diverse Interconnect Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
2014 J jnl
Analysis of an Open-Loop Time Amplifier With a Time Gain Determined by the Ratio of Bias Current.
IEEE Trans. Circuits Syst. II Express Briefs
Hye-Jung Kwon, Jae-Seung Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
2014 J jnl
Current-Mode Transceiver for Silicon Interposer Channel.
IEEE J. Solid State Circuits
Seung-Hun Lee, Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2013 J jnl
A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier.
IEEE Trans. Circuits Syst. II Express Briefs
Yunjae Suh, Jongmi Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2013 J jnl
A 5 Gb/s Single-Ended Parallel Receiver With Adaptive Crosstalk-Induced Jitter Cancellation.
IEEE J. Solid State Circuits
Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2013 J jnl
A FIR-Embedded Phase Interpolator Based Noise Filtering for Wide-Bandwidth Fractional-N PLL.
IEEE J. Solid State Circuits
Dong-Woo Jee, Yunjae Suh, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2013 J jnl
A QDR-Based 6-GB/s Parallel Transceiver With Current-Regulated Voltage-Mode Output Driver and Byte CDR for Memory Interface.
IEEE Trans. Circuits Syst. II Express Briefs
Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2012 J jnl
A 1.9-GHz Fractional-N Digital PLL With Subexponent ΔΣ TDC and IIR-Based Noise Cancellation.
IEEE Trans. Circuits Syst. II Express Briefs
Dong-Woo Jee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2010 J jnl
An Energy-Efficient Equalized Transceiver for RC-Dominant Channels.
IEEE J. Solid State Circuits
Byungsub Kim, Vladimir Stojanovic
2010 — —
Equalized on-chip interconnect: modeling, analysis, and design.
Byungsub Kim
2010 J jnl
Precision Component Technologies for Microfactory Systems Developed at KIMM.
Int. J. Autom. Technol.
Jong-Kweon Park, Seung-Kook Ro, Byungsub Kim, Woo Cheol Shin, Hyeon-Hwa Lee
2009 J jnl
A 10-Gb/s Compact Low-Power Serial I/O With DFE-IIR Equalization in 65-nm CMOS.
IEEE J. Solid State Circuits
Byungsub Kim, Yong Liu, Timothy O. Dickson, John F. Bulzacchelli, Daniel J. Friedman
2009 — conf
A 10Gb/s compact low-power serial I/O with DFE-IIR equalization in 65nm CMOS.
ISSCC
Yong Liu, Byungsub Kim, Timothy O. Dickson, John F. Bulzacchelli, Daniel J. Friedman
2009 — conf
A 4Gb/s/ch 356fJ/b 10mm equalized on-chip interconnect with nonlinear charge-injecting transmit filter and transimpedance receiver in 90nm CMOS.
ISSCC
Byungsub Kim, Vladimir Stojanovic
2009 — conf
Designing Energy-Efficient Low-Diameter On-Chip Networks with Equalized Interconnects.
Hot Interconnects
Ajay Joshi, Byungsub Kim, Vladimir Stojanovic
2008 J jnl
Characterization of Equalized and Repeated Interconnects for NoC Applications.
IEEE Des. Test Comput.
Byungsub Kim, Vladimir Stojanovic
2007 A conf
Equalized interconnects for on-chip networks: modeling and optimization framework.
ICCAD
Byungsub Kim, Vladimir Stojanovic
2006 C conf
Power-adaptive operational amplifier with positive-feedback self biasing.
ISCAS
Byungsub Kim, Soumyajit Mandal, Rahul Sarpeshkar
2001 C conf
Control of a dual stage actuator system for noncircular cam turning process.
ACC
Byungsub Kim, Hanwu Li, Tsu-Chin Tsao
2001 C conf
Robust repetitive controller design with improved performance.
ACC
Byungsub Kim, Tsu-Chin Tsao