Bryan Casper

45 papers Misc 1Journal 16Unranked 28
YearRankTypeTitle / Venue / Authors
2022 J jnl
A Scalable 32-56 Gb/s 0.56-1.28 pJ/b Voltage-Mode VCSEL-Based Optical Transmitter in 28-nm CMOS.
IEEE J. Solid State Circuits
Mozhgan Mansuri, Rajesh Inti, Joe Kennedy, Junyi Qiu, Chun-Ming Hsu, Jahnavi Sharma, Hao Li, Bryan Casper, James E. Jaussi
2021 J jnl
A 3-D-Integrated Silicon Photonic Microring-Based 112-Gb/s PAM-4 Transmitter With Nonlinear Equalization and Thermal Control.
IEEE J. Solid State Circuits
Hao Li, Ganesh Balamurugan, Taehwan Kim, Meer Sakib, Ranjeet Kumar, Haisheng Rong, James E. Jaussi, Bryan Casper
2021 — conf
A Scalable 32-to-56Gb/s 0.56-to-1.28pJ/b Voltage-Mode VCSEL-Based Optical Transmitter in 28nm CMOS.
CICC
Rajesh Inti, Mozhgan Mansuri, Joe Kennedy, Junyi Qiu, Chun-Ming Hsu, Jahnavi Sharma, Hao Li, Bryan Casper, James E. Jaussi
2020 — conf
12.1 A 3D-Integrated Microring-Based 112Gb/s PAM-4 Silicon-Photonic Transmitter with Integrated Nonlinear Equalization and Thermal Control.
ISSCC
Hao Li, Ganesh Balamurugan, Meer Sakib, Ranjeet Kumar, Hasitha Jayatilleka, Haisheng Rong, James E. Jaussi, Bryan Casper
2020 — conf
4.5 A 64Gb/s 1.4pJ/b/element 60GHz 2×2-Element Phased-Array Receiver with 8b/symbol Polarization MIMO and Spatial Interference Tolerance.
ISSCC
Anandaroop Chakrabarti, Chintan Thakkar, Shuhei Yamada, Debabani Choudhury, James E. Jaussi, Bryan Casper
2019 — conf
A 112 Gb/s PAM4 Transmitter with Silicon Photonics Microring Modulator and CMOS Driver.
OFC
Hao Li, Ganesh Balamurugan, Meer Sakib, Jie Sun, Jeffery Driscoll, Ranjeet Kumar, Hasitha Jayatilleka, Haisheng Rong, James E. Jaussi, Bryan Casper
2019 J jnl
A 42.2-Gb/s 4.3-pJ/b 60-GHz Digital Transmitter With 12-b/Symbol Polarization MIMO.
IEEE J. Solid State Circuits
Chintan Thakkar, Anandaroop Chakrabarti, Shuhei Yamada, Debabani Choudhury, James E. Jaussi, Bryan Casper
2019 — conf
A 42.2Gb/s 4.3pJ/b 60GHz Digital Transmitter with 12b/Symbol Polarization MIMO.
ISSCC
Chintan Thakkar, Stefan Shopov, Anandaroop Chakrabarti, Shuhei Yamada, Debabani Choudhury, James E. Jaussi, Bryan Casper
2019 J jnl
A Low-Power Bidirectional Link With a Direct Data-Sequencing Blind Oversampling CDR.
IEEE J. Solid State Circuits
Sudip Shekhar, Rajesh Inti, James E. Jaussi, Tzu-Chien Hsueh, Bryan Casper
2018 — conf
A 112 Gb/s PAM4 Linear TIA with 0.96 pJ/bit Energy Efficiency in 28 nm CMOS.
ESSCIRC
Hao Li, Ganesh Balamurugan, James E. Jaussi, Bryan Casper
2018 — conf
A 27.8Gb/s 11.5pJ/b 60GHz transceiver in 28nm CMOS with polarization MIMO.
ISSCC
Saeid Daneshgar, Kaushik Dasgupta, Chintan Thakkar, Anandaroop Chakrabarti, Shuhei Yamada, Debabani Choudhury, James E. Jaussi, Bryan Casper
2018 — conf
A 40Gb/s 6pJ/b RX baseband in 28nm CMOS for 60GHz polarization MIMO.
ISSCC
Shinwon Kang, Chintan Thakkar, Nathan Narevsky, Kaushik Dasgupta, Saeid Daneshgar, James E. Jaussi, Bryan Casper
2018 J jnl
A 60-GHz Transceiver and Baseband With Polarization MIMO in 28-nm CMOS.
IEEE J. Solid State Circuits
Kaushik Dasgupta, Saeid Daneshgar, Chintan Thakkar, Shinwon Kang, Anandaroop Chakrabarti, Shuhei Yamada, Nathan Narevsky, Debabani Choudhury, James E. Jaussi, Bryan Casper
2018 — conf
A Digital-Intensive 2-to-9.2 GB/S/Pin Memory Controller I/O with Fast-Response LDO in 10NM CMOS.
VLSI Circuits
Rajesh Inti, Mozhgan Mansuri, Joe Kennedy, Hariprasath Venkatram, Chun-Ming Hsu, Aaron Martin, James E. Jaussi, Bryan Casper
2018 — conf
High-speed contactless I/O for computing devices.
CICC
Chintan Thakkar, James E. Jaussi, Bryan Casper
2017 — conf
A 25 Gb/s 60 GHz digital power amplifier in 28nm CMOS.
ESSCIRC
Kaushik Dasgupta, Saeid Daneshgar, Chintan Thakkar, Kunal Datta, James E. Jaussi, Bryan Casper
2016 — conf
23.2 A 32Gb/s bidirectional 4-channel 4pJ/b capacitively coupled link in 14nm CMOS for proximity communication.
ISSCC
Chintan Thakkar, Shreyas Sen, James E. Jaussi, Bryan Casper
2016 J jnl
A 32 Gb/s Bidirectional 4-channel 4 pJ/b Capacitively Coupled Link in 14 nm CMOS for Proximity Communication.
IEEE J. Solid State Circuits
Chintan Thakkar, Shreyas Sen, James E. Jaussi, Bryan Casper
2015 — conf
A 0.5-to-0.75V, 3-to-8 Gbps/lane, 385-to-790 fJ/b, bi-directional, quad-lane forwarded-clock transceiver in 22nm CMOS.
VLSIC
Rajesh Inti, Sudip Shekhar, Ganesh Balamurugan, James E. Jaussi, Clark Roberts, Tzu-Chien Hsueh, Bryan Casper
2015 — conf
A 1.2-5Gb/s 1.4-2pJ/b serial link in 22nm CMOS with a direct data-sequencing blind oversampling CDR.
VLSIC
Sudip Shekhar, Rajesh Inti, James E. Jaussi, Tzu-Chien Hsueh, Bryan Casper
2015 J jnl
An On-Die All-Digital Power Supply Noise Analyzer With Enhanced Spectrum Measurements.
IEEE J. Solid State Circuits
Tzu-Chien Hsueh, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper
2014 — conf
26.2 A 205mW 32Gb/s 3-Tap FFE/6-tap DFE bidirectional serial link in 22nm CMOS.
ISSCC
James E. Jaussi, Ganesh Balamurugan, Sami Hyvonen, Tzu-Chien Hsueh, Tawfiq Musah, Gökçe Keskin, Sudip Shekhar, Joseph T. Kennedy, Shreyas Sen, Rajesh Inti, Mozhgan Mansuri, Michael Leddige, Bryce Horine, Clark Roberts, Randy Mooney, Bryan Casper
2014 — conf
26.4 A 25.6Gb/s differential and DDR4/GDDR5 dual-mode transmitter with digital clock calibration in 22nm CMOS.
ISSCC
Tzu-Chien Hsueh, Ganesh Balamurugan, James E. Jaussi, Sami Hyvonen, Joseph T. Kennedy, Gökçe Keskin, Tawfiq Musah, Sudip Shekhar, Rajesh Inti, Shreyas Sen, Mozhgan Mansuri, Clark Roberts, Bryan Casper
2014 J jnl
A 4-32 Gb/s Bidirectional Link With 3-Tap FFE/6-Tap DFE and Collaborative CDR in 22 nm CMOS.
IEEE J. Solid State Circuits
Tawfiq Musah, James E. Jaussi, Ganesh Balamurugan, Sami Hyvonen, Tzu-Chien Hsueh, Gokce Keskin, Sudip Shekhar, Joseph T. Kennedy, Shreyas Sen, Rajesh Inti, Mozhgan Mansuri, Michael Leddige, Bryce Horine, Clark Roberts, Randy Mooney, Bryan Casper
2014 — conf
An on-die all-digital power supply noise analyzer with enhanced spectrum measurements.
ESSCIRC
Tzu-Chien Hsueh, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper
2013 J jnl
A Scalable 0.128-1 Tb/s, 0.8-2.6 pJ/bit, 64-Lane Parallel I/O in 32-nm CMOS.
IEEE J. Solid State Circuits
Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Tzu-Chien Hsueh, Sudip Shekhar, Ganesh Balamurugan, Frank O'Mahony, Clark Roberts, Randy Mooney, Bryan Casper
2013 — conf
A scalable 0.128-to-1Tb/s 0.8-to-2.6pJ/b 64-lane parallel I/O in 32nm CMOS.
ISSCC
Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Tzu-Chien Hsueh, Sudip Shekhar, Ganesh Balamurugan, Frank O'Mahony, Clark Roberts, Randy Mooney, Bryan Casper
2013 — conf
Design considerations for low-power receiver front-end in high-speed data links.
CICC
Sudip Shekhar, James E. Jaussi, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper
2012 — conf
An on-die all-digital delay measurement circuit with 250fs accuracy.
VLSIC
Mozhgan Mansuri, Bryan Casper, Frank O'Mahony
2010 J jnl
A 47 , ˟, 10 Gb/s 1.4 mW/Gb/s Parallel Interface in 45 nm CMOS.
IEEE J. Solid State Circuits
Frank O'Mahony, James E. Jaussi, Joseph T. Kennedy, Ganesh Balamurugan, Mozhgan Mansuri, Clark Roberts, Sudip Shekhar, Randy Mooney, Bryan Casper
2010 — conf
A 47×10Gb/s 1.4mW/(Gb/s) parallel interface in 45nm CMOS.
ISSCC
Frank O'Mahony, Joseph T. Kennedy, James E. Jaussi, Ganesh Balamurugan, Mozhgan Mansuri, Clark Roberts, Sudip Shekhar, Randy Mooney, Bryan Casper
2010 — conf
A 5-to-25Gb/s 1.6-to-3.8mW/(Gb/s) reconfigurable transceiver in 45nm CMOS.
ISSCC
Ganesh Balamurugan, Frank O'Mahony, Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Bryan Casper
2009 J jnl
Clocking Analysis, Implementation and Measurement Techniques for High-Speed Data Links - A Tutorial.
IEEE Trans. Circuits Syst. I Regul. Pap.
Bryan Casper, Frank O'Mahony
2009 J jnl
Strong Injection Locking in Low- Q LC Oscillators: Modeling and Application in a Forwarded-Clock I/O Receiver.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sudip Shekhar, Ganesh Balamurugan, David J. Allstot, Mozhgan Mansuri, James E. Jaussi, Randy Mooney, Joseph T. Kennedy, Bryan Casper, Frank O'Mahony
2008 — conf
A 27Gb/s Forwarded-Clock I/O Receiver Using an Injection-Locked LC-DCO in 45nm CMOS.
ISSCC
Frank O'Mahony, Sudip Shekhar, Mozhgan Mansuri, Ganesh Balamurugan, James E. Jaussi, Joseph T. Kennedy, Bryan Casper, David J. Allstot, Randy Mooney
2008 J jnl
A Scalable 5-15 Gbps, 14-75 mW Low-Power I/O Transceiver in 65 nm CMOS.
IEEE J. Solid State Circuits
Ganesh Balamurugan, Joseph T. Kennedy, Gaurab Banerjee, James E. Jaussi, Mozhgan Mansuri, Frank O'Mahony, Bryan Casper, Randy Mooney
2008 — conf
Strong injection locking of low-Q LC oscillators.
CICC
Mozhgan Mansuri, Frank O'Mahony, Ganesh Balamurugan, James E. Jaussi, Joseph T. Kennedy, Sudip Shekhar, Randy Mooney, Bryan Casper
2007 — conf
Future Microprocessor Interfaces: Analysis, Design and Optimization.
CICC
Bryan Casper, Ganesh Balamurugan, James E. Jaussi, Joseph T. Kennedy, Mozhgan Mansuri
2006 — conf
A 20Gb/s Embedded Clock Transceiver in 90nm CMOS.
ISSCC
Bryan Casper, James E. Jaussi, Frank O'Mahony, Mozhgan Mansuri, K. Canagasaby, Joe Kennedy, Randy Mooney
2006 — conf
A 20Gb/s Forwarded Clock Transceiver in 90nm CMOS B.
ISSCC
Bryan Casper, James E. Jaussi, Frank O'Mahony, Mozhgan Mansuri, K. Canagasaby, Joseph T. Kennedy, E. Yeung, Randy Mooney
2006 Misc conf
Testing High-Speed IO Links Using On-Die Circuitry.
VLSI Design
Priya Iyer, Shailendra Jain, Bryan Casper, Jason Howard
2005 J jnl
8-Gb/s source-synchronous I/O link with adaptive receiver equalization, offset cancellation, and clock de-skew.
IEEE J. Solid State Circuits
James E. Jaussi, Ganesh Balamurugan, David R. Johnson, Bryan Casper, Aaron Martin, Joseph T. Kennedy, Naresh R. Shanbhag, Randy Mooney
2004 — conf
Jitter in high-speed serial and parallel links.
ISCAS (4)
Pavan Kumar Hanumolu, Bryan Casper, Randy Mooney, Gu-Yeon Wei, Un-Ku Moon
2003 J jnl
An 8-Gb/s simultaneous bidirectional link with on-die waveform capture.
IEEE J. Solid State Circuits
Bryan Casper, Aaron Martin, James E. Jaussi, Joe Kennedy, Randy Mooney
2003 J jnl
Analysis of PLL clock jitter in high-speed serial links.
IEEE Trans. Circuits Syst. II Express Briefs
Pavan Kumar Hanumolu, Bryan Casper, Randy Mooney, Gu-Yeon Wei, Un-Ku Moon