Bruce L. Jacob

83 papers A* 14A 2B 2C 1Misc 6Journal 26Unranked 24

Year	Rank	Type	Title / Venue / Authors
2022	J	`jnl`	Building A Trusted Execution Environment for In-Storage Computing. CoRR Yuqi Xue, Luyi Kang, Weiwei Jia, Xiaohao Wang, Jongryool Kim, Changhwan Youn, Myeong Joon Kang, Hyung Jin Lim, Bruce L. Jacob, Jian Huang
2022	—	`ed.`	Proceedings of the 2022 International Symposium on Memory Systems, MEMSYS 2022, Washington, DC, USA, October 3-6, 2022 MEMSYS Bruce L. Jacob
2021	A*	`conf`	IceClave: A Trusted Execution Environment for In-Storage Computing. MICRO Luyi Kang, Yuqi Xue, Weiwei Jia, Xiaohao Wang, Jongryool Kim, Changhwan Youn, Myeong Joon Kang, Hyung Jin Lim, Bruce L. Jacob, Jian Huang
2021	J	`jnl`	IceClave: A Trusted Execution Environment for In-Storage Computing. CoRR Luyi Kang, Yuqi Xue, Weiwei Jia, Xiaohao Wang, Jongryool Kim, Changhwan Youn, Myeong Joon Kang, Hyung Jin Lim, Bruce L. Jacob, Jian Huang
2021	J	`jnl`	Monolithically Integrating Non-Volatile Main Memory over the Last-Level Cache. ACM Trans. Archit. Code Optim. Candace Walden, Devesh Singh, Meenatchi Jagasivamani, Shang Li, Luyi Kang, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung
2021	—	`conf`	Zoned FTL: Achieve Resource Isolation via Hardware Virtualization. MEMSYS Luyi Kang, Bruce L. Jacob
2020	J	`jnl`	DRAMsim3: A Cycle-Accurate, Thermal-Capable DRAM Simulator. IEEE Comput. Archit. Lett. Shang Li, Zhiyuan Yang, Dhiraj Reddy, Ankur Srivastava, Bruce L. Jacob
2020	—	`conf`	Tileable Monolithic ReRAM Memory Design. COOL CHIPS Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung
2019	J	`jnl`	Analyzing the Monolithic Integration of a ReRAM-Based Main Memory Into a CPU's Die. IEEE Micro Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung
2019	—	`conf`	Design for ReRAM-based main-memory architectures. MEMSYS Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Donald Yeung, Bruce L. Jacob
2019	—	`conf`	PROFET: Modeling System Performance and Energy Without Simulating the CPU. SIGMETRICS (Abstracts) Milan Radulovic, Rommel Sánchez Verdejo, Paul M. Carpenter, Petar Radojkovic, Bruce L. Jacob, Eduard Ayguadé
2019	J	`jnl`	PROFET: Modeling System Performance and Energy Without Simulating the CPU. Proc. ACM Meas. Anal. Comput. Syst. Milan Radulovic, Rommel Sánchez Verdejo, Paul M. Carpenter, Petar Radojkovic, Bruce L. Jacob, Eduard Ayguadé
2019	—	`conf`	Rethinking cycle accurate DRAM simulation. MEMSYS Shang Li, Rommel Sánchez Verdejo, Petar Radojkovic, Bruce L. Jacob
2019	—	`conf`	Statistical DRAM modeling. MEMSYS Shang Li, Bruce L. Jacob
2018	—	`conf`	A performance & power comparison of modern high-speed DRAM architectures. MEMSYS Shang Li, Dhiraj Reddy, Bruce L. Jacob
2018	—	`conf`	Exascale Interconnect Topology Characterization and Parameter Exploration. HPCC/SmartCity/DSS Shang Li, Po-Chun Huang, Bruce L. Jacob
2018	—	`conf`	Main memory latency simulation: the missing link. MEMSYS Rommel Sánchez Verdejo, Kazi Asifuzzaman, Milan Radulovic, Petar Radojkovic, Eduard Ayguadé, Bruce L. Jacob
2018	—	`conf`	Memory-systems challenges in realizing monolithic computers. MEMSYS Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung
2018	—	`ed.`	Proceedings of the International Symposium on Memory Systems, MEMSYS 2018, Old Town Alexandria, VA, USA, October 01-04, 2018 MEMSYS Bruce L. Jacob
2017	—	`ed.`	Proceedings of the International Symposium on Memory Systems, MEMSYS 2017, Alexandria, VA, USA, October 02 - 05, 2017 MEMSYS Bruce L. Jacob
2017	—	`conf`	Using run-time reverse-engineering to optimize DRAM refresh. MEMSYS Deepak M. Mathew, Éder F. Zulian, Matthias Jung, Kira Kraft, Christian Weis, Bruce L. Jacob, Norbert Wehn
2016	J	`jnl`	DRAM Refresh Mechanisms, Penalties, and Trade-Offs. IEEE Trans. Computers Ishwar Bhati, Mu-Tien Chang, Zeshan Chishti, Shih-Lien Lu, Bruce L. Jacob
2016	—	`conf`	Fast full system memory checkpointing with SSD-aware memory controller. MEMSYS Jim Stevens, Paul Tschirhart, Bruce L. Jacob
2016	—	`conf`	Low Latency, High Bisection-Bandwidth Networks for Exascale Memory Systems. MEMSYS Shang Li, Po-Chun Huang, David Banks, Max DePalma, Ahmed Elshaarany, K. Scott Hemmert, Arun Rodrigues, Emily Ruppel, Yitian Wang, Jim Ang, Bruce L. Jacob
2016	—	`ed.`	Proceedings of the Second International Symposium on Memory Systems, MEMSYS 2016, Alexandria, VA, USA, October 3-6, 2016 MEMSYS Bruce L. Jacob
2016	J	`jnl`	The 2 PetaFLOP, 3 Petabyte, 9 TB/s, 90 kW Cabinet: A System Architecture for Exascale and Big Data. IEEE Comput. Archit. Lett. Bruce L. Jacob
2016	—	`conf`	The Case for Associative DRAM Caches. MEMSYS Paul Tschirhart, Jim Stevens, Zeshan Chishti, Bruce L. Jacob
2016	J	`jnl`	The Case for VLIW-CMP as a Building Block for Exascale. IEEE Comput. Archit. Lett. Bruce L. Jacob
2015	—	`conf`	Bringing Modern Hierarchical Memory Systems Into Focus: A study of architecture and workload factors on system performance. MEMSYS Paul Tschirhart, Jim Stevens, Zeshan Chishti, Shih-Lien Lu, Bruce L. Jacob
2015	A*	`conf`	Flexible auto-refresh: enabling scalable and energy-efficient DRAM refresh reductions. ISCA Ishwar Bhati, Zeshan Chishti, Shih-Lien Lu, Bruce L. Jacob
2015	—	`ed.`	Proceedings of the 2015 International Symposium on Memory Systems, MEMSYS 2015, Washington DC, DC, USA, October 5-8, 2015 MEMSYS Bruce L. Jacob
2015	—	`conf`	The Semantic Gap Between Software and the Memory System. MEMSYS Jim Stevens, Paul Tschirhart, Bruce L. Jacob
2014	—	`conf`	High-bandwidth, high-capacity, low-power memory systems. ICSAMOS Bruce L. Jacob
2013	A	`conf`	Coordinated refresh: Energy efficient techniques for DRAM refresh scheduling. ISLPED Ishwar Bhati, Zeshan Chishti, Bruce L. Jacob
2013	A*	`conf`	Technology comparison for large last-level caches (L HPCA Mu-Tien Chang, Paul Rosenfeld, Shih-Lien Lu, Bruce L. Jacob
2012	A*	`conf`	Buffer-on-board memory systems. ISCA Elliott Cooper-Balis, Paul Rosenfeld, Bruce L. Jacob
2012	B	`conf`	Energy-Efficient Cached DIMM Architecture. MASCOTS Mu-Tien Chang, Joe Gross, Bruce L. Jacob
2011	—	`conf`	An analytical model to estimate PCM failure probability due to process variations. SoCC Mu-Tien Chang, Bruce L. Jacob
2011	J	`jnl`	DRAMSim2: A Cycle Accurate Memory System Simulator. IEEE Comput. Archit. Lett. Paul Rosenfeld, Elliott Cooper-Balis, Bruce L. Jacob
2011	—	`conf`	Let there be light!: the future of memory systems is photonics and 3D stacking. MSPC Keren Bergman, Gilbert Hendry, Paul Hargrove, John Shalf, Bruce L. Jacob, K. Scott Hemmert, Arun Rodrigues, David R. Resnick
2011	J	`jnl`	The structural simulation toolkit. SIGMETRICS Perform. Evaluation Rev. Arun F. Rodrigues, K. Scott Hemmert, Brian W. Barrett, Chad D. Kersey, Ron A. Oldfield, M. Weston, R. Risen, J. Cook, Paul Rosenfeld, E. CooperBalls, Bruce L. Jacob
2010	J	`jnl`	Fine-Grained Activation for Power Reduction in DRAM. IEEE Micro Elliott Cooper-Balis, Bruce L. Jacob
2009	—	`book`	The Memory System: You Can't Avoid It, You Can't Ignore It, You Can't Fake It The Memory System Bruce L. Jacob
2009	A*	`conf`	The performance of PC solid-state disks (SSDs) as a function of bandwidth, concurrency, device architecture, and system organization. ISCA Cagdas Dirik, Bruce L. Jacob
2008	J	`jnl`	Accurate and fast system-level power modeling: An XScale-based case study. ACM Trans. Embed. Comput. Syst. Ankush Varma, Eric Debes, Igor Kozintsev, Paul Klein, Bruce L. Jacob
2008	—	`book`	Memory Systems: Cache, DRAM, Disk Bruce L. Jacob, Spencer W. Ng, David T. Wang
2007	J	`jnl`	Accurate and fast system-level power modeling: An XScale-based case study. ACM Trans. Embed. Comput. Syst. Ankush Varma, Bruce L. Jacob, Eric Debes, Igor Kozintsev, Paul Klein
2007	A*	`conf`	Fully-Buffered DIMM Memory Architectures: Understanding Mechanisms, Overheads and Scaling. HPCA Brinda Ganesh, Aamer Jaleel, David Wang, Bruce L. Jacob
2006	A	`conf`	Energy/power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm). ISLPED Samuel Rodríguez, Bruce L. Jacob
2006	J	`jnl`	In-Line Interrupt Handling and Lock-Up Free Translation Lookaside Buffers (TLBs). IEEE Trans. Computers Aamer Jaleel, Bruce L. Jacob
2006	A*	`conf`	Last level cache (LLC) performance of data mining workloads on a CMP - a case study of parallel bioinformatics workloads. HPCA Aamer Jaleel, Matthew Mattina, Bruce L. Jacob
2006	Misc	`conf`	Modeling heterogeneous SoCs with SystemC: a digital/MEMS case study. CASES Ankush Varma, Muhammad Yaqub Afridi, Akin Akturk, Paul Klein, Allen R. Hefner, Bruce L. Jacob
2005	B	`conf`	BioBench: A Benchmark Suite of Bioinformatics Applications. ISPASS Kursad Albayraktaroglu, Aamer Jaleel, Xue Wu, Manoj Franklin, Bruce L. Jacob, Chau-Wen Tseng, Donald Yeung
2005	J	`jnl`	DRAMsim: a memory system simulator. SIGARCH Comput. Archit. News David Wang, Brinda Ganesh, Nuengwong Tuaycharoen, Kathleen Baynes, Aamer Jaleel, Bruce L. Jacob
2005	—	`conf`	Performance characteristics of MAUI: an intelligent memory system architecture. Memory System Performance Justin Teller, Charles B. Silio Jr., Bruce L. Jacob
2005	—	`conf`	TERPS: the embedded reliable processing system. ASP-DAC Hongxia Wang, Samuel Rodríguez, Cagdas Dirik, Amol Gole, Vincent Chan, Bruce L. Jacob
2005	A*	`conf`	Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions. HPCA Aamer Jaleel, Bruce L. Jacob
2004	A*	`conf`	Extended Split-Issue: Enabling Flexibility in the Hardware Implementation of NUAL VLIW DSPs. ISCA Bharath Iyer, Sadagopan Srinivasan, Bruce L. Jacob
2003	J	`jnl`	A Case for Studying DRAM Issues at the System Level. IEEE Micro Bruce L. Jacob
2003	Misc	`conf`	A control-theoretic approach to dynamic voltage scheduling. CASES Ankush Varma, Brinda Ganesh, Mainak Sen, Suchismita Roy Choudhury, Lakshmi Srinivasan, Bruce L. Jacob
2003	Misc	`conf`	Hardware support for real-time operating systems. CODES+ISSS Paul Kohout, Brinda Ganesh, Bruce L. Jacob
2003	J	`jnl`	Introduction to the two special issues on memory. ACM Trans. Embed. Comput. Syst. Bruce L. Jacob, Shuvra S. Bhattacharyya
2003	J	`jnl`	The Performance and Energy Consumption of Embedded Real-Time Operating Systems. IEEE Trans. Computers Kathleen Baynes, Chris Collins, Eric Fiterman, Brinda Ganesh, Paul Kohout, Christine Smit, Tiebing Zhang, Bruce L. Jacob
2002	J	`jnl`	Introduction to the two special issues on memory. ACM Trans. Embed. Comput. Syst. Bruce L. Jacob, Shuvra S. Bhattacharyya
2001	A*	`conf`	Concurrency, latency, or system overhead: which has the largest impact on uniprocessor DRAM-system performance?. ISCA Vinodh Cuppu, Bruce L. Jacob
2001	J	`jnl`	High-Performance DRAMs in Workstation Environments. IEEE Trans. Computers Vinodh Cuppu, Bruce L. Jacob, Brian Davis, Trevor N. Mudge
2001	Misc	`conf`	Improving the Precise Interrupt Mechanism of Software-Managed TLB Miss Handlers. HiPC Aamer Jaleel, Bruce L. Jacob
2001	C	`conf`	In-Line Interrupt Handling for Software-Managed TLBs. ICCD Aamer Jaleel, Bruce L. Jacob
2001	Misc	`conf`	The performance and energy consumption of three embedded real-time operating systems. CASES Kathleen Baynes, Chris Collins, Eric Fiterman, Brinda Ganesh, Paul Kohout, Christine Smit, Tiebing Zhang, Bruce L. Jacob
2001	Misc	`conf`	Transparent data-memory organizations for digital signal processors. CASES Sadagopan Srinivasan, Vinodh Cuppu, Bruce L. Jacob
2001	J	`jnl`	Uniprocessor Virtual Memory without TLBs. IEEE Trans. Computers Bruce L. Jacob, Trevor N. Mudge
2000	—	`conf`	The New DRAM Interfaces: SDRAM, RDRAM and Variants. ISHPC Brian Davis, Bruce L. Jacob, Trevor N. Mudge
1999	A*	`conf`	A Performance Comparison of Contemporary DRAM Architectures. ISCA Vinodh Cuppu, Bruce L. Jacob, Brian Davis, Trevor N. Mudge
1999	A*	`conf`	Fifth Annual Workshop on Computer Education. HPCA David R. Kaeli, Bruce L. Jacob
1998	A*	`conf`	A Look at Several Memory Management Units, TLB-Refill Mechanisms, and Page Table Organizations. ASPLOS Bruce L. Jacob, Trevor N. Mudge
1998	J	`jnl`	Virtual Memory: Issues of Implementation. Computer Bruce L. Jacob, Trevor N. Mudge
1998	J	`jnl`	Virtual memory in contemporary microprocessors. IEEE Micro Bruce L. Jacob, Trevor N. Mudge
1997	J	`jnl`	A Comment on "An Analytical Model for Designing Memory Hierarchies". IEEE Trans. Computers Bruce L. Jacob, Peter M. Chen, Seth R. Silverman, Trevor N. Mudge
1997	A*	`conf`	Software-Managed Address Translation. HPCA Bruce L. Jacob, Trevor N. Mudge
1997	—	`—`	Software-oriented memory-management design. Bruce L. Jacob
1996	J	`jnl`	An Analytical Model for Designing Memory Hierarchies. IEEE Trans. Computers Bruce L. Jacob, Peter M. Chen, Seth R. Silverman, Trevor N. Mudge
1996	—	`conf`	The ACM SIGOPS European Workshop Bruce L. Jacob, Trevor N. Mudge
1995	—	`conf`	Composing with Genetic Algorithms. ICMC Bruce L. Jacob