Bram Nauta - RankMe

237 papers C 11Journal 138Unranked 88

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A 1-8 GHz, 190MHz BB BW Mixer-First Receiver With Bootstrapped Mixer Switches Achieving Over 16dBm In-Band IIP IEEE J. Solid State Circuits Erwin Hardeveld, Ronan A. R. van der Zee, Bram Nauta
2026	J	`jnl`	A Programmable Resolution Digital-to-Frequency or Period Converter With Sawtooth-Based Jitter Reduction. IEEE J. Solid State Circuits Nimit Jain, Eric A. M. Klumperink, Harm van Rumpt, Bram Nauta
2025	J	`jnl`	A 0.4-0.9 V Supply Voltage-Flexible Third-Order Passive ΔΣ Modulator With Switched-Capacitor Loop Filter Achieving 71.9 dB Peak SNDR at 4 MHz Bandwidth. IEEE Trans. Circuits Syst. I Regul. Pap. Jeroen Ponte, Harijot Singh Bindra, Bram Nauta
2025	J	`jnl`	A 12.8-GS/s Time-Interleaved Sub-Sampling ADC Front End With 38-GHz Input Bandwidth and >39-dB SNDR for 1-32 GHz in 22-nm FDSOI. IEEE J. Solid State Circuits Josef Heel, Harijot Singh Bindra, Simon M. Louwsma, Alessandro Dezzani, Bram Nauta
2025	—	`conf`	A 12.8GS/s Sub-Sampling ADC Front-End With 38GHz Input Bandwidth and >39dB SNDR for 1 to 32GHz in 22nm FDSOI. ISSCC Josef Heel, Harijot Singh Bindra, Simon M. Louwsma, Alessandro Dezzani, Bram Nauta
2025	J	`jnl`	A Capacitive Stacking Mixer-First Receiver With Higher Order Capacitive Feedback. IEEE J. Solid State Circuits Stef van Zanten, Ronan A. R. van der Zee, Bram Nauta
2025	J	`jnl`	A Dual-Alternating-Slope Digital-to-Time Converter Leveraging Mismatch to Improve Delay Step Size. IEEE J. Solid State Circuits Nimit Jain, Eric A. M. Klumperink, Harm van Rumpt, Bram Nauta
2025	J	`jnl`	A Programmable Filtering and Frequency Translation by Aliasing IF Receiver With Alias and Harmonic Rejection. IEEE J. Solid State Circuits Viswesh Kendae Ramkumar, Maikel Huiskamp, Harijot Singh Bindra, Eric A. M. Klumperink, Bram Nauta
2025	J	`jnl`	Analysis and Design of a Low-Loss 1-10 GHz Capacitive Stacking N-Path Filter/Mixer. IEEE J. Solid State Circuits Emiel Zijlma, Stef van Zanten, Roel Plompen, Eric A. M. Klumperink, Ronan A. R. van der Zee, Bram Nauta
2025	J	`jnl`	Dual-Junction Monolithically Integrated Monitoring Photodiode With a Two-Stage 18 GHz 18 pA/√Hz TIA in 22-nm FDSOI. IEEE Solid State Circuits Lett. Jelle H. T. Bakker, Nimit Jain, Paul Klatser, Mark S. Oude Alink, Bram Nauta
2025	J	`jnl`	Selectivity Versus Noise Trade-Offs in Resistively Driven Passive Switched-Capacitor Infinite Impulse Response Low-Pass Filters. IEEE Trans. Circuits Syst. I Regul. Pap. Roel Plompen, Jeroen Ponte, Stef van Zanten, Eric A. M. Klumperink, Bram Nauta
2024	—	`conf`	1.2 Racing Down the Slopes of Moore's Law. ISSCC Bram Nauta
2024	—	`conf`	5.5 A Stacking Mixer-First Receiver Achieving >20dBm Adjacent-Channel IIP3 Consuming less than 25mW. ISSCC Stef van Zanten, Ronan A. R. van der Zee, Bram Nauta
2023	—	`conf`	A 50μW 2.45GHz Direct-Conversion RX with On-Chip LO with -84dBm Sensitivity for 1Mb/s GFSK. ESSCIRC Maryam Dodangeh, Mark S. Oude Alink, Jan Prummel, Bram Nauta
2023	J	`jnl`	A Predistortion-Less Digital MIMO Transmitter With DTC-Based Quadrature Imbalance Compensation. IEEE J. Solid State Circuits Joep Zanen, Eric A. M. Klumperink, Bram Nauta
2023	J	`jnl`	A Single-Trim Frequency Reference System With 0.7 ppm/°C From -63 °C to 165 °C Consuming 210 μW at 70 MHz. IEEE J. Solid State Circuits Alexander S. Delke, Thomas J. Hoen, Anne-Johan Annema, Yanyu Jin, Jos Verlinden, Bram Nauta
2023	—	`conf`	Characterisation of Photodiodes in 22 nm FDSOI at 850 nm. ESSDERC Jelle H. T. Bakker, Mark S. Oude Alink, Jurriaan Schmitz, Bram Nauta
2023	J	`jnl`	Hardware Implementations for Voice Activity Detection: Trends, Challenges and Outlook. IEEE Trans. Circuits Syst. I Regul. Pap. Shubham Yadav, Patrice Abbie D. Legaspi, Mark S. Oude Alink, André B. J. Kokkeler, Bram Nauta
2023	C	`conf`	Inverter Chain Buffer Optimization for N-path Filter Switch Drivers and Validation through Simulations in 22nm FD-SOI Technology. ISCAS Wouter T. Overeem, Mark S. Oude Alink, Bram Nauta
2022	—	`conf`	A 174μVRMS Input Noise, 1 G8/s Comparator in 22nm FDSOI with a Dynamic-Bias Preamplifier Using Tail Charge Pump and Capacitive Neutralization Across the Latch. ISSCC Harijot Singh Bindra, Jeroen Ponte, Bram Nauta
2022	J	`jnl`	A 22-nm FDSOI CMOS Low-Noise Active Balun Achieving IEEE J. Solid State Circuits Anoop Narayan Bhat, Ronan A. R. van der Zee, Bram Nauta
2022	J	`jnl`	Low-Power High-Linearity Mixer-First Receiver Using Implicit Capacitive Stacking With 3× Voltage Gain. IEEE J. Solid State Circuits Vijaya Kumar Purushothaman, Eric A. M. Klumperink, Roel Plompen, Bram Nauta
2022	—	`conf`	Quantifying the Trade-off Between Latency and Power Consumption in Bluetooth Low Energy and Its Mitigation by Using a Wake-Up Receiver. WF-IoT Maryam Dodangeh, Mark S. Oude Alink, Bram Nauta
2022	J	`jnl`	Reconstructing Aliased Frequency Spectra by Using Multiple Sample Rates. IEEE Trans. Circuits Syst. I Regul. Pap. Maikel Huiskamp, Mark S. Oude Alink, Bram Nauta, Anne-Johan Annema, Harijot Singh Bindra
2021	J	`jnl`	2.4-GHz Highly Selective IoT Receiver Front End With Power Optimized LNTA, Frequency Divider, and Baseband Analog FIR Filter. IEEE J. Solid State Circuits Bart J. Thijssen, Eric A. M. Klumperink, Philip Quinlan, Bram Nauta
2021	J	`jnl`	A 0.7-5.7 GHz Reconfigurable MIMO Receiver Architecture for Analog Spatial Notch Filtering Using Orthogonal Beamforming. IEEE J. Solid State Circuits Sajad Golabighezelahmad, Eric A. M. Klumperink, Bram Nauta
2021	J	`jnl`	A Baseband-Matching-Resistor Noise-Canceling Receiver With a Three-Stage Inverter-Only OpAmp for High In-Band IIP3 and Wide IF Applications. IEEE J. Solid State Circuits Anoop Narayan Bhat, Ronan A. R. van der Zee, Bram Nauta
2021	J	`jnl`	A Single-Trim Frequency Reference Achieving ±120 ppm Accuracy From -50 °C to 170 °C. IEEE J. Solid State Circuits Alexander S. Delke, Anne-Johan Annema, Mark S. Oude Alink, Yanyu Jin, Jos Verlinden, Bram Nauta
2021	J	`jnl`	Compensating Processing Delay in Excess of One Clock Cycle in Noise Shaping Loops Without Altering the Filter Topology. IEEE Access Christiaan E. Lokin, Daniël Schinkel, Ronan A. R. van der Zee, Bram Nauta
2021	J	`jnl`	Energy Efficient Startup of Crystal Oscillators Using Stepwise Charging. IEEE J. Solid State Circuits Joeri Lechevallier, Harijot Singh Bindra, Ronan A. R. van der Zee, Bram Nauta
2021	J	`jnl`	Multi-Receiver Cross-Correlation Technique for (B)FSK Radios. IEEE Access Vijaya Kumar Purushothaman, Mina R. M. Mikhael, Mark S. Oude Alink, Eric A. M. Klumperink, André B. J. Kokkeler, Bram Nauta
2021	J	`jnl`	Power Efficiency Model for MIMO Transmitters Including Memory Polynomial Digital Predistortion. IEEE Trans. Circuits Syst. II Express Briefs Joep Zanen, Eric A. M. Klumperink, Bram Nauta
2020	—	`conf`	30.4 A 370µW 5.5dB-NF BLE/BT5.0/IEEE 802.15.4-Compliant Receiver with >63dB Adjacent Channel Rejection at >2 Channels Offset in 22nm FDSOI. ISSCC Bart J. Thijssen, Eric A. M. Klumperink, Philip Quinlan, Bram Nauta
2020	—	`conf`	A Colpitts-Based Frequency Reference Achieving a Single-Trim ± 120ppm Accuracy from -50 to 170°C. CICC Alexander S. Delke, Anne-Johan Annema, Mark S. Oude Alink, Yanyu Jin, Jos Verlinden, Bram Nauta
2020	J	`jnl`	A Fully Passive RF Front End With 13-dB Gain Exploiting Implicit Capacitive Stacking in a Bottom-Plate N-Path Filter/Mixer. IEEE J. Solid State Circuits Vijaya Kumar Purushothaman, Eric A. M. Klumperink, Berta Trullas Clavera, Bram Nauta
2020	J	`jnl`	Analysis of Switched Capacitor Losses in Polar and Quadrature Switched Capacitor PAs. IEEE Trans. Circuits Syst. II Express Briefs Joep Zanen, Eric A. M. Klumperink, Bram Nauta
2020	J	`jnl`	EMI Reduction in Class-D Amplifiers by Actively Reducing PWM Ripple. IEEE Trans. Circuits Syst. I Regul. Pap. Christiaan E. Lokin, Ronan A. R. van der Zee, Daniël Schinkel, Bram Nauta
2020	—	`conf`	EVM-based Performance Evaluation of Co-channel Interference Mitigation using Spatial Filtering for Digital MIMO Receivers. VTC Fall Sajad Golabighezelahmad, Eric A. M. Klumperink, Bram Nauta
2020	J	`jnl`	Low-Power Highly Selective Channel Filtering Using a Transconductor-Capacitor Analog FIR. IEEE J. Solid State Circuits Bart J. Thijssen, Eric A. M. Klumperink, Philip Quinlan, Bram Nauta
2020	J	`jnl`	Theory and Implementation of a Load-Mismatch Protective Class-E PA System. IEEE Trans. Circuits Syst. I Regul. Pap. Jeroen Ponte, Ali Ghahremani, Maikel Huiskamp, Anne-Johan Annema, Bram Nauta
2019	J	`jnl`	A +20 dBm Highly Efficient Linear Outphasing Class-E PA Without AM/AM and AM/PM Characterization Requirements. IEEE Trans. Circuits Syst. II Express Briefs Ali Ghahremani, Anne-Johan Annema, Bram Nauta
2019	—	`conf`	A 0.06-3.4-MHz 92-μW Analog FIR Channel Selection Filter With Very Sharp Transition Band for IoT Receivers. ESSCIRC Bart J. Thijssen, Eric A. M. Klumperink, Philip Quinlan, Bram Nauta
2019	—	`conf`	A 0.2 - 8 MS/s 10b flexible SAR ADC achieving 0.35 - 2.5 fJ/conv-step and using self-quenched dynamic bias comparator. VLSI Circuits Harijot Singh Bindra, Anne-Johan Annema, Simon M. Louwsma, Bram Nauta
2019	—	`conf`	A 4MS/s 10b SAR ADC with integrated Class-A buffers in 65nm CMOS with near rail-to-rail input using a single 1.2V supply. CICC Harijot Singh Bindra, Anne-Johan Annema, Gerard Wienk, Bram Nauta, Simon M. Louwsma
2019	J	`jnl`	A Self-Oscillating Boosting Amplifier With Adaptive Soft Switching Control for Piezoelectric Transducers. IEEE J. Solid State Circuits Saifullah Amir, Ronan A. R. van der Zee, Bram Nauta
2019	J	`jnl`	Digital-to-Frequency Converters With a DTC: Theoretical Analysis of the Output SFDR. IEEE Trans. Circuits Syst. I Regul. Pap. Claudia Palattella, Eric A. M. Klumperink, Mark S. Oude Alink, Bram Nauta
2019	J	`jnl`	Fast & Energy Efficient Start-Up of Crystal Oscillators by Self-Timed Energy Injection. IEEE J. Solid State Circuits Joeri Lechevallier, Ronan A. R. van der Zee, Bram Nauta
2019	J	`jnl`	High-Linearity Bottom-Plate Mixing Technique With Switch Sharing for N-path Filters/Mixers. IEEE J. Solid State Circuits Yuanching Lien, Eric A. M. Klumperink, Bernard Tenbroek, Jon Strange, Bram Nauta
2019	J	`jnl`	Improving Receiver Close-In Blocker Tolerance by Baseband G IEEE Trans. Circuits Syst. I Regul. Pap. Mohammed Abdulaziz, Eric A. M. Klumperink, Bram Nauta, Henrik Sjöland
2018	J	`jnl`	A 1.2-V Dynamic Bias Latch-Type Comparator in 65-nm CMOS With 0.4-mV Input Noise. IEEE J. Solid State Circuits Harijot Singh Bindra, Chris E. Lokin, Daniël Schinkel, Anne-Johan Annema, Bram Nauta
2018	J	`jnl`	A 2.4-GHz 16-Phase Sub-Sampling Fractional-N PLL With Robust Soft Loop Switching. IEEE J. Solid State Circuits Dongyi Liao, Fa Foster Dai, Bram Nauta, Eric A. M. Klumperink
2018	J	`jnl`	A Delay Spread Cancelling Waveform Characterizer for RF Power Amplifiers. IEEE Trans. Circuits Syst. II Express Briefs Maikel Huiskamp, Anne-Johan Annema, Bram Nauta
2018	—	`conf`	Augmentation of Class-E PA Reliability under Load Mismatch Conditions. ICECS Jeroen Ponte, Ali Ghahremani, Maikel Huiskamp, Anne-Johan Annema, Bram Nauta
2018	J	`jnl`	Enhanced-Selectivity High-Linearity Low-Noise Mixer-First Receiver With Complex Pole Pair Due to Capacitive Positive Feedback. IEEE J. Solid State Circuits Yuanching Lien, Eric A. M. Klumperink, Bernard Tenbroek, Jon Strange, Bram Nauta
2018	J	`jnl`	Feedforward Phase Noise Cancellation Exploiting a Sub-Sampling Phase Detector. IEEE Trans. Circuits Syst. II Express Briefs Bart J. Thijssen, Eric A. M. Klumperink, Philip Quinlan, Bram Nauta
2018	J	`jnl`	Outphasing Class-E Power Amplifiers: From Theory to Back-Off Efficiency Improvement. IEEE J. Solid State Circuits Ali Ghahremani, Anne-Johan Annema, Bram Nauta
2017	—	`conf`	24.3 A high-linearity CMOS receiver achieving +44dBm IIP3 and +13dBm B1dB for SAW-less LTE radio. ISSCC Yuanching Lien, Eric A. M. Klumperink, Bernard Tenbroek, Jon Strange, Bram Nauta
2017	—	`conf`	A 30fJ/comparison dynamic bias comparator. ESSCIRC Harijot Singh Bindra, Chris E. Lokin, Anne-Johan Annema, Bram Nauta
2017	—	`conf`	A digital sine-weighted switched-Gm mixer for single-clock power-scalable parallel receivers. CICC Reda Kasri, Eric A. M. Klumperink, Philippe Cathelin, Eric Toumier, Bram Nauta
2017	—	`conf`	An energy reduced sampling technique applied to a 10b 1MS/s SAR ADC. ESSCIRC Harijot Singh Bindra, Anne-Johan Annema, Simon M. Louwsma, Ed J. M. van Tuijl, Bram Nauta
2017	J	`jnl`	Beamformer With Constant-Gm Vector Modulators and Its Spatial Intermodulation Distortion. IEEE J. Solid State Circuits Michiel C. M. Soer, Eric A. M. Klumperink, Dirk-Jan van den Broek, Bram Nauta, Frank E. van Vliet
2017	J	`jnl`	Hardware Implementation Overhead of Switchable Matching Networks. IEEE Trans. Circuits Syst. I Regul. Pap. Ettore Lorenzo Firrao, Anne-Johan Annema, Frank E. van Vliet, Bram Nauta
2017	—	`conf`	Multi-phase sub-sampling fractional-N PLL with soft loop switching for fast robust locking. CICC Dongyi Liao, Fa Foster Dai, Bram Nauta, Eric A. M. Klumperink
2017	—	`conf`	N-path filters and mixer-first receivers: A review. CICC Eric A. M. Klumperink, Hugo J. Westerveld, Bram Nauta
2017	—	`conf`	Range pre-selection sampling technique to reduce input drive energy for SAR ADCs. A-SSCC Harijot Singh Bindra, Joeri Lechevallier, Anne-Johan Annema, Simon M. Louwsma, Ed van Tuijl, Bram Nauta
2016	—	`conf`	26.2 An Ultra-Low-Power receiver using transmitted-reference and shifted limiters for in-band interference resilience. ISSCC Dawei Ye, Ronan A. R. van der Zee, Bram Nauta
2016	J	`jnl`	A 915 MHz 175 µW Receiver Using Transmitted-Reference and Shifted Limiters for 50 dB In-Band Interference Tolerance. IEEE J. Solid State Circuits Dawei Ye, Ronan A. R. van der Zee, Bram Nauta
2016	J	`jnl`	Introduction to the Special Issue on the 41st European Solid-State Circuits Conference (ESSCIRC). IEEE J. Solid State Circuits Andrea Mazzanti, Bram Nauta, Stefan Rusu
2016	—	`conf`	Random Telegraph Signal phenomena in avalanche mode diodes: Application to SPADs. ESSDERC Vishal Agarwal, Anne-Johan Annema, Satadal Dutta, Raymond J. E. Hueting, Lis K. Nanver, Bram Nauta
2015	—	`conf`	19.2 A self-interference-cancelling receiver for in-band full-duplex wireless with low distortion under cancellation of strong TX leakage. ISSCC Dirk-Jan van den Broek, Eric A. M. Klumperink, Bram Nauta
2015	—	`conf`	5.5 A forward-body-bias tuned 450MHz Gm-C 3 ISSCC Joeri Lechevallier, Remko E. Struiksma, Hani Sherry, Andreia Cathelin, Eric A. M. Klumperink, Bram Nauta
2015	J	`jnl`	A High-Linearity Digital-to-Time Converter Technique: Constant-Slope Charging. IEEE J. Solid State Circuits Jiayoon Zhiyu Ru, Claudia Palattella, Paul F. J. Geraedts, Eric A. M. Klumperink, Bram Nauta
2015	J	`jnl`	A High-Voltage Class-D Power Amplifier With Switching Frequency Regulation for Improved High-Efficiency Output Power Range. IEEE J. Solid State Circuits Haifeng Ma, Ronan A. R. van der Zee, Bram Nauta
2015	J	`jnl`	A Sensitive Method to Measure the Integral Nonlinearity of a Digital-to-Time Converter Based on Phase Modulation. IEEE Trans. Circuits Syst. II Express Briefs Claudia Palattella, Eric A. M. Klumperink, Jiayun Ru, Bram Nauta
2015	J	`jnl`	An In-Band Full-Duplex Radio Receiver With a Passive Vector Modulator Downmixer for Self-Interference Cancellation. IEEE J. Solid State Circuits Dirk-Jan van den Broek, Eric A. M. Klumperink, Bram Nauta
2015	J	`jnl`	An Interleaved Full Nyquist High-Speed DAC Technique. IEEE J. Solid State Circuits Erik Olieman, Anne-Johan Annema, Bram Nauta
2015	J	`jnl`	Analysis of the Signal Transfer and Folding in N-Path Filters With a Series Inductance. IEEE Trans. Circuits Syst. I Regul. Pap. Lammert Duipmans, Remko E. Struiksma, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet
2015	J	`jnl`	Compact Cascadable g m -C All-Pass True Time Delay Cell With Reduced Delay Variation Over Frequency. IEEE J. Solid State Circuits Seyed Kasra Garakoui, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet
2015	—	`conf`	In-band full-duplex transceiver technology for 5G mobile networks. ESSCIRC Björn Debaillie, Barend van Liempd, Benjamin P. Hershberg, Jan Craninckx, Kari Rikkinen, D. J. van den Broek, Eric A. M. Klumperink, Bram Nauta
2015	—	`conf`	Multiphase RF techniques in CMOS: Applied to beam-forming and full duplex receivers: CICC 2015 educational session. CICC Bram Nauta
2015	J	`jnl`	On the Minimum Number of States for Switchable Matching Networks. IEEE Trans. Circuits Syst. I Regul. Pap. Ettore Lorenzo Firrao, Anne-Johan Annema, Frank E. van Vliet, Bram Nauta
2015	J	`jnl`	RF Transconductor Linearization Robust to Process, Voltage and Temperature Variations. IEEE J. Solid State Circuits Harish Kundur Subramaniyan, Eric A. M. Klumperink, Venkatesh Srinivasan, Ali Kiaei, Bram Nauta
2015	—	`conf`	Sub-sampling PLL techniques. CICC Xiang Gao, Eric A. M. Klumperink, Bram Nauta
2014	—	`conf`	17.1 An integrated 80V 45W class-D power amplifier with optimal-efficiency-tracking switching frequency regulation. ISSCC Haifeng Ma, Ronan A. R. van der Zee, Bram Nauta
2014	—	`conf`	3.5 A 1.0-to-2.5GHz beamforming receiver with constant-Gm vector modulator consuming. ISSCC Michiel C. M. Soer, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet
2014	J	`jnl`	A 100-800 MHz 8-Path Polyphase Transmitter With Mixer Duty-Cycle Control Achieving <-40 dBc for ALL Harmonics. IEEE J. Solid State Circuits Saqib Subhan, Eric A. M. Klumperink, Amir Ghaffari, Gerard J. M. Wienk, Bram Nauta
2014	—	`conf`	A 110mW, 0.04mm VLSIC Erik Olieman, Anne-Johan Annema, Bram Nauta
2014	J	`jnl`	A 4-Element Phased-Array System With Simultaneous Spatial- and Frequency-Domain Filtering at the Antenna Inputs. IEEE J. Solid State Circuits Amir Ghaffari, Eric A. M. Klumperink, Frank E. van Vliet, Bram Nauta
2014	—	`conf`	A 500MHz- 2.7 GHz 8-path weaver downconverter with harmonic rejection and embedded filtering. ESSCIRC Remko E. Struiksma, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet
2014	J	`jnl`	An Ultra Low Energy FSK Receiver With In-Band Interference Robustness Exploiting a Three-Phase Chirped LO. IEEE J. Emerg. Sel. Topics Circuits Syst. Ramen Dutta, Ronan A. R. van der Zee, André B. J. Kokkeler, Mark J. Bentum, Eric A. M. Klumperink, Bram Nauta
2014	J	`jnl`	Analog/RF Solutions Enabling Compact Full-Duplex Radios. IEEE J. Sel. Areas Commun. Björn Debaillie, Dirk-Jan van den Broek, Cristina Lavin, Barend van Liempd, Eric A. M. Klumperink, Carmen Palacios, Jan Craninckx, Bram Nauta, Aarno Pärssinen
2014	J	`jnl`	Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity. IEEE J. Solid State Circuits Dlovan H. Mahrof, Eric A. M. Klumperink, Zhiyu Ru, Mark S. Oude Alink, Bram Nauta
2014	J	`jnl`	Comments on "Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity". IEEE J. Solid State Circuits P. V. Ananda Mohan, Eric A. M. Klumperink, Dlovan H. Mahrof, Bram Nauta
2014	J	`jnl`	Design and Analysis of a High-Efficiency High-Voltage Class-D Power Output Stage. IEEE J. Solid State Circuits Haifeng Ma, Ronan A. R. van der Zee, Bram Nauta
2014	—	`conf`	RF transconductor linearization technique robust to process, voltage and temperature variations. A-SSCC Harish Kundur Subramaniyan, Eric A. M. Klumperink, Bram Nauta, Venkatesh Srinivasan, Ali Kiaei
2014	—	`conf`	Reconfigurable SDR front-end techniques. CICC Bram Nauta
2014	J	`jnl`	Software defined radio receivers exploiting noise cancelling: A tutorial review. IEEE Commun. Mag. Eric A. M. Klumperink, Bram Nauta
2014	J	`jnl`	Towards minimum achievable phase noise of relaxation oscillators. Int. J. Circuit Theory Appl. Paul F. J. Geraedts, Ed J. M. van Tuijl, Eric A. M. Klumperink, Gerard J. M. Wienk, Bram Nauta
2013	—	`conf`	A 0.1-to-1.2GHz tunable 6th-order N-path channel-select filter with 0.6dB passband ripple and +7dBm blocker tolerance. ISSCC Milad Darvishi, Ronan A. R. van der Zee, Bram Nauta
2013	J	`jnl`	A Flicker Noise/IM3 Cancellation Technique for Active Mixer Using Negative Impedance. IEEE J. Solid State Circuits Wei Cheng, Anne-Johan Annema, Gerard Wienk, Bram Nauta
2013	J	`jnl`	A Wideband IM3 Cancellation Technique for CMOS Π- and T-Attenuators. IEEE J. Solid State Circuits Wei Cheng, Mark S. Oude Alink, Anne-Johan Annema, Gerard Wienk, Bram Nauta
2013	—	`conf`	An integrated 80-V class-D power output stage with 94% efficiency in a 0.14µm SOI BCD process. ESSCIRC Haifeng Ma, Ronan A. R. van der Zee, Bram Nauta
2013	J	`jnl`	Design of Active N-Path Filters. IEEE J. Solid State Circuits Milad Darvishi, Ronan A. R. van der Zee, Bram Nauta
2013	—	`conf`	EP1: Antiques from the innovations attic. ISSCC Trudy Stetzler, Anantha P. Chandrakasan, Bram Nauta
2013	J	`jnl`	Flip-Flops for Accurate Multiphase Clocking: Transmission Gate Versus Current Mode Logic. IEEE Trans. Circuits Syst. II Express Briefs Ramen Dutta, Eric A. M. Klumperink, Xiang Gao, Zhiyu Ru, Ronan A. R. van der Zee, Bram Nauta
2013	J	`jnl`	Frequency Limitations of First-Order g IEEE Trans. Circuits Syst. II Express Briefs Seyed Kasra Garakoui, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet
2013	—	`conf`	International technical program committee. ISSCC Bram Nauta, Trudy Stetzler
2013	—	`conf`	Session 1 overview: Plenary session. ISSCC Anantha P. Chandrakasan, Bram Nauta
2013	—	`conf`	Simultaneous spatial and frequency-domain filtering at the antenna inputs achieving up to +10dBm out-of-band/beam P1dB. ISSCC Amir Ghaffari, Eric A. M. Klumperink, Frank E. van Vliet, Bram Nauta
2013	J	`jnl`	Spectrum Sensing With High Sensitivity and Interferer Robustness Using Cross-Correlation Energy Detection. IEEE J. Emerg. Sel. Topics Circuits Syst. Mark S. Oude Alink, André B. J. Kokkeler, Eric A. M. Klumperink, Gerard J. M. Smit, Bram Nauta
2013	J	`jnl`	Tunable N-Path Notch Filters for Blocker Suppression: Modeling and Verification. IEEE J. Solid State Circuits Amir Ghaffari, Eric A. M. Klumperink, Bram Nauta
2012	—	`conf`	8-Path tunable RF notch filters for blocker suppression. ISSCC Amir Ghaffari, Eric A. M. Klumperink, Bram Nauta
2012	—	`conf`	A 0.3-to-1.2GHz tunable 4 ISSCC Milad Darvishi, Ronan A. R. van der Zee, Eric A. M. Klumperink, Bram Nauta
2012	—	`conf`	A 1-to-2.5GHz phased-array IC based on gm-RC all-pass time-delay cells. ISSCC Seyed Kasra Garakoui, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet
2012	—	`conf`	A 1.5-to-5.0GHz input-matched +2dBm P1dB all-passive switched-capacitor beamforming receiver front-end in 65nm CMOS. ISSCC Michiel C. M. Soer, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet
2012	—	`conf`	A 65nm CMOS 1-to-10GHz tunable continuous-time low-pass filter for high-data-rate communications. ISSCC Fawzi Houfaf, Mathieu Egot, Andreas Kaiser, Andreia Cathelin, Bram Nauta
2012	J	`jnl`	A CMOS-Compatible Spectrum Analyzer for Cognitive Radio Exploiting Crosscorrelation to Improve Linearity and Noise Performance. IEEE Trans. Circuits Syst. I Regul. Pap. Mark S. Oude Alink, Eric A. M. Klumperink, André B. J. Kokkeler, Michiel C. M. Soer, Gerard J. M. Smit, Bram Nauta
2012	—	`conf`	A wideband IM3 cancellation technique for CMOS attenuators. ISSCC Wei Cheng, Mark S. Oude Alink, Anne-Johan Annema, Gerard Wienk, Bram Nauta
2012	J	`jnl`	Active Feedback Technique for RF Channel Selection in Front-End Receivers. IEEE J. Solid State Circuits Shadi Youssef, Ronan A. R. van der Zee, Bram Nauta
2012	—	`conf`	Active feedback receiver with integrated tunable RF channel selectivity, distortion cancelling, 48dB stopband rejection and >+12dBm wideband IIP3, occupying ISSCC Shadi Youssef, Ronan A. R. van der Zee, Bram Nauta
2012	—	`conf`	Direct-digital modulation (DIDIMO) transmitter with -156dBc/Hz Rx-band noise using FIR structure. ESSCIRC Shuichi Fukuda, Shinji Miya, Miho Io, Koichi Hamashita, Bram Nauta
2012	—	`conf`	Improving harmonic rejection for spectrum sensing using crosscorrelation. ESSCIRC Mark S. Oude Alink, André B. J. Kokkeler, Eric A. M. Klumperink, Zhiyu Ru, Wei Cheng, Bram Nauta
2012	J	`jnl`	RF Circuit Linearity Optimization Using a General Weak Nonlinearity Model. IEEE Trans. Circuits Syst. I Regul. Pap. Wei Cheng, Mark S. Oude Alink, Anne-Johan Annema, Jeroen A. Croon, Bram Nauta
2012	J	`jnl`	Widely Tunable 4th Order Switched G IEEE J. Solid State Circuits Milad Darvishi, Ronan A. R. van der Zee, Eric A. M. Klumperink, Bram Nauta
2011	—	`conf`	A 1.0-to-4.0GHz 65nm CMOS four-element beamforming receiver using a switched-capacitor vector modulator with approximate sine weighting via charge redistribution. ISSCC Michiel C. M. Soer, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet
2011	J	`jnl`	A 65-nm CMOS Temperature-Compensated Mobility-Based Frequency Reference for Wireless Sensor Networks. IEEE J. Solid State Circuits Fabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Salvatore Drago, Domine Leenaerts, Bram Nauta
2011	—	`conf`	A narrow-to-wideband scrambling technique increasing software radio receiver linearity. ESSCIRC Fabian van Houwelingen, Ed van Tuijl, Bram Nauta, Maarten Vertregt
2011	—	`conf`	Effects of packaging and process spread on a mobility-based frequency reference in 0.16-μm CMOS. ESSCIRC Fabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Salvatore Drago, Domine Leenaerts, Bram Nauta
2011	—	`conf`	Exploring the Use of Two Antennas for Crosscorrelation Spectrum Sensing. VTC Fall Mark S. Oude Alink, A. R. Smeenge, André B. J. Kokkeler, Eric A. M. Klumperink, Gerard J. M. Smit, Bram Nauta
2011	C	`conf`	Jitter-Power minimization of digital frequency synthesis architectures. ISCAS Eric A. M. Klumperink, Ramen Dutta, Zhiyu Ru, Bram Nauta, Xiang Gao
2011	J	`jnl`	Lowering the SNR Wall for Energy Detection Using Cross-Correlation. IEEE Trans. Veh. Technol. Mark S. Oude Alink, André B. J. Kokkeler, Eric A. M. Klumperink, Gerard J. M. Smit, Bram Nauta
2011	J	`jnl`	Noise and Nonlinearity Modeling of Active Mixers for Fast and Accurate Estimation. IEEE Trans. Circuits Syst. I Regul. Pap. Wei Cheng, Anne-Johan Annema, Jeroen A. Croon, Bram Nauta
2011	J	`jnl`	Spatial Interferer Rejection in a Four-Element Beamforming Receiver Front-End With a Switched-Capacitor Vector Modulator. IEEE J. Solid State Circuits Michiel C. M. Soer, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet
2011	C	`conf`	Towards suppression of all harmonics in a polyphase multipath transmitter. ISCAS Saqib Subhan, Eric A. M. Klumperink, Bram Nauta
2011	J	`jnl`	Tunable High-Q N-Path Band-Pass Filters: Modeling and Verification. IEEE J. Solid State Circuits Amir Ghaffari, Eric A. M. Klumperink, Michiel C. M. Soer, Bram Nauta
2010	J	`jnl`	A 1.2-V 10-μ W NPN-Based Temperature Sensor in 65-nm CMOS With an Inaccuracy of 0.2°C (3 Sigma ) From - 70°C to 125°C. IEEE J. Solid State Circuits Fabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Salvatore Drago, Domine Leenaerts, Bram Nauta
2010	—	`conf`	A 1.2V 10µW NPN-based temperature sensor in 65nm CMOS with an inaccuracy of ±0.2°C (3s) from -70°C to 125°C. ISSCC Fabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Salvatore Drago, Domine Leenaerts, Bram Nauta
2010	J	`jnl`	A 10-bit Charge-Redistribution ADC Consuming 1.9 μ W at 1 MS/s. IEEE J. Solid State Circuits Michiel van Elzakker, Ed van Tuijl, Paul F. J. Geraedts, Daniël Schinkel, Eric A. M. Klumperink, Bram Nauta
2010	—	`conf`	A 2.4GHz 830pJ/bit duty-cycled wake-up receiver with -82dBm sensitivity for crystal-less wireless sensor nodes. ISSCC Salvatore Drago, Domine M. W. Leenaerts, Fabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Bram Nauta
2010	J	`jnl`	A 200 μA Duty-Cycled PLL for Wireless Sensor Nodes in 65 nm CMOS. IEEE J. Solid State Circuits Salvatore Drago, Domine Leenaerts, Bram Nauta, Fabio Sebastiano, Kofi A. A. Makinwa, Lucien J. Breems
2010	J	`jnl`	A 300-800 MHz Tunable Filter and Linearized LNA Applied in a Low-Noise Harmonic-Rejection RF-Sampling Receiver. IEEE J. Solid State Circuits Zhiyu Ru, Eric A. M. Klumperink, Carlos E. Saavedra, Bram Nauta
2010	—	`conf`	A 65-nm CMOS temperature-compensated mobility-based frequency reference for Wireless Sensor Networks. ESSCIRC Fabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Salvatore Drago, Domine Leenaerts, Bram Nauta
2010	J	`jnl`	Discrete-Time Mixing Receiver Architecture for RF-Sampling Software-Defined Radio. IEEE J. Solid State Circuits Zhiyu Ru, Eric A. M. Klumperink, Bram Nauta
2010	J	`jnl`	Power Efficient Gigabit Communication Over Capacitively Driven RC-Limited On-Chip Interconnects. IEEE J. Solid State Circuits Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
2010	J	`jnl`	Spur Reduction Techniques for Phase-Locked Loops Exploiting A Sub-Sampling Phase Detector. IEEE J. Solid State Circuits Xiang Gao, Eric A. M. Klumperink, Gerard Socci, Mounir Bohsali, Bram Nauta
2010	—	`conf`	Spur-reduction techniques for PLLs using sub-sampling phase detection. ISSCC Xiang Gao, Eric A. M. Klumperink, Gerard Socci, Mounir Bohsali, Bram Nauta
2010	C	`conf`	Time delay circuits: A quality criterion for delay variations versus frequency. ISCAS Seyed Kasra Garakoui, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet
2010	J	`jnl`	Unified Frequency-Domain Analysis of Switched-Series- RC Passive Mixers and Samplers. IEEE Trans. Circuits Syst. I Regul. Pap. Michiel C. M. Soer, Eric A. M. Klumperink, Pieter-Tjerk de Boer, Frank E. van Vliet, Bram Nauta
2009	—	`conf`	A 0.2-to-2.0GHz 65nm CMOS receiver without LNA achieving ≫11dBm IIP3 and ≪6.5 dB NF. ISSCC Michiel C. M. Soer, Eric A. M. Klumperink, Zhiyu Ru, Frank E. van Vliet, Bram Nauta
2009	—	`conf`	A 0.45pJ/conv-step 1.2Gs/s 6b full-Nyquist non-calibrated flash ADC in 45nm CMOS and its scaling behavior. ESSCIRC Paul Veldhorst, George Goksun, Anne-Johan Annema, Bram Nauta, Berry A. J. Buter, Maarten Vertregt
2009	—	`conf`	A 2.2GHz 7.6mW sub-sampling PLL with -126dBc/Hz in-band phase noise and 0.15psrms jitter in 0.18µm CMOS. ISSCC Xiang Gao, Eric A. M. Klumperink, Mounir Bohsali, Bram Nauta
2009	—	`conf`	A 200 µA duty-cycled PLL for wireless sensor nodes. ESSCIRC Salvatore Drago, Domine Leenaerts, Bram Nauta, Fabio Sebastiano, Kofi A. A. Makinwa, Lucien J. Breems
2009	—	`conf`	A 400-to-900 MHz receiver with dual-domain harmonic rejection exploiting adaptive interference cancellation. ISSCC Niels A. Moseley, Zhiyu Ru, Eric A. M. Klumperink, Bram Nauta
2009	J	`jnl`	A Low Noise Sub-Sampling PLL in Which Divider Noise is Eliminated and PD/CP Noise is Not Multiplied by N IEEE J. Solid State Circuits Xiang Gao, Eric A. M. Klumperink, Mounir Bohsali, Bram Nauta
2009	J	`jnl`	A Low-Voltage Mobility-Based Frequency Reference for Crystal-Less ULP Radios. IEEE J. Solid State Circuits Fabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Salvatore Drago, Domine M. W. Leenaerts, Bram Nauta
2009	J	`jnl`	A Wideband Supply Modulator for 20 MHz RF Bandwidth Polar PAs in 65 nm CMOS. IEEE J. Solid State Circuits Rameswor Shrestha, Ronan A. R. van der Zee, Anton de Graauw, Bram Nauta
2009	—	`conf`	A software-defined radio receiver architecture robust to out-of-band interference. ISSCC Zhiyu Ru, Eric A. M. Klumperink, Gerard Wienk, Bram Nauta
2009	—	`conf`	A sub-1V bandgap voltage reference in 32nm FinFET technology. ISSCC Anne-Johan Annema, Paul Veldhorst, Gerben Doornbos, Bram Nauta
2009	J	`jnl`	Digitally Enhanced Software-Defined Radio Receiver Robust to Out-of-Band Interference. IEEE J. Solid State Circuits Zhiyu Ru, Niels A. Moseley, Eric A. M. Klumperink, Bram Nauta
2009	J	`jnl`	Impulse-Based Scheme for Crystal-Less ULP Radios. IEEE Trans. Circuits Syst. I Regul. Pap. Salvatore Drago, Fabio Sebastiano, Lucien J. Breems, Domine Leenaerts, Kofi A. A. Makinwa, Bram Nauta
2009	J	`jnl`	Jitter Analysis and a Benchmarking Figure-of-Merit for Phase-Locked Loops. IEEE Trans. Circuits Syst. II Express Briefs Xiang Gao, Eric A. M. Klumperink, Paul F. J. Geraedts, Bram Nauta
2009	J	`jnl`	Low-Power, High-Speed Transceivers for Network-on-Chip Communication. IEEE Trans. Very Large Scale Integr. Syst. Daniël Schinkel, Eisse Mensink, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
2009	J	`jnl`	New Associate Editor. IEEE J. Solid State Circuits Bram Nauta
2009	J	`jnl`	New Associate Editor. IEEE J. Solid State Circuits Bram Nauta
2009	J	`jnl`	New Associate Editors. IEEE J. Solid State Circuits Bram Nauta
2009	J	`jnl`	Spurious-Free Dynamic Range of a Uniform Quantizer. IEEE Trans. Circuits Syst. II Express Briefs Mark S. Oude Alink, André B. J. Kokkeler, Eric A. M. Klumperink, Kenneth C. Rovers, Gerard J. M. Smit, Bram Nauta
2008	J	`jnl`	A 1.35 GS/s, 10 b, 175 mW Time-Interleaved AD Converter in 0.13 µm CMOS. IEEE J. Solid State Circuits Simon M. Louwsma, A. J. M. van Tuijl, Maarten Vertregt, Bram Nauta
2008	—	`conf`	A 1.9μW 4.4fJ/Conversion-step 10b 1MS/s Charge-Redistribution ADC. ISSCC Michiel van Elzakker, Ed van Tuijl, Paul F. J. Geraedts, Daniël Schinkel, Eric A. M. Klumperink, Bram Nauta
2008	—	`conf`	A 90μW 12MHz Relaxation Oscillator with a -162dB FOM. ISSCC Paul F. J. Geraedts, Ed van Tuijl, Eric A. M. Klumperink, Gerard Wienk, Bram Nauta
2008	—	`conf`	A Discrete-Time Mixing Receiver Architecture with Wideband Harmonic Rejection. ISSCC Zhiyu Ru, Eric A. M. Klumperink, Bram Nauta
2008	J	`jnl`	A Two-Stage Approach to Harmonic Rejection Mixing Using Blind Interference Cancellation. IEEE Trans. Circuits Syst. II Express Briefs Niels A. Moseley, Eric A. M. Klumperink, Bram Nauta
2008	—	`conf`	A Wideband Balun LNA I/Q-Mixer combination in 65nm CMOS. ISSCC Stephan C. Blaakmeer, Eric A. M. Klumperink, Domine Leenaerts, Bram Nauta
2008	—	`conf`	A general weak nonlinearity model for LNAs. CICC Wei Cheng, Anne-Johan Annema, Jeroen A. Croon, Dirk B. M. Klaassen, Bram Nauta
2008	—	`conf`	A low-voltage mobility-based frequency reference for crystal-less ULP radios. ESSCIRC Fabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Salvatore Drago, Domine Leenaerts, Bram Nauta
2008	C	`conf`	A multi-step P-cell for LNA design automation. ISCAS Wei Cheng, Anne-Johan Annema, Bram Nauta
2008	J	`jnl`	Advantages of Shift Registers Over DLLs for Flexible Low Jitter Multiphase Clock Generation. IEEE Trans. Circuits Syst. II Express Briefs Xiang Gao, Bram Nauta, Eric A. M. Klumperink
2008	J	`jnl`	An Automatic Antenna Tuning System Using Only RF Signal Amplitudes. IEEE Trans. Circuits Syst. II Express Briefs Ettore Lorenzo Firrao, Bram Nauta
2008	—	`conf`	Digital Detection of Oxide Breakdown and Life-Time Extension in Submicron CMOS Technology. ISSCC Mustafa Acar, Anne-Johan Annema, Bram Nauta
2008	C	`conf`	Impulse based scheme for crystal-less ULP radios. ISCAS Fabio Sebastiano, Salvatore Drago, Lucien J. Breems, Domine Leenaerts, Kofi A. A. Makinwa, Bram Nauta
2008	J	`jnl`	New Associate Editor. IEEE J. Solid State Circuits Bram Nauta
2008	J	`jnl`	New Associate Editor. IEEE J. Solid State Circuits Bram Nauta
2008	J	`jnl`	New Associate Editor. IEEE J. Solid State Circuits Bram Nauta
2008	J	`jnl`	New Associate Editor. IEEE J. Solid State Circuits Bram Nauta
2008	J	`jnl`	New Associate Editor. IEEE J. Solid State Circuits Bram Nauta
2008	J	`jnl`	Retraction of Papers With Falsified Information. IEEE J. Solid State Circuits Bram Nauta, Willy Sansen
2008	J	`jnl`	The Blixer, a Wideband Balun-LNA-I/Q-Mixer Topology. IEEE J. Solid State Circuits Stephan C. Blaakmeer, Eric A. M. Klumperink, Domine M. W. Leenaerts, Bram Nauta
2008	J	`jnl`	Theoretical Analysis of Highly Linear Tunable Filters Using Switched-Resistor Techniques. IEEE Trans. Circuits Syst. I Regul. Pap. Amorn Jiraseree-amornkun, Apisak Worapishet, Eric A. M. Klumperink, Bram Nauta, Wanlop Surakampontorn
2008	J	`jnl`	Wideband Balun-LNA With Simultaneous Output Balancing, Noise-Canceling and Distortion-Canceling. IEEE J. Solid State Circuits Stephan C. Blaakmeer, Eric A. M. Klumperink, Domine M. W. Leenaerts, Bram Nauta
2007	—	`conf`	A 0.28pJ/b 2Gb/s/ch Transceiver in 90nm CMOS for 10mm On-Chip interconnects. ISSCC Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
2007	—	`conf`	A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time. ISSCC Daniël Schinkel, Eisse Mensink, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
2007	—	`conf`	A Time-Interleaved Track & hold in 0.13 μm CMOS sub-sampling a 4 GHz signal with 43 dB SNDR. CICC Simon M. Louwsma, Ed van Tuijl, Maarten Vertregt, Bram Nauta
2007	—	`conf`	An inductorless wideband balun-LNA in 65nm CMOS with balanced output. ESSCIRC Stephan C. Blaakmeer, Eric A. M. Klumperink, Bram Nauta, Domine M. W. Leenaerts
2007	—	`conf`	Analog, Mixed-Signal, and RF Circuit Design in Nanometer CMOS. ISSCC Ian Galton, Matt Miller, Robert Bogdan Staszewski, Bram Nauta, Michiel Steyaert
2007	C	`conf`	Analytical Design Equations for Class-E Power Amplifiers with Finite DC-Feed Inductance and Switch On-Resistance. ISCAS Mustafa Acar, Anne-Johan Annema, Bram Nauta
2007	J	`jnl`	Analytical Design Equations for Class-E Power Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. Mustafa Acar, Anne-Johan Annema, Bram Nauta
2007	J	`jnl`	Cognitive radios for dynamic spectrum access - polyphase multipath radio circuits for dynamic spectrum access. IEEE Commun. Mag. Eric A. M. Klumperink, Rameswor Shrestha, Eisse Mensink, Vincent J. Arkesteijn, Bram Nauta
2007	J	`jnl`	Low-Frequency Noise Phenomena in Switched MOSFETs. IEEE J. Solid State Circuits Arnoud P. van der Wel, Eric A. M. Klumperink, Jay S. Kolhatkar, Eric Hoekstra, Martijn F. Snoeij, Cora Salm, Hans Wallinga, Bram Nauta
2007	C	`conf`	Low-Jitter Multi-phase Clock Generation: A Comparison between DLLs and Shift Registers. ISCAS Xiang Gao, Eric A. M. Klumperink, Bram Nauta
2007	J	`jnl`	Message from the Incoming Editor-in-Chief. IEEE J. Solid State Circuits Bram Nauta
2007	C	`conf`	Multipath Polyphase Circuits and their Application to RF Transceivers. ISCAS Eric A. M. Klumperink, Rameswor Shrestha, Eisse Mensink, Gerard Wienk, Zhiyu Ru, Bram Nauta
2007	C	`conf`	On the Suitability of Discrete-Time Receivers for Software-Defined Radio. ISCAS Zhiyu Ru, Eric A. M. Klumperink, Bram Nauta
2007	J	`jnl`	Optimal Positions of Twists in Global On-Chip Differential Interconnects. IEEE Trans. Very Large Scale Integr. Syst. Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
2006	J	`jnl`	A 3-Gb/s/ch transceiver for 10-mm uninterrupted RC-limited global on-chip interconnects. IEEE J. Solid State Circuits Daniël Schinkel, Eisse Mensink, Eric A. M. Klumperink, Ed J. M. van Tuijl, Bram Nauta
2006	J	`jnl`	A Polyphase Multipath Technique for Software-Defined Radio Transmitters. IEEE J. Solid State Circuits Rameswor Shrestha, Eric A. M. Klumperink, Eisse Mensink, Gerard J. M. Wienk, Bram Nauta
2006	—	`conf`	A multipath technique for canceling harmonics and sidebands in a wideband power upconverter. ISSCC Rameswor Shrestha, Eisse Mensink, Eric A. M. Klumperink, Gerard J. M. Wienk, Bram Nauta
2006	—	`conf`	Generalized Analytical Design Equations for Variable Slope Class-E Power Amplifiers. ICECS Mustafa Acar, Anne-Johan Annema, Bram Nauta
2006	J	`jnl`	Jitter requirements of the sampling clock in software radio receivers. IEEE Trans. Circuits Syst. II Express Briefs Vincent J. Arkesteijn, Eric A. M. Klumperink, Bram Nauta
2006	J	`jnl`	Pulse-width modulation pre-emphasis applied in a wireline transmitter, achieving 33 dB loss compensation at 5-Gb/s in 0.13-μm CMOS. IEEE J. Solid State Circuits Jan H. Rutger Schrader, Eric A. M. Klumperink, Jan L. Visschers, Bram Nauta
2006	C	`conf`	Slew rate induced distortion in switched-resistor integrators. ISCAS Amorn Jiraseree-amornkun, Apisak Worapishet, Eric A. M. Klumperink, Bram Nauta, Wanlop Surakampontorn
2006	—	`conf`	Wireline Equalization using Pulse-Width Modulation. CICC Jan H. Rutger Schrader, Eric A. M. Klumperink, Jan L. Visschers, Bram Nauta
2005	J	`jnl`	A 3-Gb/s optical detector in standard CMOS for 850-nm optical communication. IEEE J. Solid State Circuits Sasa Radovanovic, Anne-Johan Annema, Bram Nauta
2005	—	`conf`	An audio FIR-DAC in a BCD process for high power class-D amplifiers. ESSCIRC T. S. Doorn, Ed van Tuijl, Daniël Schinkel, Anne-Johan Annema, Marco Berkhout, Bram Nauta
2005	J	`jnl`	Analog circuits in ultra-deep-submicron CMOS. IEEE J. Solid State Circuits Anne-Johan Annema, Bram Nauta, Ronald van Langevelde, Hans Tuinhout
2005	—	`conf`	Analog/RF circuit design techniques for nanometerscale IC technologies. ESSCIRC Bram Nauta, Anne-Johan Annema
2005	J	`jnl`	Bandwidth of integrated photodiodes in standard CMOS for CD/DVD applications. Microelectron. Reliab. Sasa Radovanovic, Anne-Johan Annema, Bram Nauta
2005	J	`jnl`	Distortion cancellation by polyphase multipath circuits. IEEE Trans. Circuits Syst. I Regul. Pap. Eisse Mensink, Eric A. M. Klumperink, Bram Nauta
2005	—	`conf`	Jitter limitations on multi-carrier modulation. ISCAS (6) Jan H. Rutger Schrader, Eric A. M. Klumperink, Jan L. Visschers, Bram Nauta
2005	—	`conf`	Optimally-placed twists in global on-chip differential interconnects. ESSCIRC Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
2004	—	`conf`	A 1.6 GS/s, 16 times interleaved track & hold with 7.6 ENOB in 0.12 μm CMOS [ADC applications]. ESSCIRC Simon M. Louwsma, Ed J. M. van Tuijl, Maarten Vertregt, Peter C. S. Scholtens, Bram Nauta
2004	J	`jnl`	A 2.5-10-GHz clock multiplier unit with 0.22-ps RMS jitter in standard 0.18-μm CMOS. IEEE J. Solid State Circuits Remco C. H. van de Beek, Cicero S. Vaucher, Domine M. W. Leenaerts, Eric A. M. Klumperink, Bram Nauta
2004	J	`jnl`	A CMOS switched transconductor mixer. IEEE J. Solid State Circuits Eric A. M. Klumperink, Simon M. Louwsma, Gerard J. M. Wienk, Bram Nauta
2004	J	`jnl`	A robust 43-GHz VCO in CMOS for OC-768 SONET applications. IEEE J. Solid State Circuits Arnoud P. van der Wel, Sander L. J. Gierkink, Robert C. Frye, Vito Boccuzzi, Bram Nauta
2004	—	`conf`	A wideband high-linearity RF receiver front-end in CMOS. ESSCIRC Vincent J. Arkesteijn, Eric A. M. Klumperink, Bram Nauta
2004	—	`conf`	Distortion cancellation via polyphase multipath circuits. ISCAS (1) Eisse Mensink, Eric A. M. Klumperink, Bram Nauta
2004	J	`jnl`	Wide-band CMOS low-noise amplifier exploiting thermal noise canceling. IEEE J. Solid State Circuits Federico Bruccoleri, Eric A. M. Klumperink, Bram Nauta
2003	J	`jnl`	Systematic comparison of HF CMOS transconductors. IEEE Trans. Circuits Syst. II Express Briefs Eric A. M. Klumperink, Bram Nauta
2002	—	`conf`	Trends and Challenges in VLSI Technology Scaling towards 100nm (Tutorial Abstract). ASP-DAC/VLSI Design Stefan Rusu, Manoj Sachdev, Christer Svensson, Bram Nauta
2001	—	`conf`	Finding all elementary circuits exploiting transconductance. ISCAS (1) Eric A. M. Klumperink, Federico Bruccoleri, Bram Nauta
2001	J	`jnl`	Generating all two-MOS-transistor amplifiers leads to new wide-band LNAs. IEEE J. Solid State Circuits Federico Bruccoleri, Eric A. M. Klumperink, Bram Nauta
2000	J	`jnl`	Reducing MOSFET 1/f noise and power consumption by switched biasing. IEEE J. Solid State Circuits Eric A. M. Klumperink, Sander L. J. Gierkink, Arnoud P. van der Wel, Bram Nauta
1999	J	`jnl`	Intrinsic 1/f device noise reduction and its effect on phase noise in CMOS ring oscillators. IEEE J. Solid State Circuits Sander L. J. Gierkink, Eric A. M. Klumperink, Arnoud P. van der Wel, Gian Hoogzaad, Ed A. J. M. van Tuijl, Bram Nauta
1998	J	`jnl`	Analog line driver with adaptive impedance matching. IEEE J. Solid State Circuits Bram Nauta, Marcel B. Dijkstra
1998	J	`jnl`	Embedded 5 V-to-3.3 V voltage regulator for supplying digital IC's in 3.3 V CMOS technology. IEEE J. Solid State Circuits Gerrit W. den Besten, Bram Nauta
1998	J	`jnl`	Guest Editorial. IEEE J. Solid State Circuits Alain Guyot, Bram Nauta
1997	J	`jnl`	A CMOS "soft-switched" transconductor and its application in gain control and filters. IEEE J. Solid State Circuits Clemens H. J. Mensink, Bram Nauta, Hans Wallinga
1995	J	`jnl`	A 70-MS/s 110-mW 8-b CMOS folding and interpolating A/D converter. IEEE J. Solid State Circuits Bram Nauta, Ardie G. Venes
1992	J	`jnl`	A CMOS transconductance-C filter technique for very high frequencies. IEEE J. Solid State Circuits Bram Nauta