Borivoje Nikolic

203 papers A* 15A 8B 11C 6Misc 4Journal 77Unranked 82

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	ArchAgent: Agentic AI-driven Computer Architecture Discovery. CoRR Raghav Gupta, Akanksha Jain, Abraham Gonzalez, Alexander Novikov, Po-Sen Huang, Matej Balog, Marvin Eisenberger, Sergey Shirobokov, Ngân Vu, Martin Dixon, Borivoje Nikolic, Parthasarathy Ranganathan, Sagar Karandikar
2026	J	`jnl`	AstRL: Analog and Mixed-Signal Circuit Synthesis with Deep Reinforcement Learning. CoRR Felicia B. Guo, Ken T. Ho, Andrei Vladimirescu, Borivoje Nikolic
2026	J	`jnl`	MAVERIC: A Heterogeneous Robotics SoC With 4 CPU Cores and 13 INT8/FP32 Accelerators in 16-nm-Class Technology. IEEE J. Solid State Circuits Seah Kim, Jerry Zhao, Roger Hsiao, Yufeng Chi, Vighnesh Iyer, Vikram Jain, Borivoje Nikolic, Yakun Sophia Shao
2025	J	`jnl`	BAG3++: An Extensible Generator Framework for Automated Layout-Aware AMS Design. IEEE Open J. Circuits Syst. Felicia Guo, Bob L. Zhou, Ayan Biswas, Paul Kwon, Zhaokai Liu, Ken Ho, Vladimir Stojanovic, Borivoje Nikolic
2025	J	`jnl`	Demonstrating Berkeley Humanoid Lite: An Open-source, Accessible, and Customizable 3D-printed Humanoid Robot. CoRR Yufeng Chi, Qiayuan Liao, Junfeng Long, Xiaoyu Huang, Yakun Sophia Shao, Borivoje Nikolic, Zhongyu Li, Koushil Sreenath
2025	J	`jnl`	Design Techniques for a Multi-Phase Injection- Based Eight-Phase 17-GHz Clock Generator for Multi-Phase Wireline Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. Bob L. Zhou, Borivoje Nikolic
2025	J	`jnl`	NeCTAr: A Heterogeneous RISC-V SoC for Language Model Inference in Intel 16. CoRR Viansa Schmulbach, Jason Kim, Ethan Gao, Lucy Revina, Nikhil Jha, Ethan Wu, Borivoje Nikolic
2025	—	`conf`	SuperNoVA: Algorithm-Hardware Co-Design for Resource-Aware SLAM. ASPLOS (1) Seah Kim, Roger Hsiao, Borivoje Nikolic, James Demmel, Yakun Sophia Shao
2025	—	`conf`	Taping Out Three Class Chips Per Semester in Intel 16 Technology. HCS Lucy Revina, Ethan Gao, Ken Ho, Daniel Lovell, Kristofer S. J. Pister, Borivoje Nikolic
2024	—	`conf`	A CVNN-Aided Anti-Interference Channel Estimation for Massive MIMO Systems. SiPS Yue Dai, Borivoje Nikolic
2024	J	`jnl`	AuRORA: A Full-Stack Solution for Scalable and Virtualized Accelerator Integration. IEEE Micro Seah Kim, Jerry Zhao, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2024	A	`conf`	Design Approach for Die-to-Die Interfaces to Enable Energy-Efficient Chiplet Systems. ISLPED Vikram Jain, Wei Tang, Zuoguo Wu, Viansa Schmulbach, Yakun Sophia Shao, Zhengya Zhang, Borivoje Nikolic
2024	Misc	`conf`	DiffuseLoco: Real-Time Legged Locomotion Control with Diffusion from Offline Datasets. CoRL Xiaoyu Huang, Yufeng Chi, Ruofeng Wang, Zhongyu Li, Xue Bin Peng, Yakun Sophia Shao, Borivoje Nikolic, Koushil Sreenath
2024	J	`jnl`	DiffuseLoco: Real-Time Legged Locomotion Control with Diffusion from Offline Datasets. CoRR Xiaoyu Huang, Yufeng Chi, Ruofeng Wang, Zhongyu Li, Xue Bin Peng, Yakun Sophia Shao, Borivoje Nikolic, Koushil Sreenath
2024	A*	`conf`	FireAxe: Partitioned FPGA-Accelerated Simulation of Large-Scale RTL Designs. ISCA Joonho Whangbo, Edwin Lim, Chengyi Lux Zhang, Kevin Anderson, Abraham Gonzalez, Raghav Gupta, Nivedha Krishnakumar, Sagar Karandikar, Borivoje Nikolic, Yakun Sophia Shao, Krste Asanovic
2024	J	`jnl`	Instruction Scheduling in the Saturn Vector Unit. CoRR Jerry Zhao, Daniel Grubb, Miles Rusch, Tianrui Wei, Kevin Anderson, Borivoje Nikolic, Krste Asanovic
2024	—	`conf`	NeCTAr and RASoC: Tale of Two Class SoCs for Language Model Interference and Robotics in Intel 16. HCS Viansa Schmulbach, Jason Kim, Ethan Gao, Nikhil Jha, Ethan Wu, Oliver Yu, Ben Oliveau, Xiangwei Kong, Brendan Roberts, Connor McMahon, Lixiang Yin, Vamber Yang, Brendan Brenner, George Moujaes, Boyu Hao, Lucy Revina, Kevin Anderson, Bryan Ngo, Yufeng Chi, Hongyi Huang, Reza Sajadiany, Raghav Gupta, Ella Schwarz, Jennifer Zhou, Ken Ho, Jerry Zhao, Anita Flynn, Borivoje Nikolic
2024	—	`conf`	RTL-Repair: Fast Symbolic Repair of Hardware Design Code. ASPLOS (3) Kevin Laeufer, Brandon Fajardo, Abhik Ahuja, Vighnesh Iyer, Borivoje Nikolic, Koushik Sen
2023	—	`conf`	A Heterogeneous SoC for Bluetooth LE in 28nm. HCS Felicia Guo, Nayiri Krzysztofowicz, Alex Moreno, Jeffrey Ni, Daniel Lovell, Yufeng Chi, Kareem Ahmad, Sherwin Afshar, Josh Alexander, Dylan Brater, Cheng Cao, Daniel Fan, Ryan Lund, Jackson Paddock, Griffin Prechter, Troy Sheldon, Shreesha Sreedhara, Anson Tsai, Eric Wu, Kerry Yu, Daniel Fritchman, Aviral Pandey, Ali Niknejad, Kristofer S. J. Pister, Borivoje Nikolic
2023	A*	`conf`	AuRORA: Virtualized Accelerator Orchestration for Multi-Tenant Workloads. MICRO Seah Kim, Jerry Zhao, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2023	A*	`conf`	CDPU: Co-designing Compression and Decompression Processing Units for Hyperscale Systems. ISCA Sagar Karandikar, Aniruddha N. Udipi, Junsun Choi, Joonho Whangbo, Jerry Zhao, Svilen Kanev, Edwin Lim, Jyrki Alakuijala, Vrishab Madduri, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan
2023	J	`jnl`	Guest Editorial Introduction to the Special Issue on the 2022 Symposium on VLSI Circuits. IEEE J. Solid State Circuits Borivoje Nikolic, Mototsugu Hamada
2023	A*	`conf`	MoCA: Memory-Centric, Adaptive Execution for Multi-Tenant Deep Neural Networks. HPCA Seah Kim, Hasan Genc, Vadim Vadimovich Nikiforov, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2023	J	`jnl`	MoCA: Memory-Centric, Adaptive Execution for Multi-Tenant Deep Neural Networks. CoRR Seah Kim, Hasan Genc, Vadim Vadimovich Nikiforov, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2023	A*	`conf`	RoSÉ: A Hardware-Software Co-Simulation Infrastructure Enabling Pre-Silicon Full-Stack Robotics SoC Evaluation. ISCA Dima Nikiforov, Shengjun Chris Dong, Chengyi Lux Zhang, Seah Kim, Borivoje Nikolic, Yakun Sophia Shao
2023	—	`conf`	Silicon Process Technology Constraints for Standardized Vertical Die-to-Die Interconnects. CICC Harrison Liew, Farhana Sheikh, David Kehlet, Borivoje Nikolic
2023	—	`conf`	Simulator Independent Coverage for RTL Hardware Languages. ASPLOS (3) Kevin Laeufer, Vighnesh Iyer, David Biancolin, Jonathan Bachrach, Borivoje Nikolic, Koushik Sen
2022	J	`jnl`	An Adaptable and Scalable Generator of Distributed Massive MIMO Baseband Processing Systems. J. Signal Process. Syst. Yue Dai, Maryam Eslami Rasekh, Seyed Hadi Mirfarshbafan, Harrison Liew, Alexandra Gallyas-Sanhueza, James Dunn, Upamanyu Madhow, Christoph Studer, Borivoje Nikolic
2022	J	`jnl`	An Eight-Core 1.44-GHz RISC-V Vector Processor in 16-nm FinFET. IEEE J. Solid State Circuits Colin Schmidt, John Charles Wright, Zhongkai Wang, Eric Chang, Albert J. Ou, Woorham Bae, Sean Huang, Vladimir M. Milovanovic, Anita Flynn, Brian C. Richards, Krste Asanovic, Elad Alon, Borivoje Nikolic
2022	J	`jnl`	Automated Design of Analog Circuits Using Reinforcement Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Keertana Settaluri, Zhaokai Liu, Rishubh Khurana, Arash Mirhaj, Rajeev Jain, Borivoje Nikolic
2022	J	`jnl`	Design Techniques for a 6.4-32-Gb/s 0.96-pJ/b Continuous-Rate CDR With Stochastic Frequency-Phase Detector. IEEE J. Solid State Circuits Kwanseo Park, Minkyo Shim, Han-Gon Ko, Borivoje Nikolic, Deog-Kyoon Jeong
2022	J	`jnl`	Guest Editorial Introduction to the Special Issue on the 2021 Symposium on VLSI Circuits. IEEE J. Solid State Circuits Yusuke Oike, Borivoje Nikolic
2022	A*	`conf`	Hammer: a modular and reusable physical design flow tool: invited. DAC Harrison Liew, Daniel Grubb, John Wright, Colin Schmidt, Nayiri Krzysztofowicz, Adam M. Izraelevitz, Edward Wang, Krste Asanovic, Jonathan Bachrach, Borivoje Nikolic
2022	—	`conf`	ML for Analog Design: Good Progress, but More to Do. MLCAD Borivoje Nikolic
2021	—	`conf`	14.1 A 71-to-86GHz Packaged 16-Element by 16-Beam Multi-User Beamforming Integrated Receiver in 28nm CMOS. ISSCC Emily Naviasky, Lorenzo Iotti, Greg LaCaille, Borivoje Nikolic, Elad Alon, Ali Niknejad
2021	—	`conf`	4.3 An Eight-Core 1.44GHz RISC-V Vector Machine in 16nm FinFET. ISSCC Colin Schmidt, John Charles Wright, Zhongkai Wang, Eric Chang, Albert J. Ou, Woo-Rham Bae, Sean Huang, Anita Flynn, Brian C. Richards, Krste Asanovic, Elad Alon, Borivoje Nikolic
2021	—	`conf`	A 16mm ESSCIRC Abraham Gonzalez, Jerry Zhao, Ben Korpan, Hasan Genc, Colin Schmidt, John Charles Wright, Ayan Biswas, Alon Amid, Farhana Sheikh, Anton Sorokin, Sirisha Kale, Mani Yalamanchi, Ramya Yarlagadda, Mark Flannigan, Larry Abramowitz, Elad Alon, Yakun Sophia Shao, Krste Asanovic, Borivoje Nikolic
2021	J	`jnl`	A 71-to-86-GHz 16-Element by 16-Beam Multi-User Beamforming Integrated Receiver Sub-Array for Massive MIMO. IEEE J. Solid State Circuits Emily Naviasky, Lorenzo Iotti, Greg LaCaille, Borivoje Nikolic, Elad Alon, Ali M. Niknejad
2021	A*	`conf`	A Hardware Accelerator for Protocol Buffers. MICRO Sagar Karandikar, Chris Leary, Chris Kennelly, Jerry Zhao, Dinesh Parimi, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan
2021	—	`conf`	A Scalable Generator for Massive MIMO Baseband Processing Systems with Beamspace Channel Estimation. SiPS Yue Dai, Harrison Liew, Maryam Eslami Rasekh, Seyed Hadi Mirfarshbafan, Alexandra Gallyas-Sanhueza, James Dunn, Upamanyu Madhow, Christoph Studer, Borivoje Nikolic
2021	—	`conf`	A Scalable Massive MIMO Uplink Baseband Processing Generator. ICC Yue Dai, Greg LaCaille, Harrison Liew, James Dunn, Borivoje Nikolic
2021	J	`jnl`	Accessible, FPGA Resource-Optimized Simulation of Multiclock Systems in FireSim. IEEE Micro David Biancolin, Albert Magyar, Sagar Karandikar, Alon Amid, Borivoje Nikolic, Jonathan Bachrach, Krste Asanovic
2021	A*	`conf`	An Automated and Process-Portable Generator for Phase-Locked Loop. DAC Zhongkai Wang, Minsoo Choi, Eric Chang, John Charles Wright, Wooham Bae, Sijun Du, Zhaokai Liu, Nathan Narevsky, Colin Schmidt, Ayan Biswas, Borivoje Nikolic, Elad Alon
2021	A*	`conf`	Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration. DAC Hasan Genc, Seah Kim, Alon Amid, Ameer Haj-Ali, Vighnesh Iyer, Pranav Prakash, Jerry Zhao, Daniel Grubb, Harrison Liew, Howard Mao, Albert J. Ou, Colin Schmidt, Samuel Steffl, John Charles Wright, Ion Stoica, Jonathan Ragan-Kelley, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2021	Misc	`conf`	Improved Processor Design Project Testing. WCAE Ryan Lund, Connor McMahon, Daniel D. Garcia, Borivoje Nikolic
2021	J	`jnl`	LAYGO: A Template-and-Grid-Based Layout Generation Engine for Advanced CMOS Technologies. IEEE Trans. Circuits Syst. I Regul. Pap. Jaeduk Han, Woo-Rham Bae, Eric Chang, Zhongkai Wang, Borivoje Nikolic, Elad Alon
2021	B	`conf`	Memory-Efficient Hardware Performance Counters with Approximate-Counting Algorithms. ISPASS Jingyi Xu, Sehoon Kim, Borivoje Nikolic, Yakun Sophia Shao
2021	C	`conf`	Vertically Integrated Computing Labs Using Open-Source Hardware Generators and Cloud-Hosted FPGAs. ISCAS Alon Amid, Albert J. Ou, Krste Asanovic, Yakun Sophia Shao, Borivoje Nikolic
2020	J	`jnl`	A Dual-Core RISC-V Vector Processor With On-Chip Fine-Grain Power Management in 28-nm FD-SOI. IEEE Trans. Very Large Scale Integr. Syst. John Charles Wright, Colin Schmidt, Ben Keller, Daniel Palmer Dabbelt, Jaehwa Kwak, Vighnesh Iyer, Nandish Mehta, Pi-Feng Chiu, Stevo Bailey, Krste Asanovic, Borivoje Nikolic
2020	—	`conf`	A Methodology for Reusable Physical Design. ISQED Edward Wang, Colin Schmidt, Adam M. Izraelevitz, John Charles Wright, Borivoje Nikolic, Elad Alon, Jonathan Bachrach
2020	A	`conf`	AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs. DATE Keertana Settaluri, Ameer Haj-Ali, Qijing Huang, Kourosh Hakhamaneshi, Borivoje Nikolic
2020	J	`jnl`	Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs. IEEE Micro Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Yakun Sophia Shao, Krste Asanovic, Borivoje Nikolic
2020	—	`conf`	Design and Demonstration of a Scalable Massive MIMO Uplink at E-Band. ICC Workshops Greg LaCaille, James Dunn, Antonio Puglielli, Lorenzo Iotti, Sameet Ramakrishnan, Lucas Calderin, Zhenghan Lin, Emily Naviasky, Borivoje Nikolic, Ali Niknejad, Elad Alon
2020	A*	`conf`	FirePerf: FPGA-Accelerated Full-System Hardware/Software Performance Profiling and Co-Design. ASPLOS Sagar Karandikar, Albert J. Ou, Alon Amid, Howard Mao, Randy H. Katz, Borivoje Nikolic, Krste Asanovic
2020	A*	`conf`	Invited: Chipyard - An Integrated SoC Research and Implementation Environment. DAC Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Jonathan Bachrach, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic
2020	B	`conf`	Wireless Channel Dynamics for Relay Selection under Ultra-Reliable Low-Latency Communication. PIMRC Paul Rigge, Vasuki Narasimha Swamy, Christian Nelson, Fredrik Tufvesson, Anant Sahai, Borivoje Nikolic
2019	—	`conf`	A 3.01 mm A-SSCC Qichen Zhang, Yun Chen, Xiaoyang Zeng, Keshab K. Parhi, Borivoje Nikolic
2019	—	`conf`	A Generated 7GS/s 8b Time-Interleaved SAR ADC with 38.2dB SNDR at Nyquist in 16nm CMOS FinFET. CICC Jaeduk Han, Eric Chang, Stevo Bailey, Zhongkai Wang, Woo-Rham Bae, Angie Wang, Nathan Narevsky, Amy Whitcombe, Pengpeng Lu, Borivoje Nikolic, Elad Alon
2019	J	`jnl`	A Mixed-Signal RISC-V Signal Analysis SoC Generator With a 16-nm FinFET Instance. IEEE J. Solid State Circuits Steven Bailey, Paul Rigge, Jaeduk Han, Richard Lin, Eric Chang, Howard Mao, Zhongkai Wang, Chick Markley, Adam M. Izraelevitz, Angie Wang, Nathan Narevsky, Woo-Rham Bae, Steve Shauck, Sergio Montano, Justin Norsworthy, Munir Razzaque, Wen Hau Ma, Akalu Lentiro, Matthew Doerflein, Darin Heckendorn, Jim McGrath, Franco DeSeta, Ronen Shoham, Mike Stellfox, Mark Snowden, Joseph Cole, Dan Fuhrman, Brian C. Richards, Jonathan Bachrach, Elad Alon, Borivoje Nikolic
2019	J	`jnl`	A Real-Time, 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET. IEEE J. Solid State Circuits Angie Wang, Woo-Rham Bae, Jaeduk Han, Stevo Bailey, Orhan Ocal, Paul Rigge, Zhongkai Wang, Kannan Ramchandran, Elad Alon, Borivoje Nikolic
2019	J	`jnl`	BROOM: An Open-Source Out-of-Order Processor With Resilient Low-Voltage Operation in 28-nm CMOS. IEEE Micro Christopher Celio, Pi-Feng Chiu, Krste Asanovic, Borivoje Nikolic, David A. Patterson
2019	J	`jnl`	FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. IEEE Micro Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy Howard Katz, Jonathan Bachrach, Krste Asanovic
2019	J	`jnl`	Gemmini: An Agile Systolic Array Generator Enabling Systematic Evaluations of Deep-Learning Architectures. CoRR Hasan Genc, Ameer Haj-Ali, Vighnesh Iyer, Alon Amid, Howard Mao, John Charles Wright, Colin Schmidt, Jerry Zhao, Albert J. Ou, Max Banister, Yakun Sophia Shao, Borivoje Nikolic, Ion Stoica, Krste Asanovic
2019	A*	`conf`	Open-Source EDA Tools and IP, A View from the Trenches. DAC Elad Alon, Krste Asanovic, Jonathan Bachrach, Borivoje Nikolic
2019	C	`conf`	RTL bug localization through LTL specification mining (WIP). MEMOCODE Vighnesh Iyer, Donggyu Kim, Borivoje Nikolic, Sanjit A. Seshia
2019	J	`jnl`	Wireless Channel Dynamics and Robustness for Ultra-Reliable Low-Latency Communications. IEEE J. Sel. Areas Commun. Vasuki Narasimha Swamy, Paul Rigge, Gireeja Ranade, Borivoje Nikolic, Anant Sahai
2018	—	`conf`	A 28nm FDSOI 8192-point digital ASIC spectrometer from a Chisel generator. CICC Stevo Bailey, John Wright, Nandish Mehta, Rachel Hochman, Robert Jarnot, Vladimir M. Milovanovic, Dan Werthimer, Borivoje Nikolic
2018	J	`jnl`	A 65-nm CMOS IEEE J. Solid State Circuits Bonjern Yang, Eric Chang, Ali M. Niknejad, Borivoje Nikolic, Elad Alon
2018	—	`conf`	A Dual-Mode Configurable RF-to-Digital Receiver in 16NM FinFET. VLSI Circuits Amy Whitcombe, Borivoje Nikolic, Farhana Sheikh, Erkan Alpman, Ashoke Ravi
2018	—	`conf`	A Generated Multirate Signal Analysis RISC-V SoC in 16nm FinFET. A-SSCC Stevo Bailey, Jaeduk Han, Paul Rigge, Richard Lin, Eric Chang, Howard Mao, Zhongkai Wang, Chick Markley, Adam M. Izraelevitz, Angie Wang, Nathan Narevsky, Woo-Rham Bae, Steve Shauck, Sergio Montano, Justin Norsworthy, Munir Razzaque, Wen Hau Ma, Akalu Lentiro, Matthew Doerflein, Darin Heckendorn, Jim McGrath, Franco DeSeta, Ronen Shoham, Mike Stellfox, Mark Snowden, Joseph Cole, Dan Fuhrman, Brian C. Richards, Jonathan Bachrach, Elad Alon, Borivoje Nikolic
2018	—	`conf`	A Real-Time, Analog/Digital Co-Designed 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET. ESSCIRC Angie Wang, Woo-Rham Bae, Jaeduk Han, Stevo Bailey, Paul Rigge, Orhan Ocal, Zhongkai Wang, Kannan Ramchandran, Elad Alon, Borivoje Nikolic
2018	J	`jnl`	A Variation-Tolerant, Sneak-Current-Compensated Readout Scheme for Cross-Point Memory Based on Two-Port Sensing Technique. IEEE Trans. Circuits Syst. II Express Briefs Woo-Rham Bae, Kyung Jean Yoon, Taeksang Song, Borivoje Nikolic
2018	A*	`conf`	ACED: a hardware library for generating DSP systems. DAC Angie Wang, Paul Rigge, Adam M. Izraelevitz, Chick Markley, Jonathan Bachrach, Borivoje Nikolic
2018	—	`conf`	An Out-of-Order RISC-V Processor with Resilient Low-Voltage Operation in 28NM CMOS. VLSI Circuits Pi-Feng Chiu, Christopher Celio, Krste Asanovic, David A. Patterson, Borivoje Nikolic
2018	—	`conf`	BAG2: A process-portable framework for generator-based AMS circuit design. CICC Eric Chang, Jaeduk Han, Woo-Rham Bae, Zhongkai Wang, Nathan Narevsky, Borivoje Nikolic, Elad Alon
2018	—	`conf`	Energy-Efficient Design in FDSOI. ESSCIRC Borivoje Nikolic
2018	—	`conf`	Energy-Efficient Design in FDSOI. ESSDERC Borivoje Nikolic
2018	A*	`conf`	FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. ISCA Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy H. Katz, Jonathan Bachrach, Krste Asanovic
2018	—	`conf`	Generating the Next Wave of Custom Silicon. ESSCIRC Borivoje Nikolic, Elad Alon, Krste Asanovic
2018	J	`jnl`	Network Coding for Real-time Wireless Communication for Automation. CoRR Vasuki Narasimha Swamy, Paul Rigge, Gireeja Ranade, Anant Sahai, Borivoje Nikolic
2018	B	`conf`	Predicting Wireless Channels for Ultra-Reliable Low-Latency Communications. ISIT Vasuki Narasimha Swamy, Paul Rigge, Gireeja Ranade, Borivoje Nikolic, Anant Sahai
2018	J	`jnl`	Wireless Channel Dynamics and Robustness for Ultra-Reliable Low-Latency Communications. CoRR Vasuki Narasimha Swamy, Paul Rigge, Gireeja Ranade, Borivoje Nikolic, Anant Sahai
2017	—	`conf`	A 0.37mm A-SSCC Angie Wang, Brian C. Richards, Daniel Palmer Dabbelt, Howard Mao, Stevo Bailey, Jaeduk Han, Eric Chang, James Dunn, Elad Alon, Borivoje Nikolic
2017	J	`jnl`	A 65-nm CMOS Wideband TDD Front-End With Integrated T/R Switching via PA Re-Use. IEEE J. Solid State Circuits Xiao Xiao, Amanda Pratt, Bonjern Yang, Angie Wang, Ali M. Niknejad, Elad Alon, Borivoje Nikolic
2017	J	`jnl`	A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI. IEEE J. Solid State Circuits Ben Keller, Martin Cochet, Brian Zimmer, Jaehwa Kwak, Alberto Puggelli, Yunsup Lee, Milovan Blagojevic, Stevo Bailey, Pi-Feng Chiu, Daniel Palmer Dabbelt, Colin Schmidt, Elad Alon, Krste Asanovic, Borivoje Nikolic
2017	—	`conf`	A low-voltage low-offset dual strong-arm latch comparator. A-SSCC Aikaterini Papadopoulou, Vladimir M. Milovanovic, Borivoje Nikolic
2017	—	`conf`	A yield optimization methodology for mixed-signal circuits. CICC Aikaterini Papadopoulou, Borivoje Nikolic
2017	J	`jnl`	Analysis and Design of Integrated Active Cancellation Transceiver for Frequency Division Duplex Systems. IEEE J. Solid State Circuits Lucas Calderin, Sameet Ramakrishnan, Antonio Puglielli, Elad Alon, Borivoje Nikolic, Ali M. Niknejad
2017	—	`conf`	On-chip spur and phase noise cancellation techniques. A-SSCC Yi-An Li, Monte Mar, Borivoje Nikolic, Ali M. Niknejad
2017	J	`jnl`	Real-Time Cooperative Communication for Automation Over Wireless. IEEE Trans. Wirel. Commun. Vasuki Narasimha Swamy, Sahaana Suri, Paul Rigge, Matthew Weiner, Gireeja Ranade, Anant Sahai, Borivoje Nikolic
2017	J	`jnl`	Reprogrammable Redundancy for SRAM-Based Cache V IEEE J. Solid State Circuits Brian Zimmer, Pi-Feng Chiu, Borivoje Nikolic, Krste Asanovic
2017	J	`jnl`	Use of Phase Delay Analysis for Evaluating Wideband Circuits: An Alternative to Group Delay Analysis. IEEE Trans. Very Large Scale Integr. Syst. Woo-Rham Bae, Borivoje Nikolic, Deog-Kyoon Jeong
2016	—	`conf`	A 65nm CMOS transceiver with integrated active cancellation supporting FDD from 1GHz to 1.8GHz at +12.6dBm TX power leakage. VLSI Circuits Sameet Ramakrishnan, Lucas Calderin, Antonio Puglielli, Elad Alon, Ali Niknejad, Borivoje Nikolic
2016	—	`conf`	A 65nm CMOS wideband TDD front-end with integrated T/R switching via PA re-use. ESSCIRC Xiao Xiao, Amanda Pratt, Ali Niknejad, Elad Alon, Borivoje Nikolic
2016	J	`jnl`	A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI. IEEE J. Solid State Circuits Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Steven Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic
2016	J	`jnl`	A Self-Adjustable Clock Generator With Wide Dynamic Range in 28 nm FDSOI. IEEE J. Solid State Circuits Jaehwa Kwak, Borivoje Nikolic
2016	—	`conf`	A double-tail sense amplifier for low-voltage SRAM in 28nm technology. A-SSCC Pi-Feng Chiu, Brian Zimmer, Borivoje Nikolic
2016	—	`conf`	A fast, flexible, positive and negative adaptive body-bias generator in 28nm FDSOI. VLSI Circuits Milovan Blagojevic, Martin Cochet, Ben Keller, Philippe Flatresse, Andrei Vladimirescu, Borivoje Nikolic
2016	Misc	`conf`	A generator of memory-based, runtime-reconfigurable 2N3M5K FFT engines. ICASSP Angie Wang, Jonathan Bachrach, Borivoje Nikolic
2016	J	`jnl`	Cooperative Communication for Control over Wireless. CoRR Vasuki Narasimha Swamy, Sahaana Suri, Paul Rigge, Matthew Weiner, Gireeja Ranade, Anant Sahai, Borivoje Nikolic
2016	J	`jnl`	Design of Energy- and Cost-Efficient Massive MIMO Arrays. Proc. IEEE Antonio Puglielli, Andrew Townley, Greg LaCaille, Vladimir M. Milovanovic, Pengpeng Lu, Konstantin Trotskovsky, Amy Whitcombe, Nathan Narevsky, Gregory Wright, Thomas A. Courtade, Elad Alon, Borivoje Nikolic, Ali M. Niknejad
2016	—	`conf`	Network coding for high-reliability low-latency wireless control. WCNC Workshops Vasuki Narasimha Swamy, Paul Rigge, Gireeja Ranade, Anant Sahai, Borivoje Nikolic
2016	B	`conf`	Network coding for high-reliability low-latency wireless control. WCNC Vasuki Narasimha Swamy, Paul Rigge, Gireeja Ranade, Anant Sahai, Borivoje Nikolic
2016	—	`conf`	On-chip I-V variability and random telegraph noise characterization in 28 nm CMOS. ESSDERC Amy Whitcombe, Scott Taylor, Martin Denham, Vladimir M. Milovanovic, Borivoje Nikolic
2016	—	`conf`	On-chip supply power measurement and waveform reconstruction in a 28nm FD-SOI processor SoC. A-SSCC Martin Cochet, Alberto Puggelli, Ben Keller, Brian Zimmer, Milovan Blagojevic, Sylvain Clerc, Philippe Roche, Jean-Luc Autran, Borivoje Nikolic
2016	—	`conf`	Phase noise scaling and tracking in OFDM multi-user beamforming arrays. ICC Antonio Puglielli, Greg LaCaille, Ali M. Niknejad, Gregory Wright, Borivoje Nikolic, Elad Alon
2016	—	`conf`	Reprogrammable redundancy for cache Vmin reduction in a 28nm RISC-V processor. A-SSCC Brian Zimmer, Pi-Feng Chiu, Borivoje Nikolic, Krste Asanovic
2016	—	`conf`	Sub-microsecond adaptive voltage scaling in a 28nm FD-SOI processor SoC. ESSCIRC Ben Keller, Martin Cochet, Brian Zimmer, Yunsup Lee, Milovan Blagojevic, Jaehwa Kwak, Alberto Puggelli, Stevo Bailey, Pi-Feng Chiu, Daniel Palmer Dabbelt, Colin Schmidt, Elad Alon, Krste Asanovic, Borivoje Nikolic
2015	—	`conf`	A 550-2260MHz self-adjustable clock generator in 28nm FDSOI. A-SSCC Jaehwa Kwak, Borivoje Nikolic
2015	J	`jnl`	A Differential 2R Crosspoint RRAM Array With Zero Standby Current. IEEE Trans. Circuits Syst. II Express Briefs Pi-Feng Chiu, Borivoje Nikolic
2015	—	`conf`	A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI. VLSIC Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic
2015	—	`conf`	A scalable massive MIMO array architecture based on common modules. ICC Workshops Antonio Puglielli, Nathan Narevsky, Pengpeng Lu, Thomas A. Courtade, Gregory Wright, Borivoje Nikolic, Elad Alon
2015	—	`conf`	Cooperative communication for high-reliability low-latency wireless control. ICC Vasuki Narasimha Swamy, Sahaana Suri, Paul Rigge, Matthew Weiner, Gireeja Ranade, Anant Sahai, Borivoje Nikolic
2015	—	`conf`	Design considerations for low-noise transconductance amplifiers in 28nm UTBB-FDSOI. NEWCAS D. Danilovic, Andreia Cathelin, Andrei Vladimirescu, Borivoje Nikolic
2015	—	`conf`	F1: High-speed interleaved ADCs. ISSCC Stephane Le Tuai, Borivoje Nikolic, Tetsuya Iizuka, Ichiro Fujimori
2015	J	`jnl`	Per-Core DVFS With Switched-Capacitor Converters for Energy Efficiency in Manycore Processors. IEEE Trans. Very Large Scale Integr. Syst. Ruzica Jevtic, Hanh-Phuc Le, Milovan Blagojevic, Stevo Bailey, Krste Asanovic, Elad Alon, Borivoje Nikolic
2015	—	`conf`	Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking. Hot Chips Symposium Yunsup Lee, Brian Zimmer, Andrew Waterman, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Henry Cook, Rimas Avizienis, Brian C. Richards, Elad Alon, Borivoje Nikolic, Krste Asanovic
2015	—	`conf`	Simpler, more efficient design. ESSCIRC Borivoje Nikolic
2014	—	`conf`	27.7 A scalable 1.5-to-6Gb/s 6.2-to-38.1mW LDPC decoder for 60GHz wireless networks in 28nm UTBB FDSOI. ISSCC Matthew Weiner, Milovan Blagojevic, Sergey Skotnikov, Andreas Burg, Philippe Flatresse, Borivoje Nikolic
2014	J	`jnl`	A Wideband 400 MHz-to-4 GHz Direct RF-to-Digital Multimode ΔΣ Receiver. IEEE J. Solid State Circuits Charles Wu, Elad Alon, Borivoje Nikolic
2014	—	`conf`	A frequency-reconfigurable multi-standard 65nm CMOS digital transmitter with LTCC interposers. A-SSCC Nai-Chung Kuo, Bonjern Yang, Chaoying Wu, Lingkai Kong, Angie Wang, Michael Reiha, Elad Alon, Ali M. Niknejad, Borivoje Nikolic
2014	—	`conf`	Design of a low-latency, high-reliability wireless communication system for control applications. ICC Matthew Weiner, Milos Jorgovanovic, Anant Sahai, Borivoje Nikolic
2014	—	`conf`	Joint impact of random variations and RTN on dynamic writeability in 28nm bulk and FDSOI SRAM. ESSDERC Brian Zimmer, Olivier Thomas, Seng Oon Toh, Taylor Vincent, Krste Asanovic, Borivoje Nikolic
2013	—	`conf`	A 0.4 GHz - 4 GHz direct RF-to-digital ΣΔ multi-mode receiver. ESSCIRC Charles Wu, Borivoje Nikolic
2013	J	`jnl`	A 2.8 GS/s 44.6 mW Time-Interleaved ADC Achieving 50.9 dB SNDR and 3 dB Effective Resolution Bandwidth of 1.5 GHz in 65 nm CMOS. IEEE J. Solid State Circuits Dusan Stepanovic, Borivoje Nikolic
2013	J	`jnl`	Coding and System Design for Quantize-Map-and-Forward Relaying. IEEE J. Sel. Areas Commun. Vinayak Nagpal, I-Hsiang Wang, Milos Jorgovanovic, David Tse, Borivoje Nikolic
2013	B	`conf`	Relay scheduling and interference cancellation for quantize-map-and-forward cooperative relaying. ISIT Milos Jorgovanovic, Matthew Weiner, David Tse, Borivoje Nikolic, I-Hsiang Wang, Vinayak Nagpal
2012	J	`jnl`	A 15 MHz to 600 MHz, 20 mW, 0.38 mm IEEE Trans. Very Large Scale Integr. Syst. Sebastian Hoyos, Cheongyuen W. Tsang, Johan P. Vanderhaegen, Yun Chiu, Yasutoshi Aibara, Haideh Khorramabadi, Borivoje Nikolic
2012	—	`conf`	A 2.8GS/s 44.6mW time-interleaved ADC achieving 50.9dB SNDR and 3dB effective resolution bandwidth of 1.5GHz in 65nm CMOS. VLSIC Dusan Stepanovic, Borivoje Nikolic
2012	J	`jnl`	Coding and System Design for Quantize-Map-and-Forward Relaying CoRR Vinayak Nagpal, I-Hsiang Wang, Milos Jorgovanovic, David Tse, Borivoje Nikolic
2012	J	`jnl`	SRAM Assist Techniques for Operation in a Wide Voltage Range in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs Brian Zimmer, Seng Oon Toh, Huy Vo, Yunsup Lee, Olivier Thomas, Krste Asanovic, Borivoje Nikolic
2011	J	`jnl`	A 2 Gb/s 5.6 mW Digital LOS/NLOS Equalizer for the 60 GHz Band. IEEE J. Solid State Circuits Ji-Hoon Park, Brian C. Richards, Borivoje Nikolic
2011	J	`jnl`	Characterization of Dynamic SRAM Stability in 45 nm CMOS. IEEE J. Solid State Circuits Seng Oon Toh, Zheng Guo, Tsu-Jae King Liu, Borivoje Nikolic
2011	J	`jnl`	Discrete-Time, Linear Periodically Time-Variant Phase-Locked Loop Model for Jitter Analysis. IEEE Trans. Circuits Syst. I Regul. Pap. Socrates D. Vamvakos, Vladimir Stojanovic, Borivoje Nikolic
2011	C	`conf`	LDPC decoder architecture for high-data rate personal-area networks. ISCAS Matthew Weiner, Borivoje Nikolic, Zhengya Zhang
2011	—	`conf`	Managing variability for ultimate energy efficiency. ECCTD Borivoje Nikolic
2011	J	`jnl`	Technology Variability From a Design Perspective. IEEE Trans. Circuits Syst. I Regul. Pap. Borivoje Nikolic, Ji-Hoon Park, Jaehwa Kwak, Bastien Giraud, Zheng Guo, Liang-Teck Pang, Seng Oon Toh, Ruzica Jevtic, Kun Qian, Costas J. Spanos
2010	J	`jnl`	An Efficient 10GBASE-T Ethernet LDPC Decoder Design With Low Error Floors. IEEE J. Solid State Circuits Zhengya Zhang, Venkat Anantharam, Martin J. Wainwright, Borivoje Nikolic
2010	J	`jnl`	Analysis of absorbing sets and fully absorbing sets of array-based LDPC codes. IEEE Trans. Inf. Theory Lara Dolecek, Zhengya Zhang, Venkat Anantharam, Martin J. Wainwright, Borivoje Nikolic
2010	—	`conf`	Parameter-specific ring oscillator for process monitoring at the 45 nm node. CICC Lynn T.-N. Wang, Nuo Xu, Seng Oon Toh, Andrew R. Neureuther, Tsu-Jae King Liu, Borivoje Nikolic
2010	—	`conf`	Quantize-map-and-forward relaying: Coding and system design. Allerton Vinayak Nagpal, I-Hsiang Wang, Milos Jorgovanovic, David Tse, Borivoje Nikolic
2010	J	`jnl`	SRAM Read/Write Margin Enhancements Using FinFETs. IEEE Trans. Very Large Scale Integr. Syst. Andrew Carlson, Zheng Guo, Sriram Balasubramanian, Radu Zlatanovici, Tsu-Jae King Liu, Borivoje Nikolic
2010	C	`conf`	SRAM design in fully-depleted SOI technology. ISCAS Borivoje Nikolic, Changhwan Shin, Min Hee Cho, Xin Sun, Tsu-Jae King Liu, Bich-Yen Nguyen
2010	—	`conf`	SRAM stability characterization using tunable ring oscillators in 45nm CMOS. ISSCC Jason Tsai, Seng Oon Toh, Zheng Guo, Liang-Teck Pang, Tsu-Jae King Liu, Borivoje Nikolic
2010	—	`conf`	Technology variability from a design perspective. CICC Borivoje Nikolic, Bastien Giraud, Zheng Guo, Liang-Teck Pang, Ji-Hoon Park, Seng Oon Toh
2009	—	`conf`	A 1.5GS/s 4096-point digital spectrum analyzer for space-borne applications. CICC Brian C. Richards, Nicola Nicolici, Henry Chen, Kevin Chao, Robert Abiad, Dan Werthimer, Borivoje Nikolic
2009	J	`jnl`	Cooperative Multiplexing in the Multiple Antenna Half Duplex Relay Channel CoRR Vinayak Nagpal, Sameer Pawar, David Tse, Borivoje Nikolic
2009	B	`conf`	Cooperative multiplexing in the multiple antenna half duplex relay channel. ISIT Vinayak Nagpal, Sameer Pawar, David Tse, Borivoje Nikolic
2009	J	`jnl`	Design of LDPC decoders for improved low error rate performance: quantization and algorithm choices. IEEE Trans. Commun. Zhengya Zhang, Lara Dolecek, Borivoje Nikolic, Venkat Anantharam, Martin J. Wainwright
2009	—	`conf`	Discrete-time, cyclostationary phase-locked loop model for jitter analysis. CICC Sokratis D. Vamvakos, Vladimir Stojanovic, Borivoje Nikolic
2009	J	`jnl`	Energy-Delay Optimization of 64-Bit Carry-Lookahead Adders With a 240 ps 90 nm CMOS Design Example. IEEE J. Solid State Circuits Radu Zlatanovici, Sean Kao, Borivoje Nikolic
2009	—	`conf`	Fixed- and variable-length ring oscillators for variability characterization in 45nm CMOS. CICC Ji-Hoon Park, Liang-Teck Pang, Kenneth Duong, Borivoje Nikolic
2009	J	`jnl`	Large-Scale SRAM Variability Characterization in 45 nm CMOS. IEEE J. Solid State Circuits Zheng Guo, Andrew Carlson, Liang-Teck Pang, Kenneth Duong, Tsu-Jae King Liu, Borivoje Nikolic
2009	J	`jnl`	Measurement and Analysis of Variability in 45 nm Strained-Si CMOS Technology. IEEE J. Solid State Circuits Liang-Teck Pang, Kun Qian, Costas J. Spanos, Borivoje Nikolic
2009	J	`jnl`	Measurements and Analysis of Process Variability in 90nmCMOS. IEEE J. Solid State Circuits Liang-Teck Pang, Borivoje Nikolic
2009	J	`jnl`	Predicting error floors of structured LDPC codes: deterministic bounds and estimates. IEEE J. Sel. Areas Commun. Lara Dolecek, Pamela Lee, Zhengya Zhang, Venkat Anantharam, Borivoje Nikolic, Martin J. Wainwright
2008	—	`conf`	A 15 MHz - 600 MHz, 20 mW, 0.38 mm2, fast coarse locking digital DLL in 0.13μm CMOS. ESSCIRC Sebastian Hoyos, Cheongyuen W. Tsang, Johan P. Vanderhaegen, Yun Chiu, Yasutoshi Aibara, Haideh Khorramabadi, Borivoje Nikolic
2008	—	`conf`	Background ADC calibration in digital domain. CICC Cheongyuen W. Tsang, Yun Chiu, Johan P. Vanderhaegen, Sebastian Hoyos, Charles Chen, Robert W. Brodersen, Borivoje Nikolic
2008	—	`conf`	Compensation of systematic variations through optimal biasing of SRAM wordlines. CICC Andrew Carlson, Zheng Guo, Liang-Teck Pang, Tsu-Jae King Liu, Borivoje Nikolic
2008	B	`conf`	Error floors in LDPC codes: Fast simulation, bounds and hardware emulation. ISIT Pamela Lee, Lara Dolecek, Zhengya Zhang, Venkat Anantharam, Borivoje Nikolic, Martin J. Wainwright
2008	B	`conf`	Lowering LDPC Error Floors by Postprocessing. GLOBECOM Zhengya Zhang, Lara Dolecek, Borivoje Nikolic, Venkat Anantharam, Martin J. Wainwright
2008	—	`conf`	Measurement and analysis of variability in 45nm strained-Si CMOS technology. CICC Liang-Teck Pang, Borivoje Nikolic
2007	—	`conf`	ASIC Design and Verification in an FPGA Environment. CICC Dejan Markovic, Chen Chang, Brian C. Richards, Hayden Kwok-Hay So, Borivoje Nikolic, Robert W. Brodersen
2007	—	`conf`	Analysis of Absorbing Sets for Array-Based LDPC Codes. ICC Lara Dolecek, Zhengya Zhang, Venkat Anantharam, Martin J. Wainwright, Borivoje Nikolic
2007	Misc	`conf`	Fresh air: the emerging landscape of design for networked embedded systems. CODES+ISSS Radu Marculescu, Borivoje Nikolic, Alberto L. Sangiovanni-Vincentelli
2007	—	`conf`	Peak-to-Average Power Ratio Reduction in an FDM Broadcast System. SiPS Zhengya Zhang, Renaldi Winoto, Ahmad Bahai, Borivoje Nikolic
2007	J	`jnl`	Power and Area Minimization for Multidimensional Signal Processing. IEEE J. Solid State Circuits Dejan Markovic, Borivoje Nikolic, Robert W. Brodersen
2007	—	`conf`	Power-Limited Design. ICECS Borivoje Nikolic
2007	—	`conf`	Quantization Effects in Low-Density Parity-Check Decoders. ICC Zhengya Zhang, Lara Dolecek, Martin J. Wainwright, Venkat Anantharam, Borivoje Nikolic
2006	—	`conf`	A 240ps 64b carry-lookahead adder in 90nm CMOS. ISSCC Sean Kao, Radu Zlatanovici, Borivoje Nikolic
2006	B	`conf`	Investigation of Error Floors of Structured Low-Density Parity-Check Codes by Hardware Emulation. GLOBECOM Zhengya Zhang, Lara Dolecek, Borivoje Nikolic, Venkat Anantharam, Martin J. Wainwright
2006	J	`jnl`	L. Embedding Mixed-Signal Design in Systems-on-Chip. Proc. IEEE Jan M. Rabaey, Fernando De Bernardinis, Ali M. Niknejad, Borivoje Nikolic, Alberto L. Sangiovanni-Vincentelli
2006	J	`jnl`	Power - Performance Optimization for Custom Digital Circuits. J. Low Power Electron. Radu Zlatanovici, Borivoje Nikolic
2006	—	`conf`	Power and Area Efficient VLSI Architectures for Communication Signal Processing. ICC Dejan Markovic, Borivoje Nikolic, Robert W. Brodersen
2005	A	`conf`	FinFET-based SRAM design. ISLPED Zheng Guo, Sriram Balasubramanian, Radu Zlatanovici, Tsu-Jae King, Borivoje Nikolic
2005	—	`conf`	Power - Performance Optimization for Custom Digital Circuits. PATMOS Radu Zlatanovici, Borivoje Nikolic
2005	—	`conf`	Scaling of analog-to-digital converters into ultra-deep-submicron CMOS. CICC Yun Chiu, Borivoje Nikolic, Paul R. Gray
2004	J	`jnl`	A 14-b 12-MS/s CMOS pipeline ADC with over 100-dB SFDR. IEEE J. Solid State Circuits Yun Chiu, Paul R. Gray, Borivoje Nikolic
2004	J	`jnl`	A shared-well dual-supply-voltage 64-bit ALU. IEEE J. Solid State Circuits Yasuhisa Shimazaki, Radu Zlatanovici, Borivoje Nikolic
2004	J	`jnl`	Least mean square adaptive digital background calibration of pipelined analog-to-digital converters. IEEE Trans. Circuits Syst. I Regul. Pap. Yun Chiu, Cheongyuen W. Tsang, Borivoje Nikolic, Paul R. Gray
2004	J	`jnl`	Level conversion for dual-supply systems. IEEE Trans. Very Large Scale Integr. Syst. Fujio Ishihara, Farhana Sheikh, Borivoje Nikolic
2004	—	`conf`	Low-density parity-check code constructions for hardware implementation. ICC Edward Liao, Engling Yeo, Borivoje Nikolic
2004	J	`jnl`	Methods for true energy-performance optimization. IEEE J. Solid State Circuits Dejan Markovic, Vladimir Stojanovic, Borivoje Nikolic, Mark A. Horowitz, Robert W. Brodersen
2004	—	`conf`	Phase-locked loop architecture for adaptive jitter optimization. ISCAS (4) Sokratis D. Vamvakos, Carl W. Werner, Borivoje Nikolic
2003	J	`jnl`	A 500-Mb/s soft-output Viterbi decoder. IEEE J. Solid State Circuits Engling Yeo, Stephanie Augsburger, W. Rhett Davis, Borivoje Nikolic
2003	A	`conf`	Level conversion for dual-supply systems. ISLPED Fujio Ishihara, Farhana Sheikh, Borivoje Nikolic
2003	—	`conf`	Power-performance optimal 64-bit carry-lookahead adders. ESSCIRC Radu Zlatanovici, Borivoje Nikolic
2003	C	`conf`	Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment. IEEE International Workshop on Rapid System Prototyping Chen Chang, Kimmo Kuusilinna, Brian C. Richards, Allen Chen, Nathan Chan, Robert W. Brodersen, Borivoje Nikolic
2002	J	`jnl`	A design environment for high-throughput low-power dedicated signal processing systems. IEEE J. Solid State Circuits W. Rhett Davis, Ning Zhang, Kevin Camera, Dejan Markovic, Tina Smilkstein, M. Josie Ammer, Engling Yeo, Stephanie Augsburger, Borivoje Nikolic, Robert W. Brodersen
2002	C	`conf`	Combining Dual-Supply, Dual-Threshold and Transistor Sizing for Power Reduction. ICCD Stephanie Augsburger, Borivoje Nikolic
2002	A	`conf`	Methods for true power minimization. ICCAD Robert W. Brodersen, Mark Horowitz, Dejan Markovic, Borivoje Nikolic, Vladimir Stojanovic
2001	—	`conf`	A design environment for high throughput, low power dedicated signal processing systems. CICC W. Rhett Davis, Ning Zhang, Kevin Camera, Fred Chen, Dejan Markovic, Nathan Chan, Borivoje Nikolic, Robert W. Brodersen
2001	A*	`conf`	Achieving 550Mhz in an ASIC Methodology. DAC David G. Chinnery, Borivoje Nikolic, Kurt Keutzer
2001	A	`conf`	Analysis and design of low-energy flip-flops. ISLPED Dejan Markovic, Borivoje Nikolic, Robert W. Brodersen
2001	A	`conf`	Design methodology for PicoRadio networks. DATE Julio Leao da Silva Jr., J. Shamberger, M. Josie Ammer, Chunlong Guo, Suet-Fei Li, Rahul C. Shah, Tim Tuan, Michael Sheets, Jan M. Rabaey, Borivoje Nikolic, Alberto L. Sangiovanni-Vincentelli, Paul K. Wright
2001	B	`conf`	High throughput low-density parity-check decoder architectures. GLOBECOM Engling Yeo, Payam Pakzad, Borivoje Nikolic, Venkat Anantharam
2001	B	`conf`	List Viterbi decoding with continuous error detection for magnetic recording. GLOBECOM Dragan Petrovic, Borivoje Nikolic, Kannan Ramchandran
2001	J	`jnl`	Reduced complexity sequence detection for high-order partial response channels. IEEE J. Sel. Areas Commun. Michael Leung, Borivoje Nikolic, Leo Ki-Chun Fu, Taehyun Jeon
2000	J	`jnl`	Clocked CMOS adiabatic logic with integrated single-phase power-clock supply. IEEE Trans. Very Large Scale Integr. Syst. Dragan Maksimovic, Vojin G. Oklobdzija, Borivoje Nikolic, K. Wayne Current
2000	J	`jnl`	Improved sense-amplifier-based flip-flop: design and measurements. IEEE J. Solid State Circuits Borivoje Nikolic, Vojin G. Oklobdzija, Vladimir Stojanovic, Wenyan Jia, James Kar-Shing Chiu, Michael Ming-Tak Leung
1999	—	`conf`	A rate 8/9 sliding block trellis code with stationary detector for magnetic recording. ICC Borivoje Nikolic, Michael Leung, Leo Ki-Chun Fu
1998	—	`conf`	CMOS implementation of low-power oscillators based on the modified Fabre-Normand current conveyor. ICECS Jelena Popovic, Borivoje Nikolic, K. Wayne Current, Aleksandra Pavasovic, Dragan Vasiljevic
1997	A	`conf`	Clocked CMOS adiabatic logic with integrated single-phase power-clock supply: experimental results. ISLPED Dragan Maksimovic, Vojin G. Oklobdzija, Borivoje Nikolic, K. Wayne Current