Bonan Yan - RankMe

57 papers A* 9A 8C 3Journal 23Unranked 13

Year	Rank	Type	Title / Venue / Authors
2026	A*	`conf`	ESTroM: Element-Flow Architecture for Processing Sparse Tractable Probabilistic Models. HPCA Anjunyi Fan, Xuejie Liu, Anji Liu, Qiuping Wu, Jiaqi Yang, Yuchao Qin, Guy Van den Broeck, Yitao Liang, Bonan Yan
2026	J	`jnl`	Efficient SRAM-PIM Co-Design by Joint Exploration of Value-Level and Bit-Level Sparsity. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Cenlin Duan, Jianlei Yang, Yikun Wang, Yiou Wang, Yingjie Qi, Xiaolin He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weisheng Zhao
2026	—	`conf`	M3DKV: Monolithic 3D Gain Cell Memory Enabled Efficient KV Cache & Processing. ASP-DAC Jiaqi Yang, Yanbo Su, Yihan Fu, Jianshi Tang, Bonan Yan
2025	J	`jnl`	A 28-nm 28.8-TOPS/W Attention-Based NN Processor With Correlative CIM Ring Architecture and Dataflow-Reshaped Digital-Assisted CIM Array. IEEE J. Solid State Circuits Ruiqi Guo, Zhiheng Yue, Yang Wang, Hao Li, Te Hu, Yabing Wang, Hao Sun, Jeng-Long Hsu, Yaojun Zhang, Bonan Yan, Leibo Liu, Ru Huang, Shaojun Wei, Shouyi Yin
2025	J	`jnl`	Efficient SRAM-PIM Co-design by Joint Exploration of Value-Level and Bit-Level Sparsity. CoRR Cenlin Duan, Jianlei Yang, Yikun Wang, Yiou Wang, Yingjie Qi, Xiaolin He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weisheng Zhao
2025	J	`jnl`	Non-Binary LDPC Arithmetic Error Correction For Processing-in-Memory. CoRR Daijing Shi, Yihang Zhu, Anjunyi Fan, Yaoyu Tao, Yuchao Yang, Bonan Yan
2025	A	`conf`	PEARL: FPGA-Based Reinforcement Learning Acceleration with Pipelined Parallel Environments. DATE Jiayi Li, Hongxiao Zhao, Wenshuo Yue, Yihan Fu, Daijing Shi, Anjunyi Fan, Yuchao Yang, Bonan Yan
2025	A*	`conf`	PROCA: Programmable Probabilistic Processing Unit Architecture with Accept/Reject Prediction & Multicore Pipelining for Causal Inference. HPCA Yihan Fu, Anjunyi Fan, Wenshuo Yue, Hongxiao Zhao, Daijing Shi, Qiuping Wu, Jiayi Li, Xiangyu Zhang, Yaoyu Tao, Yuchao Yang, Bonan Yan
2025	J	`jnl`	RAS: A Bit-Exact rANS Accelerator For High-Performance Neural Lossless Compression. CoRR Yuchao Qin, Anjunyi Fan, Bonan Yan
2024	J	`jnl`	AttentionLego: An Open-Source Building Block For Spatially-Scalable Large Language Model Accelerator With Processing-In-Memory Technology. CoRR Rongqing Cong, Wenyang He, Mingxuan Li, Bangning Luo, Zebin Yang, Yuchao Yang, Ru Huang, Bonan Yan
2024	J	`jnl`	DDC-PIM: Efficient Algorithm/Architecture Co-Design for Doubling Data Capacity of SRAM-Based Processing-in-Memory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Cenlin Duan, Jianlei Yang, Xiaolin He, Yingjie Qi, Yikun Wang, Yiou Wang, Ziyan He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weitao Pan, Weisheng Zhao
2024	J	`jnl`	Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators. CoRR Ruibao Wang, Bonan Yan
2024	A*	`conf`	MeMCISA: Memristor-Enabled Memory-Centric Instruction-Set Architecture for Database Workloads. MICRO Yihang Zhu, Lei Cai, Lianfeng Yu, Anjunyi Fan, Longhao Yan, Zhaokun Jing, Bonan Yan, Pek Jun Tiw, Yuqi Li, Yaoyu Tao, Yuchao Yang
2024	J	`jnl`	Probabilistic Compute-in-Memory Design for Efficient Markov Chain Monte Carlo Sampling. IEEE Trans. Circuits Syst. I Regul. Pap. Yihan Fu, Daijing Shi, Anjunyi Fan, Wenshuo Yue, Yuchao Yang, Ru Huang, Bonan Yan
2024	J	`jnl`	STAR: An Efficient Softmax Engine for Attention Model with RRAM Crossbar. CoRR Yifeng Zhai, Bing Li, Bonan Yan, Jing Wang
2024	A*	`conf`	Towards Efficient SRAM-PIM Architecture Design by Exploiting Unstructured Bit-Level Sparsity. DAC Cenlin Duan, Jianlei Yang, Yiou Wang, Yikun Wang, Yingjie Qi, Xiaolin He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weisheng Zhao
2024	J	`jnl`	Towards Efficient SRAM-PIM Architecture Design by Exploiting Unstructured Bit-Level Sparsity. CoRR Cenlin Duan, Jianlei Yang, Yiou Wang, Yikun Wang, Yingjie Qi, Xiaolin He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weisheng Zhao
2023	A	`conf`	Accelerating Neural-ODE Inference on FPGAs with Two-Stage Structured Pruning and History-based Stepsize Search. FPGA Lei Cai, Jing Wang, Lianfeng Yu, Bonan Yan, Yaoyu Tao, Yuchao Yang
2023	J	`jnl`	DDC-PIM: Efficient Algorithm/Architecture Co-design for Doubling Data Capacity of SRAM-based Processing-In-Memory. CoRR Cenlin Duan, Jianlei Yang, Xiaolin He, Yingjie Qi, Yikun Wang, Yiou Wang, Ziyan He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weitao Pan, Weisheng Zhao
2023	J	`jnl`	Fast and reconfigurable sort-in-memory system enabled by memristors. CoRR Lianfeng Yu, Yaoyu Tao, Teng Zhang, Zeyu Wang, Xile Wang, Zelun Pan, Bowen Wang, Zhaokun Jing, Jiaxin Liu, Yuqi Li, Yihang Zhu, Bonan Yan, Yuchao Yang
2023	J	`jnl`	Hadamard product-based in-memory computing design for floating point neural network training. Neuromorph. Comput. Eng. Anjunyi Fan, Yihan Fu, Yaoyu Tao, Zhonghua Jin, Haiyue Han, Huiyu Liu, Yaojun Zhang, Bonan Yan, Yuchao Yang, Ru Huang
2023	—	`conf`	Live Demonstration: SRAM Compute-In-Memory Based Visual & Aural Recognition System. AICAS Anjunyi Fan, Bo Hu, Zhonghua Jin, Haiyue Han, Yaojun Zhang, Yue Yang, Yuchao Yang, Bonan Yan, Ru Huang
2023	J	`jnl`	Memristive dynamics enabled neuromorphic computing systems. Sci. China Inf. Sci. Bonan Yan, Yuchao Yang, Ru Huang
2023	J	`jnl`	Probabilistic Compute-in-Memory Design For Efficient Markov Chain Monte Carlo Sampling. CoRR Yihan Fu, Daijing Shi, Anjunyi Fan, Wenshuo Yue, Yuchao Yang, Ru Huang, Bonan Yan
2023	—	`conf`	SRAM-Based Processing-In-Memory Design with Kullback-Leibler Divergence-Based Dynamic Precision Quantization. ACM Great Lakes Symposium on VLSI Yanjun Li, Chunshan Zu, Bingqian Wang, Zhenhua Zhu, Yaojun Zhang, Ran Duan, Bing Li, Bonan Yan
2023	A	`conf`	STAR: An Efficient Softmax Engine for Attention Model with RRAM Crossbar. DATE Yifeng Zhai, Bing Li, Bonan Yan, Jing Wang
2022	—	`conf`	A 1.041-Mb/mm ISSCC Bonan Yan, Jeng-Long Hsu, Pang-Cheng Yu, Chia-Chi Lee, Yaojun Zhang, Wenshuo Yue, Guoqiang Mei, Yuchao Yang, Yue Yang, Hai Li, Yiran Chen, Ru Huang
2022	A*	`conf`	ASTERS: adaptable threshold spike-timing neuromorphic design with twin-column ReRAM synapses. DAC Ziru Li, Qilin Zheng, Bonan Yan, Ru Huang, Bing Li, Yiran Chen
2022	—	`conf`	Heterogeneous Memory Architecture Accommodating Processing-in-Memory on SoC for AIoT Applications. ASP-DAC Kangyi Qiu, Yaojun Zhang, Bonan Yan, Ru Huang
2022	J	`jnl`	Memristive devices based hardware for unlabeled data processing. Neuromorph. Comput. Eng. Zhuojian Xiao, Bonan Yan, Teng Zhang, Ru Huang, Yuchao Yang
2022	J	`jnl`	VSDCA: A Voltage Sensing Differential Column Architecture Based on 1T2R RRAM Array for Computing-in-Memory Accelerators. IEEE Trans. Circuits Syst. I Regul. Pap. Zhaokun Jing, Bonan Yan, Yuchao Yang, Ru Huang
2020	—	`—`	Highly Efficient Neuromorphic Computing Systems With Emerging Nonvolatile Memories. Bonan Yan
2020	A*	`conf`	Lattice: An ADC/DAC-less ReRAM-based Processing-In-Memory Architecture for Accelerating Deep Convolution Neural Networks. DAC Qilin Zheng, Zongwei Wang, Zishun Feng, Bonan Yan, Yimao Cai, Ru Huang, Yiran Chen, Chia-Lin Yang, Hai Helen Li
2020	A*	`conf`	ReSiPE: ReRAM-based Single-Spiking Processing-In-Memory Engine. DAC Ziru Li, Bonan Yan, Hai Helen Li
2020	A	`conf`	ReTransformer: ReRAM-based Processing-in-Memory Architecture for Transformer Acceleration. ICCAD Xiaoxuan Yang, Bonan Yan, Hai Li, Yiran Chen
2019	—	`conf`	An Overview of In-memory Processing with Emerging Non-volatile Memory for Data-intensive Applications. ACM Great Lakes Symposium on VLSI Bing Li, Bonan Yan, Hai Li
2019	J	`jnl`	An Overview of In-memory Processing with Emerging Non-volatile Memory for Data-intensive Applications. CoRR Bing Li, Bonan Yan, Hai Li
2019	—	`conf`	Build reliable and efficient neuromorphic design with memristor technology. ASP-DAC Bing Li, Bonan Yan, Chenchen Liu, Hai (Helen) Li
2019	A	`conf`	Hardware Fault Tolerance for Binary RRAM Crossbars. ITC Arjun Chaudhuri, Bonan Yan, Yiran Chen, Krishnendu Chakrabarty
2019	J	`jnl`	Resistive Memory-Based In-Memory Computing: From Device and Large-Scale Integration System Perspectives. Adv. Intell. Syst. Bonan Yan, Bing Li, Ximing Qiao, Cheng-Xin Xue, Meng-Fan Chang, Yiran Chen, Hai Helen Li
2018	A*	`conf`	A neuromorphic design using chaotic mott memristor with relaxation oscillation. DAC Bonan Yan, Xiong Cao, Hai (Helen) Li
2018	J	`jnl`	Challenges of memristor based neuromorphic computing system. Sci. China Inf. Sci. Bonan Yan, Yiran Chen, Hai Li
2018	A	`conf`	Exploring the opportunity of implementing neuromorphic computing systems with spintronic devices. DATE Bonan Yan, Fan Chen, Yaojun Zhang, Chang Song, Hai Li, Yiran Chen
2017	A	`conf`	A closed-loop design to enhance weight stability of memristor based neural network chips. ICCAD Bonan Yan, Jianhua Joshua Yang, Qing Wu, Yiran Chen, Hai Li
2017	J	`jnl`	Giant Spin-Hall assisted STT-RAM and logic design. Integr. Enes Eken, Ismail Bayram, Yaojun Zhang, Bonan Yan, Wenqing Wu, Hai (Helen) Li, Yiran Chen
2017	—	`conf`	Low-power neuromorphic speech recognition engine with coarse-grain sparsity. ASP-DAC Shunti Yin, Deepak Kadetotad, Bonan Yan, Chang Song, Yiran Chen, Chaitali Chakrabarti, Jae-sun Seo
2017	J	`jnl`	Persistent and Nonpersistent Error Optimization for STT-RAM Cell Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yaojun Zhang, Bonan Yan, Xiaobin Wang, Yiran Chen
2016	—	`conf`	A Memristor Crossbar Based Computing Engine Optimized for High Speed and Accuracy. ISVLSI Chenchen Liu, Qing Yang, Bonan Yan, Jianlei Yang, Xiaocong Du, Weijie Zhu, Hao Jiang, Qing Wu, Mark Barnell, Hai Li
2016	C	`conf`	A neuromorphic ASIC design using one-selector-one-memristor crossbar. ISCAS Bonan Yan, Amr Mahmoud Mahmoud, Jianhua Joshua Yang, Qing Wu, Yiran Chen, Hai (Helen) Li
2016	—	`conf`	Spin-Hall Assisted STT-RAM Design and Discussion. SLIP Enes Eken, Ismail Bayram, Yaojun Zhang, Bonan Yan, Wenqing Wu, Hai (Helen) Li, Yiran Chen
2015	—	`conf`	A High-Speed Robust NVM-TCAM Design Using Body Bias Feedback. ACM Great Lakes Symposium on VLSI Bonan Yan, Zheng Li, Yaojun Zhang, Jianlei Yang, Hai Li, Weisheng Zhao, Pierre Chor-Fung Chia
2015	C	`conf`	A new self-reference sensing scheme for TLC MRAM. ISCAS Zheng Li, Bonan Yan, Lun Yang, Weisheng Zhao, Yiran Chen, Hai Li
2015	A*	`conf`	A spiking neuromorphic design with resistive crossbar. DAC Chenchen Liu, Bonan Yan, Chaofei Yang, Linghao Song, Zheng Li, Beiye Liu, Yiran Chen, Hai Li, Qing Wu, Hao Jiang
2015	C	`conf`	An overview on memristor crossabr based neuromorphic circuit and architecture. VLSI-SoC Zheng Li, Chenchen Liu, Yandan Wang, Bonan Yan, Chaofei Yang, Jianlei Yang, Hai Li
2015	A	`conf`	Giant spin hall effect (GSHE) logic design for low power application. DATE Yaojun Zhang, Bonan Yan, Wenqing Wu, Hai Li, Yiran Chen
2015	—	`conf`	Recent progresses of STT memory design and applications. ASICON Bonan Yan, Yaojun Zhang, Enes Eken, Wujie Wen, Weisheng Zhao, Yiran Chen
2015	—	`conf`	Spiking-based matrix computation by leveraging memristor crossbar array. CISDA Hai (Helen) Li, Chenchen Liu, Bonan Yan, Chaofei Yang, Linghao Song, Zheng Li, Yiran Chen, Weijie Zhu, Qing Wu, Hao Jiang