Bodhisatwa Sadhu

36 papers C 1Journal 18Unranked 17
YearRankTypeTitle / Venue / Authors
2026 — conf
22.2 A 16-Channel Low-Power Cryo-CMOS Flux Control Pulse Generator ASIC in 14nm FinFET Technology.
ISSCC
Kevin Tien, David J. Frank, John F. Bulzacchelli, Pat Rosno, Daniel Moertl, John Timmerwilke, Ari Noori, Devin Underwood, Ken Inoue, Subhajit Ray, Daniel Ramirez, Timothy J. Schmerbeck, Bryce Snell, Jeremy Ekman, Ryan Black, Mark Yeck, Tom Haselhorst, Emma Erickson, Kevin Demsky, Christian W. Baks, Jonathan Kaus, Andrea Ruffino, Pier Andrea Francese, Andy Davies, Sudipto Chakraborty, Scott Lekuch, Brian P. Gaucher, Bodhisatwa Sadhu, Scott Willenborg, Daniel J. Friedman
2025 — conf
Cryogenic CMOS Circuits for Future Scaled Quantum Computing Systems: Challenges and Solutions.
CICC
Bodhisatwa Sadhu, Kevin Tien, Sudipto Chakraborty, David J. Frank, Pat Rosno, Daniel Moertl, Mark Yeck, John F. Bulzacchelli, Daniil Frolov, Devin Underwood, Ken Inoue, Christian W. Baks, Daniel Ramirez, Jeremy Ekman, Ryan Black, Timothy J. Schmerbeck, Ray Richetta, Dereje Yilma, Andrew Davies, Joseph A. Glick, Dorothy Wisnieff, Bryce Snell, John Timmerwilke, Raphael Robertazzi, George Zettles, Scott Lekuch, Scott Willenborg, Brian P. Gaucher, Daniel J. Friedman
2024 J jnl
A 24 to 30-GHz Phased Array Transceiver Front End With 2.8 to 3.1-dB RX NF and 22 to 24% TX Peak Efficiency.
IEEE J. Solid State Circuits
Wooram Lee, Caglar Ozdag, Jean-Olivier Plouchart, Alberto Valdes-Garcia, Bodhisatwa Sadhu
2023 J jnl
A 24-30GHz Power Amplifier with >20-dBm Psat and <0.1-dB AM-AM Distortion for 5G Applications in 130-nm SiGe BiCMOS.
IEICE Trans. Electron.
Chihiro Kamidaki, Yuma Okuyama, Tatsuo Kubo, Wooram Lee, Caglar Ozdag, Bodhisatwa Sadhu, Yo Yamaguchi, Ning Guan
2022 J jnl
A 24-30-GHz 256-Element Dual-Polarized 5G Phased Array Using Fast On-Chip Beam Calculators and Magnetoelectric Dipole Antennas.
IEEE J. Solid State Circuits
Bodhisatwa Sadhu, Arun Paidimarri, Duixian Liu, Mark Yeck, Caglar Ozdag, Yujiro Tojo, Wooram Lee, Kevin Xiaoxiong Gu, Jean-Olivier Plouchart, Christian W. Baks, Yusuke Uemichi, Sudipto Chakraborty, Yo Yamaguchi, Ning Guan, Alberto Valdes-Garcia
2022 — conf
A 24-to-30GHz 256-Element Dual-Polarized 5G Phased Array with Fast Beam-Switching Support for >30, 000 Beams.
ISSCC
Bodhisatwa Sadhu, Arun Paidimarri, Wooram Lee, Mark Yeck, Caglar Ozdag, Yujiro Tojo, Jean-Olivier Plouchart, Xiaoxiong Gu, Yusuke Uemichi, Sudipto Chakraborty, Yo Yamaguchi, Ning Guan, Alberto Valdes-Garcia
2021 — conf
Session 14 Overview: mm-Wave Transceivers for Communication and Radar Wireless Subcommittee.
ISSCC
Bodhisatwa Sadhu, Matteo Bassi, Vito Giannini
2020 J jnl
A 250-mW 60-GHz CMOS Transceiver SoC Integrated With a Four-Element AiP Providing Broad Angular Link Coverage.
IEEE J. Solid State Circuits
Bodhisatwa Sadhu, Alberto Valdes-Garcia, Jean-Olivier Plouchart, Herschel A. Ainspan, Arpit K. Gupta, Mark A. Ferriss, Mark Yeck, Mihai Sanduleanu, Xiaoxiong Gu, Christian W. Baks, Duixian Liu, Daniel J. Friedman
2018 — conf
A 128-element Dual-Polarized Software-Defined Phased Array Radio for mm-wave 5G Experimentation.
mmNets
Bodhisatwa Sadhu, Arun Paidimarri, Mark A. Ferriss, Mark Yeck, Xiaoxiong Gu, Alberto Valdes-Garcia
2018 J jnl
A Fully Decoupled LC Tank VCO Topology for Amplitude Boosted Low Phase Noise Operation.
IEEE J. Solid State Circuits
Bodhisatwa Sadhu, Tejasvi Anand, Scott K. Reynolds
2018 — conf
Antenna-in-package design and module integration for millimeter-wave communication and 5G.
VLSI-DAT
Xiaoxiong Gu, Bodhisatwa Sadhu, Duixian Liu, Christian W. Baks, Alberto Valdes-Garcia
2018 — conf
Circuit and antenna-in-package innovations for scaled mmWave 5G phased array modules.
CICC
Alberto Valdes-Garcia, Bodhisatwa Sadhu, Xiaoxiong Gu, Yahya M. Tousi, Duixian Liu, Scott K. Reynolds, Joakim Hallin, Stefan Sahl, Leonard Rexberg
2018 — conf
Scaling Millimeter-Wave Phased Arrays: Challenges and Solutions.
BCICTS
Alberto Valdes-Garcia, Bodhisatwa Sadhu, Xiaoxiong Gu, Jean-Olivier Plouchart, Mark Yeck, Daniel J. Friedman
2017 — conf
7.2 A 28GHz 32-element phased-array transceiver IC with concurrent dual polarized beams and 1.4 degree beam-steering resolution for 5G communication.
ISSCC
Bodhisatwa Sadhu, Yahya M. Tousi, Joakim Hallin, Stefan Sahl, Scott K. Reynolds, Orjan Renstrom, Kristoffer Sjogren, Olov Haapalahti, Nadav Mazor, Bo Bokinge, Gustaf Weibull, Håkan Bengtsson, Anders Carlinger, Eric Westesson, Jan-Erik Thillberg, Leonard Rexberg, Mark Yeck, Xiaoxiong Gu, Daniel J. Friedman, Alberto Valdes-Garcia
2017 J jnl
A 28-GHz 32-Element TRX Phased-Array IC With Concurrent Dual-Polarized Operation and Orthogonal Phase and Gain Control for 5G Communications.
IEEE J. Solid State Circuits
Bodhisatwa Sadhu, Yahya M. Tousi, Joakim Hallin, Stefan Sahl, Scott K. Reynolds, Orjan Renstrom, Kristoffer Sjogren, Olov Haapalahti, Nadav Mazor, Bo Bokinge, Gustaf Weibull, Håkan Bengtsson, Anders Carlinger, Eric Westesson, Jan-Erik Thillberg, Leonard Rexberg, Mark Yeck, Xiaoxiong Gu, Mark A. Ferriss, Duixian Liu, Daniel J. Friedman, Alberto Valdes-Garcia
2017 J jnl
Introduction to the Special Section on the 2016 IEEE BCTM and IEEE CSICS.
IEEE J. Solid State Circuits
Bodhisatwa Sadhu, Sorin P. Voinigescu
2016 — conf
10.8 A 12-to-26GHz fractional-N PLL with dual continuous tuning LC-D/VCOs.
ISSCC
Mark A. Ferriss, Bodhisatwa Sadhu, Alexander V. Rylyakov, Herschel A. Ainspan, Daniel J. Friedman
2015 — conf
10.9 A 13.1-to-28GHz fractional-N PLL in 32nm SOI CMOS with a ΔΣ noise-cancellation scheme.
ISSCC
Mark A. Ferriss, Bodhisatwa Sadhu, Alexander V. Rylyakov, Herschel A. Ainspan, Daniel J. Friedman
2015 J jnl
A 52 GHz Frequency Synthesizer Featuring a 2nd Harmonic Extraction Technique That Preserves VCO Performance.
IEEE J. Solid State Circuits
Bodhisatwa Sadhu, Mark A. Ferriss, Alberto Valdes-Garcia
2015 J jnl
W-band scalable phased arrays for imaging and communications.
IEEE Commun. Mag.
Xiaoxiong Gu, Alberto Valdes-Garcia, Arun Natarajan, Bodhisatwa Sadhu, Duixian Liu, Scott K. Reynolds
2014 J jnl
Adaptive Circuit Design Methodology and Test Applied to Millimeter-Wave Circuits.
IEEE Des. Test
Jean-Olivier Plouchart, Fa Wang, Xin Li, Benjamin D. Parker, Mihai A. T. Sanduleanu, Andreea Balteanu, Bodhisatwa Sadhu, Alberto Valdes-Garcia, Daniel J. Friedman
2014 J jnl
Building an on-chip spectrum sensor for cognitive radios.
IEEE Commun. Mag.
Bodhisatwa Sadhu, Martin Sturm, Brian M. Sadler, Ramesh Harjani
2014 J jnl
Indirect Performance Sensing for On-Chip Self-Healing of Analog and RF Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap.
Shupeng Sun, Fa Wang, Soner Yaldiz, Xin Li, Lawrence T. Pileggi, Arun Natarajan, Mark A. Ferriss, Jean-Olivier Plouchart, Bodhisatwa Sadhu, Benjamin D. Parker, Alberto Valdes-Garcia, Mihai A. T. Sanduleanu, José A. Tierno, Daniel J. Friedman
2013 J jnl
A 23.5 GHz PLL With an Adaptively Biased VCO in 32 nm SOI-CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jean-Olivier Plouchart, Mark A. Ferriss, Arun Natarajan, Alberto Valdes-Garcia, Bodhisatwa Sadhu, Alexander V. Rylyakov, Benjamin D. Parker, Michael P. Beakes, Aydin Babakhani, Soner Yaldiz, Larry T. Pileggi, Ramesh Harjani, Scott K. Reynolds, José A. Tierno, Daniel J. Friedman
2013 J jnl
A linearized, low-phase-noise VCO-based 25-GHz PLL with autonomic biasing.
IEEE J. Solid State Circuits
Bodhisatwa Sadhu, Mark A. Ferriss, Arun Natarajan, Soner Yaldiz, Jean-Olivier Plouchart, Alexander V. Rylyakov, Alberto Valdes-Garcia, Benjamin D. Parker, Aydin Babakhani, Scott K. Reynolds, Xin Li, Lawrence T. Pileggi, Ramesh Harjani, José A. Tierno, Daniel J. Friedman
2013 J jnl
An Integral Path Self-Calibration Scheme for a Dual-Loop PLL.
IEEE J. Solid State Circuits
Mark A. Ferriss, Jean-Olivier Plouchart, Arun Natarajan, Alexander V. Rylyakov, Benjamin D. Parker, José A. Tierno, Aydin Babakhani, Soner Yaldiz, Alberto Valdes-Garcia, Bodhisatwa Sadhu, Daniel J. Friedman
2013 J jnl
Analysis and Design of a 5 GS/s Analog Charge-Domain FFT for an SDR Front-End in 65 nm CMOS.
IEEE J. Solid State Circuits
Bodhisatwa Sadhu, Martin Sturm, Brian M. Sadler, Ramesh Harjani
2013 J jnl
Correction to "A Linearized, Low Phase Noise VCO Based 25 GHz PLL With Autonomic Biasing".
IEEE J. Solid State Circuits
Bodhisatwa Sadhu, Mark A. Ferriss, Arun S. Natarajan, Soner Yaldiz, Jean-Olivier Plouchart, Alexander V. Rylyakov, Alberto Valdes-Garcia, Benjamin D. Parker, Aydin Babakhani, Scott K. Reynolds, Xin Li, Lawrence T. Pillage, Ramesh Harjani, José A. Tierno, Daniel J. Friedman
2013 — conf
Indirect performance sensing for on-chip analog self-healing via Bayesian model fusion.
CICC
Shupeng Sun, Fa Wang, Soner Yaldiz, Xin Li, Lawrence T. Pileggi, Arun Natarajan, Mark A. Ferriss, Jean-Olivier Plouchart, Bodhisatwa Sadhu, Benjamin D. Parker, Alberto Valdes-Garcia, Mihai A. T. Sanduleanu, José A. Tierno, Daniel J. Friedman
2013 J jnl
Multi-Beam Spatio-Spectral Beamforming Receiver for Wideband Phased Arrays.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sachin Kalia, Satwik A. Patnaik, Bodhisatwa Sadhu, Martin Sturm, Mohammad Elbadry, Ramesh Harjani
2012 — conf
A 23.5GHz PLL with an adaptively biased VCO in 32nm SOI-CMOS.
CICC
Jean-Olivier Plouchart, Mark A. Ferriss, Arun Natarajan, Alberto Valdes-Garcia, Bodhisatwa Sadhu, Alexander V. Rylyakov, Benjamin D. Parker, Michael P. Beakes, Aydin Babakhani, Soner Yaldiz, Lawrence T. Pileggi, Ramesh Harjani, Scott K. Reynolds, José A. Tierno, Daniel J. Friedman
2012 — conf
An 8GHz multi-beam spatio-spectral beamforming receiver using an all-passive discrete time analog baseband in 65nm CMOS.
CICC
Satwik A. Patnaik, Sachin Kalia, Bodhisatwa Sadhu, Martin Sturm, Mohammad Elbadry, Ramesh Harjani
2012 — conf
An integral path self-calibration scheme for a 20.1-26.7GHz dual-loop PLL in 32nm SOI CMOS.
VLSIC
Mark A. Ferriss, Jean-Olivier Plouchart, Arun Natarajan, Alexander V. Rylyakov, Benjamin D. Parker, Aydin Babakhani, Soner Yaldiz, Bodhisatwa Sadhu, Alberto Valdes-Garcia, José A. Tierno, Daniel J. Friedman
2010 C conf
Capacitor bank design for wide tuning range LC VCOs: 850MHz-7.1GHz (157%).
ISCAS
Bodhisatwa Sadhu, Ramesh Harjani
2009 — conf
A CMOS 3.3-8.4 GHz wide tuning range, low phase noise LC VCO.
CICC
Bodhisatwa Sadhu, Jaehyup Kim, Ramesh Harjani
2008 — conf
Modeling and synthesis of wide-band switched-resonators for VCOs.
CICC
Bodhisatwa Sadhu, Umaikhe E. Omole, Ramesh Harjani