Blaise Tine

16 papers A* 1A 2B 2Misc 1Journal 6Unranked 3
YearRankTypeTitle / Venue / Authors
2026 B conf
Inside VOLT: Designing an Open-Source GPU Compiler (Tool).
CC
Shinnung Jeong, Chihyo Ahn, Huanzhi Pu, Jisheng Zhao, Hyesoon Kim, Blaise Tine
2025 J jnl
A Configurable Mixed-Precision Fused Dot Product Unit for GPGPU Tensor Computation.
CoRR
Nikhil Rout, Blaise Tine
2025 B conf
Analysis of the RISC-V Vector Extension for Vulkan Graphics Kernels.
ISPASS
Martin Troiber, Martin Schulz, Blaise Tine, Hyesoon Kim
2025 J jnl
Inside VOLT: Designing an Open-Source GPU Compiler.
CoRR
Shinnung Jeong, Chihyo Ahn, Huanzhi Pu, Jisheng Zhao, Hyesoon Kim, Blaise Tine
2025 J jnl
Multiport Support for Vortex OpenGPU Memory Hierarchy.
CoRR
Injae Shin, Blaise Tine
2025 Misc conf
SoftCUDA: Running CUDA on Softcore GPU.
FCCM
Chihyo Ahn, Ruobing Han, Udit Subramanya, Jisheng Zhao, Blaise Tine, Hyesoon Kim
2024 — conf
Towards "True" GPU Performance Scaling for OpenGPU.
HCS
Blaise Tine, Hyesoon Kim
2024 — —
Vertical Integration in Open-Source Hardware-Software Co-Design for Accelerator Architecture Research.
Blaise Tine
2023 — conf
Skybox: Open-Source Graphic Rendering on Programmable RISC-V GPUs.
ASPLOS (3)
Blaise Tine, Varun Saxena, Santosh Srivatsan, Joshua R. Simpson, Fadi Alzammar, Liam Cooper, Hyesoon Kim
2022 — conf
Accelerating Graphic Rendering on Programmable RISC-V GPUs.
HCS
Blaise Tine, Varun Saxena, Santosh Srivatsan, Joshua R. Simpson, Fadi Alzammar, Liam Paul Cooper, Sam Jijina, Swetha Rajagoplan, Tejaswini Anand Kumar, Jeffrey Young, Hyesoon Kim
2021 J jnl
Supporting CUDA for an extended RISC-V GPU architecture.
CoRR
Ruobing Han, Blaise Tine, Jaewon Lee, Jaewoong Sim, Hyesoon Kim
2021 A* conf
Vortex: Extending the RISC-V ISA for GPGPU and 3D-Graphics.
MICRO
Blaise Tine, Krishna Praveen Yalamarthy, Fares Elsabbagh, Hyesoon Kim
2021 J jnl
Vortex: Extending the RISC-V ISA for GPGPU and 3D-GraphicsResearch.
CoRR
Blaise Tine, Fares Elsabbagh, Krishna Praveen Yalamarthy, Hyesoon Kim
2020 A conf
Cash: A Single-Source Hardware-Software Codesign Framework for Rapid Prototyping.
FPGA
Blaise Tine, Fares Elsabbagh, Seyong Lee, Jeffrey S. Vetter, Hyesoon Kim
2020 A conf
Productive Hardware Designs using Hybrid HLS-RTL Development.
FPGA
Blaise Tine, Seyong Lee, Jeffrey S. Vetter, Hyesoon Kim
2020 J jnl
Vortex: OpenCL Compatible RISC-V GPGPU.
CoRR
Fares Elsabbagh, Blaise Tine, Priyadarshini Roshan, Ethan Lyons, Euna Kim, Da Eun Shim, Lingjun Zhu, Sung Kyu Lim, Hyesoon Kim