Bita Gorjiara

16 papers A* 2A 2C 4Misc 1Journal 3Unranked 4
YearRankTypeTitle / Venue / Authors
2008 A* conf
Automatic architecture refinement techniques for customizing processing elements.
DAC
Bita Gorjiara, Daniel Gajski
2008 A* conf
C-based design flow: a case study on G.729A for voice over internet protocol (VoIP).
DAC
Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski
2008 J jnl
Merged Dictionary Code Compression for FPGA Implementation of Custom Microcoded PEs.
ACM Trans. Reconfigurable Technol. Syst.
Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski
2007 C conf
A novel profile-driven technique for simultaneous power and code-size optimization of microcoded IPs.
ICCD
Bita Gorjiara, Daniel Gajski
2007 A conf
FPGA-friendly code compression for horizontal microcoded custom IPs.
FPGA
Bita Gorjiara, Daniel Gajski
2007 — conf
Integrating Power Management into Distributed Real-time Systems at Very Low Implementation Cost.
ASP-DAC
Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
2007 J jnl
Ultra-fast and efficient algorithm for energy optimization by gradient-based stochastic voltage and task scheduling.
ACM Trans. Design Autom. Electr. Syst.
Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
2006 C conf
A Graph Based Algorithm for Data Path Optimization in Custom Processors.
DSD
Jelena Trajkovic, Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski
2006 C conf
Aspect-Oriented Architecture Description for Retargetable Compilation, Simulation and Synthesis of Application-Specific Pipelined Datapaths .
ICCD
Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski
2006 — conf
Designing a custom architecture for DCT using NISC technology.
ASP-DAC
Bita Gorjiara, Mehrdad Reshadi, Daniel D. Gajski
2006 J jnl
Generic Processor Modeling for Automatically Generating Very Fast Cycle-Accurate Simulators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mehrdad Reshadi, Bita Gorjiara, Nikil D. Dutt
2006 Misc conf
Generic netlist representation for system and PE level design exploration.
CODES+ISSS
Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah, Daniel Gajski
2005 — conf
Custom Processor Design Using NISC: A Case-Study on DCT algorithm.
ESTIMedia
Bita Gorjiara, Daniel D. Gajski
2005 C conf
Utilizing Horizontal and Vertical Parallelism with a No-Instruction-Set Compiler for Custom Datapaths.
ICCD
Mehrdad Reshadi, Bita Gorjiara, Daniel D. Gajski
2004 A conf
An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes.
ISLPED
Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
2004 — conf
Fast and efficient voltage scheduling by evolutionary slack distribution.
ASP-DAC
Bita Gorjiara, Pai H. Chou, Nader Bagherzadeh, Mehrdad Reshadi, David W. Jensen