Bishnu Prasad Das

41 papers A* 1C 4Misc 6Journal 16Unranked 14

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	A Unified Approach to a Secure and Lightweight Mutual Authentication Protocol Using Pre-Characterized COTS SRAM ICs for IoT Applications. ACM Trans. Embed. Comput. Syst. Aranya Gupta, Amit Surpur, Bishnu Prasad Das, Sanjeev Kumar Manhas
2025	J	`jnl`	Light-Weight Low-Latency Reconfigurable CORDIC Architecture With a New Non-Power-of-2 Angle Set of Microrotations. IEEE Trans. Circuits Syst. I Regul. Pap. Anu Verma, Bishnu Prasad Das
2025	—	`conf`	Light-Weight Resilient Flip-flop for Error Detection and Same-cycle Correction in Pipelined Designs. SOCC Faraz Ahmad, Bishnu Prasad Das
2024	Misc	`conf`	A Low Power Dual-Band Sub-Sampling Phase Locked Loop with sub-100 fs RMS Jitter and jitter. VLSID Anshul Verma, Bishnu Prasad Das
2024	C	`conf`	A Peak-detector-based Ultra Low Power ECG ASIC for Early Detection of Cardio-Vascular Diseases. ISCAS Sidharth Thomas, Jaskirat Singh Virdi, Anshul Verma, Bishnu Prasad Das, Kenichi Okada, Pratap Narayan Singh
2024	C	`conf`	PVT-Insensitive Time-Domain-based In-Memory Computation with Improved Linearity for Binary Neural Networks. ISCAS Amandeep Singh, Bishnu Prasad Das
2024	J	`jnl`	Process-Variation-Aware In-Memory Computation With Improved Linearity Using On-Chip Configurable Current-Steering Thermometric DAC. IEEE Trans. Circuits Syst. I Regul. Pap. Prasanna Kumar Saragada, Bishnu Prasad Das
2023	J	`jnl`	An Efficient Scaling-Free Folded Hyperbolic CORDIC Design Using a Novel Low-Complexity Power-of-2 Taylor Series Approximation. IEEE Trans. Very Large Scale Integr. Syst. Anu Verma, Khyati Kiyawat, Bishnu Prasad Das, Pramod Kumar Meher
2023	—	`conf`	Area-Efficient In-Memory Computation with Improved Linearity using Voltage-Controlled Delay Cell-based Ring Oscillator. iSES Amandeep Singh, Bishnu Prasad Das
2023	Misc	`conf`	Lightweight Approximate Multiplier with Improved Accuracy in FPGA for Error Resilient Application. VLSID Apurba Prasad Padhy, Bishnu Prasad Das
2023	Misc	`conf`	Ultra-Low Power Non-Uniform SAR ADC based ECG detector for Early Detection of Cardiovascular Diseases. VLSID Aditya Ramkumar, Anshul Verma, Bishnu Prasad Das
2022	—	`conf`	Highly Non-linear Feed-Forward Arbiter PUF Against Machine Learning Attacks. VDAT Aranya Gupta, Sanjeev Manhas, Bishnu Prasad Das
2022	J	`jnl`	In-Memory Computation With Improved Linearity Using Adaptive Sparsity-Based Compact Thermometric Code. IEEE Trans. Very Large Scale Integr. Syst. Prasanna Kumar Saragada, Bishnu Prasad Das
2022	—	`conf`	Low Power Dual-Band Current Reuse-based LC-Voltage Controlled Oscillator with Shared Inductor for IoT Applications. VDAT Anshul Verma, Bishnu Prasad Das
2022	C	`conf`	RISC-V Core with Approximate Multiplier for Error-Tolerant Applications. DSD Anu Verma, Priyamvada Sharma, Bishnu Prasad Das
2019	—	`conf`	A True Single-Phase Error Masking Flip-Flop with Reduced Clock Power for Near-Threshold Designs. VDAT Priyamvada Sharma, Bishnu Prasad Das
2019	—	`conf`	An In-Memory Architecture for Machine Learning Classifier Using Logistic Regression. iSES Prasanna Kumar Saragada, Meghnath Rathod, Bishnu Prasad Das
2019	J	`jnl`	An optimal device sizing for a performance-driven and area-efficient subthreshold cell library for IoT applications. Microelectron. J. Priyamvada Sharma, Poorvi Jain, Bishnu Prasad Das
2019	—	`conf`	Low Latency Scaling-Free Pipeline CORDIC Architecture Using Augmented Taylor Series. iSES Sumit Satyavijay Wadkar, Bishnu Prasad Das, Pramod Kumar Meher
2018	J	`jnl`	Low Overhead Warning Flip-Flop Based on Charge Sharing for Timing Slack Monitoring. IEEE Trans. Very Large Scale Integr. Syst. Govinda Sannena, Bishnu Prasad Das
2018	J	`jnl`	Metastability immune and area efficient error masking flip-flop for timing error resilient designs. Integr. Govinda Sannena, Bishnu Prasad Das
2017	—	`conf`	A 10T Subthreshold SRAM Cell with Minimal Bitline Switching for Ultra-Low Power Applications. VDAT Swaati, Bishnu Prasad Das
2017	Misc	`conf`	Within-Die Threshold Voltage Variability Estimation Using Reconfigurable Ring Oscillator. VLSID Poorvi Jain, Bishnu Prasad Das
2016	—	`conf`	A Metastability Immune Timing Error Masking Flip-Flop for Dynamic Variation Tolerance. ACM Great Lakes Symposium on VLSI Govinda Sannena, Bishnu Prasad Das
2016	—	`conf`	Area and Power-Efficient Timing Error Predictor for Dynamic Voltage and Frequency Scaling Application. iNIS Govinda Sannena, Bishnu Prasad Das
2014	—	`conf`	Building trusted ICs using split fabrication. HOST Kaushik Vaidyanathan, Bishnu Prasad Das, Huseyin Ekin Sumbul, Renzhi Liu, Larry T. Pileggi
2014	A*	`conf`	Detecting Reliability Attacks during Split Fabrication using Test-only BEOL Stack. DAC Kaushik Vaidyanathan, Bishnu Prasad Das, Larry T. Pileggi
2014	J	`jnl`	Frequency-Independent Warning Detection Sequential for Dynamic Voltage and Frequency Scaling in ASICs. IEEE Trans. Very Large Scale Integr. Syst. Bishnu Prasad Das, Hidetoshi Onodera
2014	J	`jnl`	On-Chip Measurement of Rise/Fall Gate Delay Using Reconfigurable Ring Oscillator. IEEE Trans. Circuits Syst. II Express Briefs Bishnu Prasad Das, Hidetoshi Onodera
2013	J	`jnl`	Generating rules from data mining for collaboration moderator services. J. Intell. Manuf. Claire Palmer, Jennifer A. Harding, Rahul Swarnkar, Bishnu Prasad Das, Robert I. M. Young
2012	J	`jnl`	A framework for collaboration moderator services to support knowledge based collaboration. J. Intell. Manuf. Rahul Swarnkar, Alok Kumar Choudhary, Jenny A. Harding, Bishnu Prasad Das, Robert I. M. Young
2012	—	`conf`	Application of Collaboration Moderator Service in Pharmaceutical Industry: A Collaborative Drug Discovery Use Case. I-ESA Rahul Swarnkar, Jennifer A. Harding, Bishnu Prasad Das, Robert I. M. Young, Sri Krishna Kumar
2012	J	`jnl`	Area-efficient reconfigurable-array-based oscillator for standard cell characterisation. IET Circuits Devices Syst. Bishnu Prasad Das, Hidetoshi Onodera
2010	C	`conf`	Learning Collaboration Moderator Services: Supporting Knowledge Based Collaboration. PRO-VE Alok Kumar Choudhary, Jenny A. Harding, Rahul Swarnkar, Bishnu Prasad Das, Robert I. M. Young
2010	—	`conf`	Warning Prediction Sequential for Transient Error Prevention. DFT Bishnu Prasad Das, Hidetoshi Onodera
2008	Misc	`conf`	Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations. VLSI Design Bishnu Prasad Das, Janakiraman Viraraghavan, Bharadwaj Amrutur, H. S. Jamadagni, N. V. Arvind
2008	Misc	`conf`	Voltage and Temperature Scalable Standard Cell Leakage Models Based on Stacks for Statistical Leakage Characterization. VLSI Design Janakiraman Viraraghavan, Bishnu Prasad Das, Bharadwaj Amrutur
2008	—	`conf`	Within-die gate delay variability measurement using re-configurable ring oscillator. CICC Bishnu Prasad Das, Bharadwaj Amrutur, H. S. Jamadagni, N. V. Arvind, V. Visvanathan
2007	J	`jnl`	A review of approaches to supply chain communications: from manufacturing to construction. J. Inf. Technol. Constr. Anne-Françoise Cutting-Decelle, Bob Young, Bishnu Prasad Das, Keith Case, Shahin Rahimifard, Chimay J. Anumba, Dino Bouchlaghem
2007	J	`jnl`	Towards the understanding of the requirements of a communication language to support process interoperation in cross-disciplinary supply chains. Int. J. Comput. Integr. Manuf. Bishnu Prasad Das, Anne-Françoise Cutting-Decelle, Robert I. M. Young, Keith Case, Shahin Rahimifard, Chimay J. Anumba, N. M. Bouchlaghem
2006	J	`jnl`	Building supply chain communication systems: a review of methods and techniques. Data Sci. J. Anne-Françoise Cutting-Decelle, Bishnu Prasad Das, Robert I. M. Young, Keith Case, Shahin Rahimifard, Chimay J. Anumba, N. M. Bouchlaghem