Bingjun Xiao

22 papers A* 4A 5B 1C 2Misc 1Journal 3Unranked 4
YearRankTypeTitle / Venue / Authors
2016 J jnl
ARAPrototyper: Enabling Rapid Prototyping and Evaluation for Accelerator-Rich Architectures.
CoRR
Yu-Ting Chen, Jason Cong, Zhenman Fang, Bingjun Xiao, Peipei Zhou
2016 J jnl
An Optimal Microarchitecture for Stencil Computation Acceleration Based on Nonuniform Partitioning of Data Reuse Buffers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jason Cong, Peng Li, Bingjun Xiao, Peng Zhang
2016 — conf
Novel applications of deep learning hidden features for adaptive testing.
ASP-DAC
Bingjun Xiao, Jinjun Xiong, Yiyu Shi
2015 B conf
ARACompiler: a prototyping flow and evaluation framework for accelerator-rich architectures.
ISPASS
Yu-Ting Chen, Jason Cong, Bingjun Xiao
2015 A* conf
CMOST: a system-level FPGA compilation framework.
DAC
Peng Zhang, Muhuan Huang, Bingjun Xiao, Hui Huang, Jason Cong
2015 — —
Communication Optimization for Customizable Domain-Specific Computing.
Bingjun Xiao
2015 — book
Customizable Computing
Yu-Ting Chen, Jason Cong, Michael Gill, Glenn Reinman, Bingjun Xiao
2015 A conf
Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks.
FPGA
Chen Zhang, Peng Li, Guangyu Sun, Yijin Guan, Bingjun Xiao, Jason Cong
2014 Misc conf
A Fully Pipelined and Dynamically Composable Architecture of CGRA.
FCCM
Jason Cong, Hui Huang, Chiyuan Ma, Bingjun Xiao, Peipei Zhou
2014 A* conf
An Optimal Microarchitecture for Stencil Computation Acceleration Based on Non-Uniform Partitioning of Data Reuse Buffers.
DAC
Jason Cong, Peng Li, Bingjun Xiao, Peng Zhang
2014 J jnl
FPGA-RPI: A Novel FPGA Architecture With RRAM-Based Programmable Interconnects.
IEEE Trans. Very Large Scale Integr. Syst.
Jason Cong, Bingjun Xiao
2014 C conf
Minimizing Computation in Convolutional Neural Networks.
ICANN
Jason Cong, Bingjun Xiao
2013 C conf
Accelerator-rich CMPs: From concept to real hardware.
ICCD
Yu-Ting Chen, Jason Cong, Mohammad Ali Ghodrat, Muhuan Huang, Chunyue Liu, Bingjun Xiao, Yi Zou
2013 A conf
Defect recovery in nanodevice-based programmable interconnects (abstract only).
FPGA
Jason Cong, Bingjun Xiao
2013 A* conf
Defect tolerance in nanodevice-based programmable interconnects: utilization beyond avoidance.
DAC
Jason Cong, Bingjun Xiao
2013 A conf
Energy-efficient computing using adaptive table lookup based on nonvolatile memories.
ISLPED
Jason Cong, Milos D. Ercegovac, Muhuan Huang, Sen Li, Bingjun Xiao
2013 A conf
Optimization of interconnects between accelerators and shared memories in dark silicon.
ICCAD
Jason Cong, Bingjun Xiao
2013 — conf
Optimizing routability in large-scale mixed-size placement.
ASP-DAC
Jason Cong, Guojie Luo, Kalliopi Tsota, Bingjun Xiao
2012 A conf
FPGA-RR: an enhanced FPGA architecture with RRAM-based reconfigurable interconnects (abstract only).
FPGA
Jason Cong, Bingjun Xiao
2011 — conf
Domain-specific processor with 3D integration for medical image processing.
ASAP
Jason Cong, Karthik Gururaj, Muhuan Huang, Sen Li, Bingjun Xiao, Yi Zou
2011 — conf
mrFPGA: A novel FPGA architecture with memristor-based reconfiguration.
NANOARCH
Jason Cong, Bingjun Xiao
2010 A* conf
A universal state-of-charge algorithm for batteries.
DAC
Bingjun Xiao, Yiyu Shi, Lei He