Bill Underwood

11 papers A* 1A 7C 1Journal 1Unranked 1

Year	Rank	Type	Title / Venue / Authors
2003	J	`jnl`	Speed Binning with Path Delay Test in 150-nm Technology. IEEE Des. Test Comput. Bruce Cory, Rohit Kapur, Bill Underwood
1994	A	`conf`	Fastpath: A Path-Delay Test Generator for Standard Scan Designs. ITC Bill Underwood, Wai-On Law, Sungho Kang, Haluk Konuk
1994	C	`conf`	Path-Delay Fault Simulation for a Standard Scan Design Methodology. ICCD Sungho Kang, Wai-On Law, Bill Underwood
1991	A	`conf`	Delay Testing Quality in Timing-Optimized Designs. ITC Eun Sei Park, Bill Underwood, Thomas W. Williams, M. Ray Mercer
1991	A*	`conf`	The Interdependence Between Delay-Optimization of Synthesized Networks and Testing. DAC Thomas W. Williams, Bill Underwood, M. Ray Mercer
1989	A	`conf`	The Parallel-Test-Detect Fault Simulation Algorithm. ITC Bill Underwood, Jack Ferguson
1988	—	`conf`	An Analysis of Parallel Logic Simulation on Several Architectures. ICPP (1) Steven P. Smith, Bill Underwood, Joe Newman
1988	A	`conf`	D^3FS: A Demand Driven Deductive Fault Simulator. ITC Steven P. Smith, Bill Underwood, M. Ray Mercer
1986	A	`conf`	Calculation of Greatest Lower Bounds Obtainable by the Cutting Algorithm. ITC Rhonda Kay Gaede, M. Ray Mercer, Bill Underwood
1985	A	`conf`	Built-In Self Test Input Generator for Programmable Logic Arrays. ITC John Salick, Bill Underwood, M. Ray Mercer
1984	A	`conf`	Correlating Testability with Fault Detection. ITC Bill Underwood, M. Ray Mercer