Bibiche M. Geuskens

15 papers A 1Journal 6Unranked 8
YearRankTypeTitle / Venue / Authors
2016 — conf
16.1 A nanogap transducer array on 32nm CMOS for electrochemical DNA sequencing.
ISSCC
Drew A. Hall, Jonathan S. Daniels, Bibiche M. Geuskens, Noureddine Tayebi, Grace M. Credo, David J. Liu, Handong Li, Kai Wu, Xing Su, Madoo Varma, Oguz H. Elibol
2014 J jnl
A 0.45-1 V Fully-Integrated Distributed Switched Capacitor DC-DC Converter With High Density MIM Capacitor in 22 nm Tri-Gate CMOS.
IEEE J. Solid State Circuits
Rinkle Jain, Bibiche M. Geuskens, Stephen T. Kim, Muhammad M. Khellah, Jaydeep P. Kulkarni, James W. Tschanz, Vivek De
2013 J jnl
A survey of cross-layer power-reliability tradeoffs in multi and many core systems-on-chip.
Microprocess. Microsystems
Ahmed M. Eltawil, Michael Engel, Bibiche M. Geuskens, Amin Khajeh Djahromi, Fadi J. Kurdahi, Peter Marwedel, Smaïl Niar, Mazen A. R. Saghir
2012 — conf
Capacitive-coupling wordline boosting with self-induced VCC collapse for write VMIN reduction in 22-nm 8T SRAM.
ISSCC
Jaydeep P. Kulkarni, Bibiche M. Geuskens, Tanay Karnik, Muhammad M. Khellah, James W. Tschanz, Vivek De
2011 J jnl
A 45 nm Resilient Microprocessor Core for Dynamic Variation Tolerance.
IEEE J. Solid State Circuits
Keith A. Bowman, James W. Tschanz, Shih-Lien Lu, Paolo A. Aseron, Muhammad M. Khellah, Arijit Raychowdhury, Bibiche M. Geuskens, Carlos Tokunaga, Chris Wilkerson, Tanay Karnik, Vivek K. De
2011 J jnl
All-Digital Circuit-Level Dynamic Variation Monitor for Silicon Debug and Adaptive Clock Control.
IEEE Trans. Circuits Syst. I Regul. Pap.
Keith A. Bowman, Carlos Tokunaga, James W. Tschanz, Arijit Raychowdhury, Muhammad M. Khellah, Bibiche M. Geuskens, Shih-Lien Lu, Paolo A. Aseron, Tanay Karnik, Vivek K. De
2011 J jnl
Error Detection and Correction in Microprocessor Core and Memory Due to Fast Dynamic Voltage Droops.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Arijit Raychowdhury, Jim Tschanz, Keith A. Bowman, Shih-Lien Lu, Paolo A. Aseron, Muhammad M. Khellah, Bibiche M. Geuskens, Carlos Tokunaga, Chris Wilkerson, Tanay Karnik, Vivek De
2011 J jnl
Tunable Replica Bits for Dynamic Variation Tolerance in 8T SRAM Arrays.
IEEE J. Solid State Circuits
Arijit Raychowdhury, Bibiche M. Geuskens, Keith A. Bowman, James W. Tschanz, Shih-Lien Lu, Tanay Karnik, Muhammad M. Khellah, Vivek K. De
2010 — conf
A 45nm resilient and adaptive microprocessor core for dynamic variation tolerance.
ISSCC
James W. Tschanz, Keith A. Bowman, Shih-Lien Lu, Paolo A. Aseron, Muhammad M. Khellah, Arijit Raychowdhury, Bibiche M. Geuskens, Carlos Tokunaga, Chris Wilkerson, Tanay Karnik, Vivek De
2010 — conf
Dynamic variation monitor for measuring the impact of voltage droops on microprocessor clock frequency.
CICC
Keith A. Bowman, Carlos Tokunaga, James W. Tschanz, Arijit Raychowdhury, Muhammad M. Khellah, Bibiche M. Geuskens, Shih-Lien Lu, Paolo A. Aseron, Tanay Karnik, Vivek De
2010 — conf
Opportunities for PMOS read and write ports in low voltage dual-port 8T bit cell arrays.
CICC
Bibiche M. Geuskens, Muhammad M. Khellah, Jaydeep P. Kulkarni, Tanay Karnik, Vivek De
2010 — conf
PVT-and-aging adaptive wordline boosting for 8T SRAM power reduction.
ISSCC
Arijit Raychowdhury, Bibiche M. Geuskens, Jaydeep P. Kulkarni, James W. Tschanz, Keith A. Bowman, Tanay Karnik, Shih-Lien Lu, Vivek De, Muhammad M. Khellah
2010 — conf
Resilient design in scaled CMOS for energy efficiency.
ASP-DAC
James W. Tschanz, Keith A. Bowman, Muhammad M. Khellah, Chris Wilkerson, Bibiche M. Geuskens, Dinesh Somasekhar, Arijit Raychowdhury, Jaydeep P. Kulkarni, Carlos Tokunaga, Shih-Lien Lu, Tanay Karnik, Vivek De
2010 A conf
Resilient microprocessor design for high performance & energy efficiency.
ISLPED
Keith A. Bowman, James W. Tschanz, Shih-Lien Lu, Paolo A. Aseron, Muhammad M. Khellah, Arijit Raychowdhury, Bibiche M. Geuskens, Carlos Tokunaga, Chris Wilkerson, Tanay Karnik, Vivek De
2009 — conf
Content Addressable Memory for Low-Power and High-Performance Applications.
CSIE (3)
Ataur R. Patwary, Bibiche M. Geuskens, Shih-Lien Lu