Bhupendra Singh Reniwal

20 papers A 1Misc 3Journal 9Unranked 7
YearRankTypeTitle / Venue / Authors
2026 J jnl
NA-STM Enhanced Energy-Efficient Custom Spiking U-Net Denoiser for Noise-Robust CIFAR-10 Classification.
IEEE Open J. Comput. Soc.
Chetali Yadav, Bhupendra Singh Reniwal
2025 J jnl
Highly Accurate and Energy Efficient Convolutional Spiking Neural Network for Traffic Sign Recognition.
IEEE Access
Chetali Yadav, Bhupendra Singh Reniwal
2025 J jnl
Spatially Invariant Convolutional Spiking Neural Network For Resource-Constrained IoT Devices.
Circuits Syst. Signal Process.
Chetali Yadav, Bhupendra Singh Reniwal
2024 A conf
CiMComp: An Energy Efficient Compute-in-Memory Based Comparator for Convolutional Neural Networks.
DATE
Kavitha S, Binsu J. Kailath, Bhupendra Singh Reniwal
2023 Misc conf
Design and Analysis of Multibit Multiply and Accumulate (MAC) unit: An Analog In-Memory Computing Approach.
VLSID
Swetha Ananthanarayanan, Bhupendra Singh Reniwal, Abhishek Upadhyay
2023 Misc conf
Design of Radiation Hardened 12T SRAM with Enhanced Reliability and Read/Write Latency for Space Application.
VLSID
Mohd Sakib Ansari S, Kavitha S, Bhupendra Singh Reniwal, Santosh Kumar Vishvakarma
2023 J jnl
Enabling Energy-Efficient In-Memory Computing With Robust Assist-Based Reconfigurable Sense Amplifier in SRAM Array.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Kavitha Soundrapandiyan, Santosh Kumar Vishvakarma, Bhupendra Singh Reniwal
2022 — conf
An Approach Towards Analog In-Memory Computing for Energy-Efficient Adder in SRAM Array.
VDAT
S. Kavitha, Santosh Kumar Vishvakarma, Bhupendra Singh Reniwal
2021 — conf
Energy Efficient, Hamming Code Technique for Error Detection/Correction Using In-Memory Computation.
VDAT
Mythrai, Pragna, Kavitha S, Pooran Singh, A. P. Shah, S. K. Vishwakarma, Bhupendra Singh Reniwal
2019 J jnl
An Auto-Calibrated Sense Amplifier with Offset Prediction Approach for Energy-Efficient SRAM.
Circuits Syst. Signal Process.
Bhupendra Singh Reniwal, Vikas Vijayvargiya, Pooran Singh, Nand Kishor Yadav, Santosh Kumar Vishvakarma, Devesh Dwivedi
2019 — conf
Compact Spiking Neural Network System with SiGe Based Cylindrical Tunneling Transistor for Low Power Applications.
VDAT
Ankur Beohar, Gopal Raut, Gunjan Rajput, Abhinav Vishwakarma, Ambika Prasad Shah, Bhupendra Singh Reniwal, Santosh Kumar Vishvakarma
2018 J jnl
Ultra low power-high stability, positive feedback controlled (PFC) 10T SRAM cell for look up table (LUT) design.
Integr.
Pooran Singh, Bhupendra Singh Reniwal, Vikas Vijayvargiya, V. Sharma, Santosh Kumar Vishvakarma
2017 Misc conf
A New Sense Amplifier Design with Improved Input Referred Offset Characteristics for Energy-Efficient SRAM.
VLSID
Bhupendra Singh Reniwal, Pooran Singh, Vikas Vijayvargiya, Santosh Kumar Vishvakarma
2017 J jnl
Design and investigation of variability aware sense amplifier for low power, high speed SRAM.
Microelectron. J.
Bhupendra Singh Reniwal, Praneet Bhatia, Santosh Kumar Vishvakarma
2017 J jnl
Dynamic Feedback Controlled Static Random Access Memory for Low Power Applications.
J. Low Power Electron.
Pooran Singh, Bhupendra Singh Reniwal, Vikas Vijayvargiya, V. Sharma, Santosh Kumar Vishvakarma
2016 J jnl
Ultra-Fast Current Mode Sense Amplifier for Small \(I_{\mathrm{CELL}}\) SRAM in FinFET with Improved Offset Tolerance.
Circuits Syst. Signal Process.
Bhupendra Singh Reniwal, Vikas Vijayvargiya, Santosh Kumar Vishvakarma, Devesh Dwivedi
2015 — conf
An offset-tolerant self-correcting sense amplifier for robust high speed SRAM.
VDAT
Praneet Bhatia, Bhupendra Singh Reniwal, Santosh Kumar Vishvakarma
2015 — conf
Dataline Isolated Differential Current Feed/Mode Sense Amplifier for Small I
ACM Great Lakes Symposium on VLSI
Bhupendra Singh Reniwal, Vikas Vijayvargiya, Pooran Singh, Santosh Kumar Vishvakarma, Devesh Dwivedi
2015 — conf
Nanoscale Memory Design for Efficient Computation: Trends, Challenges and Opportunity.
iNIS
Santosh Kumar Vishvakarma, Bhupendra Singh Reniwal, V. Sharma, C. B. Khuswah, Devesh Dwivedi
2013 — conf
Process Aware Ultra-High-Speed Hybrid Sensing Technique for Low Power Near-Threshold SRAM.
VDAT
Bhupendra Singh Reniwal, Santosh Kumar Vishvakarma