Bertrand Le Gal

118 papers A 1B 5C 7Misc 4Journal 40Unranked 60

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Low-Complexity and Low-Energy RNN-Enhanced Kalman Filter for Channel Estimation: A Case Study. IEEE Open J. Commun. Soc. Antoine Siebert, Bertrand Le Gal, Guillaume Ferré, Aurélien Fourny
2025	J	`jnl`	Adaptive Multiple-Attempts Approach to Optimize Multiple-Vote Symbol-Flipping NB-LDPC Decoder. IEEE Commun. Lett. Abdallah Abdallah, Camille Monière, Bertrand Le Gal, Emmanuel Boutillon
2025	—	`conf`	Differential Delay Mitigation in Multi-Antenna Aircraft Transmissions. VTC2025-Spring Oussama Ait Sidi Ali, Romain Tajan, Bertrand Le Gal, Alain Thomas
2025	J	`jnl`	DynHaMo: Dynamic Hardware-Based Monitoring Dedicated to Attacks Detection. ACM Trans. Embed. Comput. Syst. Juliette Pottier, Maria Méndez Real, Bertrand Le Gal, Sébastien Pillement
2025	J	`jnl`	Specialized Scalar and SIMD Instructions for Error Correction Codes Decoding on RISC-V Processors. IEEE Access Maël Tourres, Cyrille Chavet, Bertrand Le Gal, Philippe Coussy
2024	J	`jnl`	Implementation of A Low-Earth Orbit Satellite Chirped Preamble Detector. IEEE Trans. Aerosp. Electron. Syst. Matthieu Magnant, Bertrand Le Gal, Guillaume Ferré, Florian Collard
2024	—	`conf`	Joint Blind Estimation and Equalization Method Based on Deep Learning for Fast Fading Channels. NewCAS Antoine Siebert, Guillaume Ferré, Bertrand Le Gal, Aurélien Fourny
2024	J	`jnl`	RISC-V processor enhanced with a dynamic micro-decoder unit. CoRR Juliette Pottier, Thomas Nieddu, Bertrand Le Gal, Sébastien Pillement, Maria Méndez Real
2024	J	`jnl`	Scalable High-Throughput and Low-Latency DVB-S2(x) LDPC Decoders on SIMD Devices. IEEE Open J. Commun. Soc. Bertrand Le Gal
2023	J	`jnl`	A High-Level Methodology to Evaluate and Optimize Digital Architectures Targeting Spike Encoding. IEEE Access Clémence Gillet, Adrien F. Vincent, Bertrand Le Gal, Sylvain Saïghi
2023	—	`book`	Adéquation Algorithme Architecture - Approches matérielles et logicielles pour les applications de communications numériques. (Algorithm Architecture Matching - Hardware and software approaches for digital communications applications). Bertrand Le Gal
2023	J	`jnl`	High-performance hard-input LDPC decoding on multi-core devices for optical space links. J. Syst. Archit. Bertrand Le Gal, Christophe Jégo, Vincent Pignoly
2023	C	`conf`	Implementation of an Assignment Algorithm for Object Tracking on a FPGA MPSoC. DSD Denis Shemonaev, Bertrand Le Gal, Christophe Jégo, Anthony Besseau
2023	C	`conf`	Model Based Design of FMCW Radar Processing Systems on FPGA Platforms. DSD Hugues Almorin, Bertrand Le Gal, Christophe Jégo, Vincent Kissel
2023	—	`conf`	Real-Time Low-Earth Orbit Detector Implementation for Chirp-Based Preamble Communication Systems. LATINCOM Matthieu Magnant, Mohamed Amine Ben Temim, Bertrand Le Gal, Guillaume Ferré, Florian Collard
2023	J	`jnl`	Real-time energy-efficient software and hardware implementations of a QCSP communication system. J. Syst. Archit. Camille Monière, Bertrand Le Gal, Emmanuel Boutillon
2023	A	`conf`	Securing a RISC-V architecture: A dynamic approach. DATE Sébastien Pillement, Maria Mendez Real, J. Pottier, T. Nieddu, Bertrand Le Gal, Sébastien Faucou, Jean-Luc Béchennec, Mikaël Briday, Sylvain Girbal, Jimmy Le Rhun, Olivier Gilles, Daniel Gracia Pérez, André Sintzoff, Jean-Roch Coulon
2023	B	`conf`	The Smart Kalman Filter: A Deep Learning-Based Approach for Time-Varying Channel Estimation. PIMRC Antoine Siebert, Guillaume Ferré, Bertrand Le Gal, Aurélien Fourny
2022	—	`conf`	Efficient LoRa-like Transmitter Stacks for SDR Applications. ICECS 2022 Léa Volpin, Bertrand Le Gal, Guillaume Ferré
2022	—	`conf`	Efficient Software and Hardware Implementations of a QCSP Communication System. DASIP Camille Monière, Bertrand Le Gal, Emmanuel Boutillon
2022	—	`conf`	Flexible design methodology for spike encoding implementation on FPGA. BioCAS Clémence Gillet, Adrien F. Vincent, Bertrand Le Gal, Sylvain Saïghi
2022	—	`conf`	High-Performance Gallager-E Decoders for Hard Input LDPC Decoding on Multi-core Devices. DASIP Bertrand Le Gal, Vincent Pignoly, Christophe Jégo
2022	—	`conf`	High-throughput FFT architectures using HLS tools. ICECS 2022 Hugues Almorin, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo, Vincent Kissel
2022	—	`conf`	Methodology to Adapt Neural Network on Constrained Device at Topology level. SiPS Logan Saint-Germain, Bertrand Le Gal, Fabien Baldacci, Jérémie Crenne, Christophe Jégo, Sebastien Loty
2021	—	`conf`	Extended RISC-V hardware architecture for future digital communication systems. 5GWF Maël Tourres, Cyrille Chavet, Bertrand Le Gal, Jérémie Crenne, Philippe Coussy
2021	—	`conf`	Time sliding window for the detection of CCSK frames. SiPS Camille Monière, Kassem Saied, Bertrand Le Gal, Emmanuel Boutillon
2020	—	`conf`	Fair comparison of hardware and software LDPC decoder implementations for SDR space links. ICECS Vincent Pignoly, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, Lyonel Barthe
2020	—	`conf`	High speed LDPC decoding for optical space link. ICECS Vincent Pignoly, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, Lyonel Barthe
2020	J	`jnl`	High-Throughput FFT-SPA Decoder Implementation for Non-Binary LDPC Codes on x86 Multicore Processors. J. Signal Process. Syst. Bertrand Le Gal, Christophe Jégo
2020	—	`conf`	Low-Latency Sorter Architecture for Polar Codes Successive-Cancellation-List Decoding. SiPS Bertrand Le Gal, Yann Delomier, Camille Leroux, Christophe Jégo
2020	J	`jnl`	Low-latency and high-throughput software turbo decoders on multi-core architectures. Ann. des Télécommunications Bertrand Le Gal, Christophe Jégo
2020	J	`jnl`	Model-Based Design of Flexible and Efficient LDPC Decoders on FPGA Devices. J. Signal Process. Syst. Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
2020	J	`jnl`	Model-based Design of Hardware SC Polar Decoders for FPGAs. ACM Trans. Reconfigurable Technol. Syst. Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
2019	J	`jnl`	AFF3CT: A Fast Forward Error Correction Toolbox! SoftwareX Adrien Cassagne, Olivier Hartmann, Mathieu Léonardon, Kun He, Camille Leroux, Romain Tajan, Olivier Aumage, Denis Barthou, Thibaud Tonnellier, Vincent Pignoly, Bertrand Le Gal, Christophe Jégo
2019	—	`conf`	Generation of Efficient Self-adaptive Hardware Polar Decoders Using High-Level Synthesis. SiPS Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
2018	—	`conf`	A scalable and efficient digital signal processing system for real time biological spike detection. ICECS Safouane Noubir, Yannick Bornat, Bertrand Le Gal
2018	B	`conf`	ADMM hardware decoder for regular LDPC codes using a NISC-based architecture. WCNC Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2018	—	`conf`	Fast Design of Reliable, Flexible and High-Speed AWGN architectures with High Level Synthesis. ICECS Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
2018	—	`conf`	From multicore LDPC decoder implementations to FPGA decoder architectures: a case study. ICECS Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
2018	—	`conf`	Hardware design of Euclidean Projection modules for ADMM LDPC decoding. ICECS Hayfa Ben Thameur, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2018	—	`conf`	High data rate and flexible hardware QC-LDPC decoder for satellite optical communications. ISTC Vincent Pignoly, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat
2018	J	`jnl`	High-performance software implementations of SCAN decoder for polar codes. Ann. des Télécommunications Bertrand Le Gal, Camille Leroux, Christophe Jégo
2018	B	`conf`	Implementation aspects of a pipeline ADMM-based LP decoding of LDPC convolutional codes. WCNC Hayfa Ben Thameur, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2018	—	`conf`	Model-based Design of Efficient LDPC Decoder Architectures. ISTC Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
2018	J	`jnl`	Multicore and Manycore Implementations of ADMM-based Decoders for LDPC Decoding. J. Signal Process. Syst. Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2017	C	`conf`	A survey on decoding schedules of LDPC convolutional codes and associated hardware architectures. ISCC Hayfa Ben Thameur, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2017	—	`conf`	An LP-based algorithm for decoding terminated LDPC convolutional codes. IINTEC Hayfa Ben Thameur, Nadia Khouja, Fethi Tlili, Bertrand Le Gal, Christophe Jégo
2017	Misc	`conf`	Low complexity ADMM-LP based decoding strategy for LDPC convolutional codes. SoftCOM Hayfa Ben Thameur, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2017	—	`conf`	Low-latency software LDPC decoders for x86 multi-core devices. SiPS Bertrand Le Gal, Christophe Jégo
2017	—	`conf`	Reduced complexity ADMM-based schedules for LP decoding of LDPC convolutional codes. SiPS Hayfa Ben Thameur, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2017	—	`conf`	Successive cancellation decoder for very long polar codes. SiPS Bertrand Le Gal, Camille Leroux, Christophe Jégo
2016	J	`jnl`	A Flexible SoC and Its Methodology for Parser-Based Applications. ACM Trans. Reconfigurable Technol. Syst. Bertrand Le Gal, Yérom-David Bromberg, Laurent Réveillère, Jigar Solanki
2016	C	`conf`	A scalable 3-phase polar decoder. ISCAS Bertrand Le Gal, Camille Leroux, Christophe Jégo
2016	—	`conf`	Beyond Gbps Turbo decoder on multi-core CPUs. ISTC Adrien Cassagne, Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Olivier Aumage, Denis Barthou
2016	—	`conf`	Comparison of different schedulings for the ADMM based LDPC decoding. ISTC Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2016	—	`conf`	Energy consumption analysis of software polar decoders on low power processors. EUSIPCO Adrien Cassagne, Olivier Aumage, Camille Leroux, Denis Barthou, Bertrand Le Gal
2016	B	`conf`	Evaluation of the hardware complexity of the ADMM approach for LDPC decoding. WCNC Imen Debbabi, Nadia Khouja, Fethi Tlili, Bertrand Le Gal, Christophe Jégo
2016	J	`jnl`	Fast Converging ADMM-Penalized Algorithm for LDPC Decoding. IEEE Commun. Lett. Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2016	—	`conf`	Hardware architecture for lowering the error floor of LTE turbo codes. DASIP Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, Nicolas Van Wambeke
2016	J	`jnl`	High-Throughput Multi-Core LDPC Decoders Based on x86 Processor. IEEE Trans. Parallel Distributed Syst. Bertrand Le Gal, Christophe Jégo
2016	J	`jnl`	Lowering the Error Floor of Turbo Codes With CRC Verification. IEEE Wirel. Commun. Lett. Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Benjamin Gadat, Christophe Jégo, Nicolas Van Wambeke
2016	—	`conf`	Lowering the error floor of double-binary turbo codes: The flip and check algorithm. ISTC Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, Nicolas Van Wambeke
2016	Misc	`conf`	Memory reduction techniques for successive cancellation decoding of polar codes. ICASSP Bertrand Le Gal, Camille Leroux, Christophe Jégo
2016	Misc	`conf`	Multicore implementation of LDPC decoders based on ADMM algorithm. ICASSP Imen Debbabi, Nadia Khouja, Fethi Tlili, Bertrand Le Gal, Christophe Jégo
2016	J	`jnl`	Real Time LP Decoding of LDPC Codes for High Correction Performance Applications. IEEE Wirel. Commun. Lett. Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2015	—	`conf`	An Efficient, Portable and Generic Library for Successive Cancellation Decoding of Polar Codes. LCPC Adrien Cassagne, Bertrand Le Gal, Camille Leroux, Olivier Aumage, Denis Barthou
2015	—	`conf`	Analysis of ADMM-LP algorithm for LDPC decoding, a first step to hardware implementation. ICECS Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2015	J	`jnl`	High-Throughput LDPC Decoder on Low-Power Embedded Processors. IEEE Commun. Lett. Bertrand Le Gal, Christophe Jégo
2015	J	`jnl`	Multi-Gb/s Software Decoding of Polar Codes. IEEE Trans. Signal Process. Bertrand Le Gal, Camille Leroux, Christophe Jégo
2014	J	`jnl`	A Flexible NISC-Based LDPC Decoder. IEEE Trans. Signal Process. Bertrand Le Gal, Christophe Jégo, Camille Leroux
2014	J	`jnl`	A High Throughput Efficient Approach for Decoding LDPC Codes onto GPU Devices. IEEE Embed. Syst. Lett. Bertrand Le Gal, Christophe Jégo, Jérémie Crenne
2014	J	`jnl`	GPU-like on-chip system for decoding LDPC codes. ACM Trans. Embed. Comput. Syst. Bertrand Le Gal, Christophe Jégo
2014	—	`conf`	Software polar decoder on an embedded processor. SiPS Bertrand Le Gal, Camille Leroux, Christophe Jégo
2013	J	`jnl`	A Very High Throughput Deblocking Filter for H.264/AVC. J. Signal Process. Syst. Moez Kthiri, Bertrand Le Gal, Patrice Kadionik, Ahmed Ben Atitallah
2013	J	`jnl`	Design space exploration for partially reconfigurable architectures in real-time systems. J. Syst. Archit. François Duhem, Fabrice Muller, Willy Aubry, Bertrand Le Gal, Daniel Négru, Philippe Lorenzini
2013	Misc	`conf`	Improving the performance of message parsers for embedded systems. SAC Jigar Solanki, Laurent Réveillère, Yérom-David Bromberg, Bertrand Le Gal, Tegawendé F. Bissyandé
2013	J	`jnl`	Méthodologie d'optimisation des processeurs embarqués. Une approche favorisant la réduction de la surface et de la consommation des processeurs embarqués. Tech. Sci. Informatiques Bertrand Le Gal, Christophe Jégo
2013	J	`jnl`	Softcore Processor Optimization According to Real-Application Requirements. IEEE Embed. Syst. Lett. Bertrand Le Gal, Christophe Jégo
2013	—	`conf`	Study and analysis of a new implementation of a mixed-signal cartesian feedback for a low power zero-IF WCDMA transmitter. NEWCAS A. Aulery, Dominique Dallet, Bertrand Le Gal, Nathalie Deltimple, Didier Belot, Eric Kerherve
2012	—	`conf`	A generic video adaptation FPGA implementation towards content- and context-awareness in future networks. DASIP Willy Aubry, Bertrand Le Gal, Daniel Négru, Simon Desfarges, Dominique Dallet
2012	—	`conf`	A generic video adaptation framework towards content-and context-awareness in future networks. EUSIPCO Willy Aubry, Daniel Négru, Bertrand Le Gal, Simon Desfarges, Dominique Dallet
2012	J	`jnl`	Automatic low-cost IP watermarking technique based on output mark insertions. Des. Autom. Embed. Syst. Bertrand Le Gal, Lilian Bossuet
2012	—	`conf`	Design of an ASIP LDPC Decoder Compliant with Digital Communication Standards. SiPS Bertrand Le Gal, Christophe Jégo
2012	J	`jnl`	Design of multi-mode application-specific cores based on high-level synthesis. Integr. Emmanuel Casseau, Bertrand Le Gal
2012	J	`jnl`	FPGA based system for automatic cDNA microarray image processing. Comput. Medical Imaging Graph. Bogdan Belean, Monica Borda, Bertrand Le Gal, Romulus Terebes
2012	—	`conf`	FPGA prototyping of an ASIP LDPC decoder for the DVB-T2 standard. DASIP Bertrand Le Gal, Christophe Jégo
2012	—	`conf`	New digital predistortion design based on mixed-signal cartesian feedback training for 3G homodyne transmitter. NEWCAS W. Sanaa, Bertrand Le Gal, Dominique Dallet, Chiheb Rebai, Nathalie Deltimple, Didier Belot, Eric Kerherve
2012	J	`jnl`	Power Consumption Models for Decimation FIR Filters in Multistandard Receivers. VLSI Design Khaled Grati, Nadia Khouja, Bertrand Le Gal, Adel Ghazel
2012	—	`conf`	Spatial downsizing impact in the transrating tradeoff for content/context awareness in media network. TEMU Willy Aubry, Daniel Négru, Bertrand Le Gal, Dominique Dallet
2012	J	`jnl`	Zebra: Building Efficient Network Message Parsers for Embedded Systems. IEEE Embed. Syst. Lett. Julien Mercadal, Laurent Réveillère, Yérom-David Bromberg, Bertrand Le Gal, Tegawendé F. Bissyandé, Jigar Solanki
2011	—	`conf`	A Reconfigurable Multi-core Cryptoprocessor for Multi-channel Communication Systems. IPDPS Workshops Michael Grand, Lilian Bossuet, Guy Gogniat, Bertrand Le Gal, Jean-Philippe Delahaye, Dominique Dallet
2011	—	`conf`	A system aproach for reducing power consumption of multimedia devices with a low QoE impact. ICECS Willy Aubry, Bertrand Le Gal, Dominique Dallet, Simon Desfarges, Daniel Négru
2011	C	`conf`	Assertion support in high-level synthesis design flow. FDL Aurélien Ribon, Bertrand Le Gal, Christophe Jégo, Dominique Dallet
2011	—	`conf`	Design and Implementation of a Multi-Core Crypto-Processor for Software Defined Radios. ARC Michael Grand, Lilian Bossuet, Bertrand Le Gal, Guy Gogniat, Dominique Dallet
2011	—	`conf`	FPGA technology and parallel computing towards automatic microarray image processing. TSP Bogdan Belean, Monica Borda, Bertrand Le Gal, Raul Malutan
2011	J	`jnl`	Latency-Sensitive High-Level Synthesis for Multiple Word-Length DSP Design. EURASIP J. Adv. Signal Process. Bertrand Le Gal, Emmanuel Casseau
2011	J	`jnl`	Word-Length Aware DSP Hardware Design Flow Based on High-Level Synthesis. J. Signal Process. Syst. Bertrand Le Gal, Emmanuel Casseau
2010	—	`conf`	A low-area filter bank design methodology for on-chip ADC testing. ICECS Nicolas Mechouk, Dominique Dallet, Lilian Bossuet, Bertrand Le Gal
2010	—	`conf`	Area optimization of ROM-based controllers dedicated to digital signal processing applications. EUSIPCO Bertrand Le Gal, Aurélien Ribon, Lilian Bossuet, Dominique Dallet
2010	—	`conf`	Reducing and smoothing power consumption of ROM-based controller implementations. SBCCI Bertrand Le Gal, Aurélien Ribon, Lilian Bossuet, Dominique Dallet
2009	—	`conf`	Automated multimode system design for high performance DSP applications. EUSIPCO Bertrand Le Gal, Emmanuel Casseau
2009	B	`conf`	Design and implementation of a reconfigurable decimation and channel selection filter for GSM and UMTS radio standards. WCNC Nadia Khouja, Khaled Grati, Adel Ghazel, Bertrand Le Gal
2009	—	`conf`	Experiments on designing low power decimation filter for multistandard receiver on heterogeneous targets. EUSIPCO Nadia Khouja, Bertrand Le Gal, Khaled Grati, Adel Ghazel
2009	—	`conf`	High-level synthesis for the design of FPGA-based signal processing systems. ICSAMOS Emmanuel Casseau, Bertrand Le Gal
2008	C	`conf`	A new orthogonal online digital calibration for time-interleaved analog-to-digital converters. ISCAS Guillaume Ferré, Maher Jridi, Lilian Bossuet, Bertrand Le Gal, Dominique Dallet
2008	J	`jnl`	Dynamic Memory Access Management for High-Performance DSP Applications Using High-Level Synthesis. IEEE Trans. Very Large Scale Integr. Syst. Bertrand Le Gal, Emmanuel Casseau, Sylvain Huet
2008	—	`conf`	Orthogonal correction implementation for time interleaved analog-to-digital converters: Realtime application. EUSIPCO Guillaume Ferré, Bertrand Le Gal, Lilian Bossuet, Maher Jridi, Dominique Dallet, Pierre Colucci
2008	J	`jnl`	Synthèse de haut niveau tenant compte de la dynamique des traitements. Analyse de la largeur des données d'applications du TDSI et gestion de cette information lors de la synthèse de haut niveau. Tech. Sci. Informatiques Bertrand Le Gal, Emmanuel Casseau, Caaliph Andriamisaina
2007	—	`conf`	HLS design flow for the synthesis of multimode systems under multiple constraints. ICECS Bertrand Le Gal, Lilian Bossuet, Shafqat Khan, Emmanuel Casseau
2007	—	`conf`	Mathematical functions based watermarking for IPP. ICECS Bertrand Le Gal, Lilian Bossuet, Dominique Dallet
2006	—	`conf`	Bit-Width Aware High-Level Synthesis for Digital Signal Processing Systems. SoCC Bertrand Le Gal, Caaliph Andriamisaina, Emmanuel Casseau
2006	—	`conf`	Bit-Width Optimizations for High-Level Synthesis of Digital Signal Processing Systems. SiPS Caaliph Andriamisaina, Bertrand Le Gal, Emmanuel Casseau
2006	—	`conf`	IP Generation Targeting Multiple Bit-Width Standards. ICECS Bertrand Le Gal, Emmanuel Casseau
2005	—	`conf`	C-based rapid prototyping for digital signal processing. EUSIPCO Emmanuel Casseau, Bertrand Le Gal, Pierre Bomel, Christophe Jégo, Sylvain Huet, Eric Martin
2005	C	`conf`	Hardware Virtual Components Compliant with Communication System Standards. DSD Nabil Abdelli, Pierre Bomel, Emmanuel Casseau, Anne-Marie Fouilliart, Christophe Jégo, Philippe Kajfasz, Bertrand Le Gal, Nathalie Le Heno
2005	—	`conf`	Pipelined Memory Controllers for DSP Applications Handling Unpredictable Data Accesses. ISVLSI Bertrand Le Gal, Emmanuel Casseau, Sylvain Huet, Eric Martin
2005	—	`conf`	Pipelined memory controllers for DSP real-time applications handling unpredictable data accesses. EUSIPCO Bertrand Le Gal, Emmanuel Casseau, Eric Martin
2004	—	`conf`	Reed-Solomon behavioral virtual component for communication systems. ISCAS (4) Emmanuel Casseau, Bertrand Le Gal, Christophe Jégo, Nathalie Le Heno, Eric Martin