Bernhard Wess

15 papers C 1Misc 4Journal 3Unranked 7
YearRankTypeTitle / Venue / Authors
2006 J jnl
Design Methods for DSP Systems.
EURASIP J. Adv. Signal Process.
Markus Rupp, Bernhard Wess, Shuvra S. Bhattacharyya
2005 — conf
Integrated assignment of registers and functional units for heterogeneous vliw-architectures.
SoCC
Thomas Zeitlhofer, Bernhard Wess
2004 — conf
A comparison of graph coloring heuristics for register allocation based on coalescing in interval graphs.
ISCAS (4)
Thomas Zeitlhofer, Bernhard Wess
2004 C conf
On the Phase Coupling Problem Between Data Memory Layout Generation and Address Pointer Assignment.
SCOPES
Bernhard Wess, Thomas Zeitlhofer
2004 — conf
Optimum address pointer assignment for digital signal processors.
ICASSP (5)
Bernhard Wess, Thomas Zeitlhofer
2003 J jnl
List-coloring of interval graphs with application to register assignment for heterogeneous register-set architectures.
Signal Process.
Thomas Zeitlhofer, Bernhard Wess
2003 — conf
Optimum register assignment for heterogeneous register-set architectures.
ISCAS (3)
Thomas Zeitlhofer, Bernhard Wess
2000 — conf
Simulated evolutionary code generation for heterogeneous memory-register DSP-architectures.
EUSIPCO
Bernhard Wess
1999 — conf
Dynamic trellis diagrams for optimized DSP code generation.
ISCAS (3)
Stefan Fröhlich, Martin Gotschlich, Udo Krebelder, Bernhard Wess
1999 J jnl
Minimization of Data Address Computation Overhead in DSP Programs.
Des. Autom. Embed. Syst.
Bernhard Wess
1999 Misc conf
Operation scheduling for parallel functional units using genetic algorithms.
ICASSP
Thomas Zeitlhofer, Bernhard Wess
1998 Misc conf
Minimization of data address computation overhead in DSP programs.
ICASSP
Bernhard Wess, Martin Gotschlich
1997 Misc conf
Constructing memory layouts for address generation units supporting offset 2 access.
ICASSP
Bernhard Wess, Martin Gotschlich
1997 Misc conf
Cooperative register assignment and code compaction for digital signal processors with irregular datapaths.
ICASSP
Werner Kreuzer, Bernhard Wess
1994 — conf
Code generation based on trellis diagrams.
Code Generation for Embedded Processors
Bernhard Wess