Bernard Goossens

22 papers A 1B 7Misc 1Journal 8Unranked 5
YearRankTypeTitle / Venue / Authors
2021 B conf
Deterministic OpenMP and the LBP Parallelizing Manycore Processor.
PaCT
Bernard Goossens, Kenelm Louetsi, David Parello
2017 J jnl
Computing on many cores.
Concurr. Comput. Pract. Exp.
Bernard Goossens, David Parello, Katarzyna Porada, Djallal Rahmoune
2016 — conf
Parallel Locality and Parallelization Quality.
PMAM@PPoPP
Bernard Goossens, David Parello, Katarzyna Porada, Djallal Rahmoune
2015 B conf
Toward a Core Design to Distribute an Execution on a Manycore Processor.
PaCT
Bernard Goossens, David Parello, Katarzyna Porada, Djallal Rahmoune
2013 J jnl
De quoi est faite une trace d'exécution ?
Tech. Sci. Informatiques
Bernard Goossens, Ali El Moussaoui, Ke Chen, David Parello
2013 Misc conf
Limits of Instruction-Level Parallelism Capture.
ICCS
Bernard Goossens, David Parello
2011 J jnl
Accélération de la simulation modulaire.
Tech. Sci. Informatiques
Mourad Bouache, David Parello, Bernard Goossens
2010 — conf
PerPI: A Tool to Measure Instruction Level Parallelism.
PARA (1)
Bernard Goossens, Philippe Langlois, David Parello, Eric Petit
2009 A conf
Heterogeneous Multi-processor SoC Design: Hardware Bridging and Exploration Methodology.
ESA
Benaoumeur Senouci, Mourad Bouache, Bernard Goossens
2009 — conf
Software Platform based Embedded Multiprocessor SoC Prototyping.
CIIA
Benaoumeur Senouci, Ali El Moussaoui, Bernard Goossens
2006 J jnl
Ordonnancement distribué d'instructions.
Tech. Sci. Informatiques
Bernard Goossens, David Defour
2005 J jnl
The instruction register file micro-architecture.
Future Gener. Comput. Syst.
Bernard Goossens, David Defour
2003 B conf
The Instruction Register File.
PaCT
Bernard Goossens
2002 J jnl
Typing the ISA to cluster the processor.
Future Gener. Comput. Syst.
Bernard Goossens
2001 J jnl
Handling 16 instructions per cycle in a superscalar processor.
Future Gener. Comput. Syst.
Bernard Goossens
2001 B conf
Typing the ISA to Cluster the Processor.
PaCT
Bernard Goossens
1999 B conf
Hardware and Software Optimizations for Multimedia Databases.
PaCT
Bernard Goossens, Hassane Essafi, Marc Pic
1997 B conf
A Multithreaded Vector Co-processor.
PaCT
Bernard Goossens
1996 J jnl
Les architectures risc et polo: un processeur oriente objet.
Bull. dInformatique Approfondie et Appl.
Bernard Goossens
1996 — conf
Multithreading to Improve Cycle Width and CPI in Superpipelined Superscalar Processors.
ISPAN
Bernard Goossens, Duc Thang Vu
1996 — conf
On-Chip Multiprocessing.
Euro-Par, Vol. II
Bernard Goossens, Duc Thang Vu
1995 B conf
Further Pipelining and Multithreading to Improve RISC Processor Speed. A Proposed Architecture and Simulation Results.
PaCT
Bernard Goossens, Duc Thang Vu