Benoît Dupont de Dinechin

61 papers A* 4A 6B 4C 6Misc 5Journal 8Unranked 27

Year	Rank	Type	Title / Venue / Authors
2025	A*	`conf`	Architecting Value Prediction around In-Order Execution. HPCA Pierre Ravenel, Arthur Perais, Benoît Dupont de Dinechin, Frédéric Pétrot
2025	C	`conf`	Double-Word Decomposition in a Combined FP16, BF16 and FP32 Dot Product Add Operator. ARITH Orégane Desrentes, Benoît Dupont de Dinechin, Florent de Dinechin
2023	C	`conf`	Exact Dot Product Accumulate Operators for 8-bit Floating-Point Deep Learning. DSD Orégane Desrentes, Benoît Dupont de Dinechin, Julien Le Maire
2023	C	`conf`	Exact Fused Dot Product Add Operators. ARITH Orégane Desrentes, Benoît Dupont de Dinechin, Florent de Dinechin
2023	—	`conf`	In-Place Multicore SIMD Fast Fourier Transforms. HPEC Benoît Dupont de Dinechin, Julien Hascoët, Orégane Desrentes
2022	—	`conf`	A Posit8 Decompression Operator for Deep Neural Network Inference. CoNGA Orégane Desrentes, Diana Resmerita, Benoît Dupont de Dinechin
2022	—	`conf`	Computing In-Place FFTs with SIMD Lane Slicing. HPEC Benoît Dupont de Dinechin
2022	—	`ch.`	SSA Form and Code Generation. SSA-based Compiler Design Benoît Dupont de Dinechin
2021	—	`conf`	Distortion Approximation of a Compressed Softmax Layer. SSP Diana Resmerita, Rodrigo Cabral Farias, Benoît Dupont de Dinechin, Lionel Fillatre
2021	—	`conf`	Engineering a Manycore Processor for Edge Computing. MECO Benoît Dupont de Dinechin
2021	J	`jnl`	Novel Arithmetics in Deep Neural Networks Signal Processing for Autonomous Driving: Challenges and Opportunities. IEEE Signal Process. Mag. Marco Cococcioni, Federico Rossi, Emanuele Ruffaldi, Sergio Saponara, Benoît Dupont de Dinechin
2020	A	`conf`	A study of predictable execution models implementation for industrial data-flow applications on a multi-core platform with shared banked memory. RTSS Matheus Schuh, Claire Maiza, Joël Goossens, Pascal Raymond, Benoît Dupont de Dinechin
2020	J	`jnl`	Bounding the delays of the MPPA network-on-chip with network calculus: Models and benchmarks. Perform. Evaluation Marc Boyer, Amaury Graillat, Benoît Dupont de Dinechin, Jörn Migge
2019	A*	`conf`	Consolidating High-Integrity, High-Performance, and Cyber-Security Functions on a Manycore Processor. DAC Benoît Dupont de Dinechin
2019	Misc	`conf`	Response time analysis of dataflow applications on a many-core processor with shared-memory and network-on-chip. RTNS Amaury Graillat, Claire Maiza, Matthieu Moy, Pascal Raymond, Benoît Dupont de Dinechin
2018	—	`conf`	A Distributed Framework for Low-Latency OpenVX over the RDMA NoC of a Clustered Manycore. HPEC Julien Hascoet, Benoît Dupont de Dinechin, Karol Desnos, Jean-François Nezan
2018	—	`conf`	Co-Design and Abstraction of a Network-on-Chip Using Deterministic Network Calculus. NOCS Benoît Dupont de Dinechin
2018	J	`jnl`	DOL-BIP-Critical: a tool chain for rigorous design and implementation of mixed-criticality multi-core systems. Des. Autom. Embed. Syst. Georgia Giannopoulou, Peter Poplavko, Dario Socci, Pengcheng Huang, Nikolay Stoimenov, Paraskevas Bourgos, Lothar Thiele, Marius Bozga, Saddek Bensalem, Sylvain Girbal, Madeleine Faugère, Romain Soulat, Benoît Dupont de Dinechin
2018	—	`conf`	Embedded Runtime for Reconfigurable Dataflow Graphs on Manycore Architectures. PARMA-DITAM@HiPEAC Hugo Miomandre, Julien Hascoët, Karol Desnos, Kevin J. M. Martin, Benoît Dupont de Dinechin, Jean-François Nezan
2018	A	`conf`	Parallel code generation of synchronous programs for a many-core architecture. DATE Amaury Graillat, Matthieu Moy, Pascal Raymond, Benoît Dupont de Dinechin
2017	—	`conf`	Asynchronous one-sided communications and synchronizations for a clustered manycore processor. ESTIMedia Julien Hascoët, Benoît Dupont de Dinechin, Pierre Guironnet de Massas, Minh Quan Ho
2017	—	`conf`	Feed-Forward Routing for the Wormhole Switching Network-on-Chip of the Kalray MPPA2 Processor. NoCArc@MICRO Benoît Dupont de Dinechin, Amaury Graillat
2017	—	`conf`	Hierarchical Dataflow Model for efficient programming of clustered manycore processors. ASAP Julien Hascoet, Karol Desnos, Jean-François Nezan, Benoît Dupont de Dinechin
2017	C	`conf`	Improving 3D lattice boltzmann method stencil with asynchronous transfers on many-core processors. IPCCC Minh Quan Ho, Christian Obrecht, Bernard Tourancheau, Benoît Dupont de Dinechin, Julien Hascoet
2017	—	`conf`	Network-on-chip service guarantees on the kalray MPPA-256 bostan processor. AISTECS@HiPEAC Benoît Dupont de Dinechin, Amaury Graillat
2017	C	`conf`	Paving the Way Towards a Highly Energy-Efficient and Highly Integrated Compute Node for the Exascale Revolution: The ExaNoDe Approach. DSD Alvise Rigo, Christian Pinto, Kevin Pouget, Daniel Raho, Denis Dutoit, Pierre-Yves Martinez, Chris Doran, Luca Benini, Iakovos Mavroidis, Manolis Marazakis, Valeria Bartsch, Guy Lonsdale, Antoniu Pop, John Goodacre, Annaik Colliot, Paul M. Carpenter, Petar Radojkovic, Dirk Pleiter, Dominique Drouin, Benoît Dupont de Dinechin
2016	J	`jnl`	Mixed-criticality scheduling on cluster-based manycores with shared communication and storage resources. Real Time Syst. Georgia Giannopoulou, Nikolay Stoimenov, Pengcheng Huang, Lothar Thiele, Benoît Dupont de Dinechin
2016	A*	`conf`	Optimal and fast throughput evaluation of CSDF. DAC Bruno Bodin, Alix Munier Kordon, Benoît Dupont de Dinechin
2015	—	`conf`	Implementation of a Fast Fourier transform algorithm onto a manycore processor. DASIP Julien Hascoet, Jean-François Nezan, Andrew Ensor, Benoît Dupont de Dinechin
2015	—	`conf`	Kalray MPPA®: Massively parallel processor array: Revisiting DSP acceleration with the Kalray MPPA Manycore processor. Hot Chips Symposium Benoît Dupont de Dinechin
2015	—	`conf`	MPI communication on MPPA Many-core NoC: design, modeling and performance issues. PARCO Minh Quan Ho, Bernard Tourancheau, Christian Obrecht, Benoît Dupont de Dinechin, Jérôme Reybert
2015	Misc	`conf`	The shift to multicores in real-time and safety-critical systems. CODES+ISSS Selma Saidi, Rolf Ernst, Sascha Uhrig, Henrik Theiling, Benoît Dupont de Dinechin
2014	J	`jnl`	Converging to periodic schedules for cyclic scheduling problems with resources and deadlines. Comput. Oper. Res. Benoît Dupont de Dinechin, Alix Munier Kordon
2014	—	`conf`	Guaranteed Services of the NoC of a Manycore Processor. NoCArc@MICRO Benoît Dupont de Dinechin, Yves Durand, Duco van Amstel, Alexandre Ghiti
2014	A	`conf`	Time-critical computing on a single-chip massively parallel processor. DATE Benoît Dupont de Dinechin, Duco van Amstel, Marc Poulhiès, Guillaume Lager
2014	B	`conf`	Using the SSA-Form in a Code Generator. CC Benoît Dupont de Dinechin
2013	Misc	`conf`	A Distributed Run-Time Environment for the Kalray MPPA ICCS Benoît Dupont de Dinechin, Pierre Guironnet de Massas, Guillaume Lager, Clément Léger, Benjamin Orgogozo, Jérôme Reybert, Thierry Strudel
2013	—	`conf`	A clustered manycore processor architecture for embedded and accelerated applications. HPEC Benoît Dupont de Dinechin, Renaud Ayrignac, Pierre-Edouard Beaucamps, Patrice Couvert, Benoit Ganne, Pierre Guironnet de Massas, François Jacquet, Samuel Jones, Nicolas Morey Chaisemartin, Frédéric Riss, Thierry Strudel
2013	Misc	`conf`	Extended Cyclostatic Dataflow Program Compilation and Execution for an Integrated Manycore Processor. ICCS Pascal Aubry, Pierre-Edouard Beaucamps, Frédéric Blanc, Bruno Bodin, Sergiu Carpov, Loïc Cudennec, Vincent David, Philippe Dore, Paul Dubrulle, Benoît Dupont de Dinechin, François Galea, Thierry Goubier, Michel Harrand, Samuel Jones, Jean-Denis Lesage, Stéphane Louise, Nicolas Morey Chaisemartin, Thanh-Hai Nguyen, Xavier Raynaud, Renaud Sirdey
2013	—	`conf`	Periodic schedules for Cyclo-Static Dataflow. ESTIMedia Bruno Bodin, Alix Munier Kordon, Benoît Dupont de Dinechin
2013	J	`jnl`	Scheduling an interval ordered precedence graph with communication delays and a limited number of processors. RAIRO Oper. Res. Alix Munier Kordon, Fadi Kacem, Benoît Dupont de Dinechin, Lucian Finta
2012	J	`jnl`	Efficient liveness computation using merge sets and DJ-graphs. ACM Trans. Archit. Code Optim. Dibyendu Das, Benoît Dupont de Dinechin, Ramakrishna Upadrasta
2012	—	`conf`	K-Periodic schedules for evaluating the maximum throughput of a Synchronous Dataflow graph. ICSAMOS Bruno Bodin, Alix Munier Kordon, Benoît Dupont de Dinechin
2011	B	`conf`	A Non-iterative Data-Flow Algorithm for Computing Liveness Sets in Strict SSA Programs. APLAS Benoit Boissinot, Florian Brandner, Alain Darte, Benoît Dupont de Dinechin, Fabrice Rastello
2011	—	`conf`	A mixed-precision fused multiply and add. ACSCC Nicolas Brunie, Florent de Dinechin, Benoît Dupont de Dinechin
2011	J	`jnl`	Efficient Spilling Reduction for Software Pipelined Loops in Presence of Multiple Register Types in Embedded VLIW Processors. ACM Trans. Embed. Comput. Syst. Sid Ahmed Ali Touati, Frederic Brault, Karine Deschinkel, Benoît Dupont de Dinechin
2009	A	`conf`	Revisiting Out-of-SSA Translation for Correctness, Code Quality and Efficiency. CGO Benoit Boissinot, Alain Darte, Fabrice Rastello, Benoît Dupont de Dinechin, Christophe Guillon
2008	A	`conf`	Fast liveness checking for ssa-form programs. CGO Benoit Boissinot, Sebastian Hack, Daniel Grund, Benoît Dupont de Dinechin, Fabrice Rastello
2008	—	`conf`	Inter-block Scoreboard Scheduling in a JIT Compiler for VLIW Processors. Euro-Par Benoît Dupont de Dinechin
2006	—	`conf`	SCAN: A Heuristic for Near-Optimal Software Pipelining. Euro-Par Florent Blachot, Benoît Dupont de Dinechin, Guillaume Huard
2005	C	`conf`	Division by Constant for the ST100 DSP Microprocessor. IEEE Symposium on Computer Arithmetic Jean-Michel Muller, Arnaud Tisserand, Benoît Dupont de Dinechin, Christophe Monat
2000	Misc	`conf`	Code generator optimizations for the ST120 DSP-MCU core. CASES Benoît Dupont de Dinechin, François de Ferrière, Christophe Guillon, Artour Stoutchinin
1999	B	`conf`	Extending Modulo Scheduling with Memory Reference Merging. CC Benoît Dupont de Dinechin
1997	—	`conf`	A Unified Software Pipeline Construction Scheme for Modulo Scheduled Loops. LCPC Benoît Dupont de Dinechin
1997	B	`conf`	A Unified Software Pipeline Construction Scheme for Modulo Scheduled Loops. PaCT Benoît Dupont de Dinechin
1997	—	`conf`	Definition of the F LCPC Robert W. Numrich, Jon L. Steidel, Brian H. Johnson, Benoît Dupont de Dinechin, Gary Elsesser, Greg Fischer, Tom MacDonald
1996	—	`conf`	Parametric Computation of Margins and of Minimum Cumulative Register Lifetime Dates. LCPC Benoît Dupont de Dinechin
1995	—	`conf`	Insertion Scheduling: An Alternative to List Scheduling for Modulo Schedulers. LCPC Benoît Dupont de Dinechin
1994	—	`conf`	An Introduction to Simplex Scheduling. IFIP PACT Benoît Dupont de Dinechin
1992	A*	`conf`	StaCS: a Static Control Superscalar architecture. MICRO Benoît Dupont de Dinechin
1991	A	`conf`	A ultra fast Euclidean division algorithm for prime memory systems. SC Benoît Dupont de Dinechin