Ben H. H. Juurlink

164 papers A* 1A 20B 15C 25Misc 5Journal 32Unranked 65

Year	Rank	Type	Title / Venue / Authors
2022	J	`jnl`	A Quantitative Study of Locality in GPU Caches for Memory-Divergent Workloads. Int. J. Parallel Program. Sohan Lal, Sharatchandra Varma Bogaraju, Ben H. H. Juurlink
2022	—	`conf`	Effects of Approximate Computing on Workload Characteristics. ARCS Daniel Maier, Stefan Schirmeister, Ben H. H. Juurlink
2022	—	`conf`	FLEXDP: flexible frequency scaling for energy-delay product optimization of GPU applications. CF Kaijie Fan, Biagio Cosenza, Ben H. H. Juurlink
2022	A	`conf`	Memory Access Granularity Aware Lossless Compression for GPUs. IPDPS Sohan Lal, Manuel Renz, Julian Hartmer, Ben H. H. Juurlink
2021	—	`conf`	ALONA: Automatic Loop Nest Approximation with Reconstruction and Space Pruning. Euro-Par Daniel Maier, Biagio Cosenza, Ben H. H. Juurlink
2021	J	`jnl`	Easy and efficient agent-based simulations with the OpenABL language and compiler. Future Gener. Comput. Syst. Biagio Cosenza, Nikita Popov, Ben H. H. Juurlink, Paul Richmond, Mozhgan Kabiri Chimeh, Carmine Spagnuolo, Gennaro Cordasco, Vittorio Scarano
2021	—	`conf`	Lightweight Dual Modular Redundancy through Approximate Computing. SBESC Gabriel L. Nazar, Pedro H. Kopper, Marcos T. Leipnitz, Ben H. H. Juurlink
2021	—	`conf`	Model-Based Loop Perforation. Euro-Par Workshops Daniel Maier, Ben H. H. Juurlink
2021	A	`conf`	QSLC: Quantization-Based, Low-Error Selective Approximation for GPUs. DATE Sohan Lal, Jan Lucas, Ben H. H. Juurlink
2020	—	`conf`	A Quantitative Study of Locality in GPU Caches. SAMOS Sohan Lal, Ben H. H. Juurlink
2020	A	`conf`	Accelerating The Vvc Decoder For Vector Length Agnostic Simd Architectures. ICME Yassin Kaddar, Angela Pohl, Ben H. H. Juurlink
2020	J	`jnl`	Accurate Energy and Performance Prediction for Frequency-Scaled GPU Kernels. Comput. Kaijie Fan, Biagio Cosenza, Ben H. H. Juurlink
2020	B	`conf`	DenseDisp: Resource-Aware Disparity Map Estimation by Compressing Siamese Neural Architecture. CEC Mohammad Loni, Ali Zoljodi, Daniel Maier, Amin Majd, Masoud Daneshtalab, Mikael Sjödin, Ben H. H. Juurlink, Reza Akbari
2020	J	`jnl`	Vectorization cost modeling for NEON, AVX and SVE. Perform. Evaluation Angela Pohl, Biagio Cosenza, Ben H. H. Juurlink
2019	A	`conf`	A Bin-Based Bitstream Partitioning Approach for Parallel CABAC Decoding in Next Generation Video Coding. IPDPS Philipp Habermann, Chi Ching Chi, Mauricio Alvarez-Mesa, Ben H. H. Juurlink
2019	—	`conf`	A Performance Analysis of Vector Length Agnostic Code. HPCS Angela Pohl, Mirko Greese, Biagio Cosenza, Ben H. H. Juurlink
2019	—	`conf`	An Efficient Lightweight Framework for Porting Vision Algorithms on Embedded SoCs. IESS Apurv Ashish, Sohan Lal, Ben H. H. Juurlink
2019	—	`conf`	Approximating Memory-bound Applications on Mobile GPUs. HPCS Daniel Maier, Nadjib Mammeri, Biagio Cosenza, Ben H. H. Juurlink
2019	—	`conf`	Evaluating the Memory Architecture of Next-Generation FPGA-SoCs for HPC. HPCS Matthias Goebel, Kai Norman Clasen, Robert Drehmel, Ben H. H. Juurlink
2019	—	`conf`	MEMPower: Data-Aware GPU Memory Power Model. ARCS Jan Lucas, Ben H. H. Juurlink
2019	—	`conf`	Performance Counters based Power Modeling of Mobile GPUs using Deep Learning. HPCS Nadjib Mammeri, Markus Neu, Sohan Lal, Ben H. H. Juurlink
2019	B	`conf`	Portable Cost Modeling for Auto-Vectorizers. MASCOTS Angela Pohl, Biagio Cosenza, Ben H. H. Juurlink
2019	B	`conf`	Predictable GPUs Frequency Scaling for Energy and Performance. ICPP Kaijie Fan, Biagio Cosenza, Ben H. H. Juurlink
2019	A	`conf`	SLC: Memory Access Granularity Aware Selective Lossy Compression for GPUs. DATE Sohan Lal, Jan Lucas, Ben H. H. Juurlink
2019	C	`conf`	VComputeLib: Enabling Cross-Platform GPGPU on Mobile and Embedded GPUs. MoMM Nadjib Mammeri, Ben H. H. Juurlink
2018	C	`conf`	Accelerating the RICH Particle Detector Algorithm on Intel Xeon Phi. PDP Christina Quast, Angela Pohl, Biagio Cosenza, Ben H. H. Juurlink, Rainer Schwemmer
2018	—	`conf`	An Application-Specific Memory Management Unit for FPGA-SoCs. IPDPS Workshops Matthias Goebel, Ilja Behnke, Ahmed Elhossini, Ben H. H. Juurlink
2018	C	`conf`	Control Flow Vectorization for ARM NEON. SCOPES Angela Pohl, Biagio Cosenza, Ben H. H. Juurlink
2018	C	`conf`	Cost Modelling for Vectorization on ARM. CLUSTER Angela Pohl, Biagio Cosenza, Ben H. H. Juurlink
2018	J	`jnl`	Highly parallel HEVC decoding for heterogeneous systems with CPU and GPU. Signal Process. Image Commun. Biao Wang, Diego F. de Souza, Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink, Aleksandar Ilic, Nuno Roma, Leonel Sousa
2018	A	`conf`	Local memory-aware kernel perforation. CGO Daniel Maier, Biagio Cosenza, Ben H. H. Juurlink
2018	—	`conf`	OpenABL: A Domain-Specific Language for Parallel and Distributed Agent-Based Simulations. Euro-Par Biagio Cosenza, Nikita Popov, Ben H. H. Juurlink, Paul Richmond, Mozhgan Kabiri Chimeh, Carmine Spagnuolo, Gennaro Cordasco, Vittorio Scarano
2018	A	`conf`	Optimal DC/AC data bus inversion coding. DATE Jan Lucas, Sohan Lal, Ben H. H. Juurlink
2018	J	`jnl`	Performance evaluation of implicit and explicit SIMDization. Microprocess. Microsystems Hossein Amiri, Asadollah Shahbahrami, Angela Pohl, Ben H. H. Juurlink
2018	—	`conf`	VComputeBench: A Vulkan Benchmark Suite for GPGPU on Mobile and Embedded GPUs. IISWC Nadjib Mammeri, Ben H. H. Juurlink
2017	C	`conf`	A Methodology for Predicting Application-Specific Achievable Memory Bandwidth for HW/SW-Codesign. DSD Matthias Göbel, Ahmed Elhossini, Ben H. H. Juurlink
2017	—	`conf`	A Quantitative Analysis of the Memory Architecture of FPGA-SoCs. ARC Matthias Göbel, Ahmed Elhossini, Chi Ching Chi, Mauricio Alvarez-Mesa, Ben H. H. Juurlink
2017	A	`conf`	Autotuning Stencil Computations with Structural Ordinal Regression Learning. IPDPS Biagio Cosenza, Juan José Durillo, Stefano Ermon, Ben H. H. Juurlink
2017	A	`conf`	E^2MC: Entropy Encoding Based Memory Compression for GPUs. IPDPS Sohan Lal, Jan Lucas, Ben H. H. Juurlink
2017	—	`conf`	Enabling GPU software developers to optimize their applications - The LPGPU DASIP Ben H. H. Juurlink, Jan Lucas, Nadjib Mammeri, Georgios Keramidas, Katerina Pontzolkova, Ignacio Aransay, Chrysa Kokkala, Martyn Bliss, Andrew Richards
2017	J	`jnl`	GPU Parallelization of HEVC In-Loop Filters. Int. J. Parallel Program. Biao Wang, Diego F. de Souza, Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink, Aleksandar Ilic, Nuno Roma, Leonel Sousa
2017	B	`conf`	Static optimization in PHP 7. CC Nikita Popov, Biagio Cosenza, Ben H. H. Juurlink, Dmitry Stogov
2017	C	`conf`	Stencil Autotuning with Ordinal Regression: Extended Abstract. SCOPES Biagio Cosenza, Juan José Durillo, Stefano Ermon, Ben H. H. Juurlink
2017	Misc	`conf`	Syntax Element Partitioning for high-throughput HEVC CABAC decoding. ICASSP Philipp Habermann, Chi Ching Chi, Mauricio Alvarez-Mesa, Ben H. H. Juurlink
2017	C	`conf`	The LPGPU2 Project: Low-Power Parallel Computing on GPUs: Extended Abstract. SCOPES Ben H. H. Juurlink, Jan Lucas, Nadjib Mammeri, Martyn Bliss, Georgios Keramidas, Chrysa Kokkala, Andrew Richards
2016	B	`conf`	ALUPower: Data Dependent Power Consumption in GPUs. MASCOTS Jan Lucas, Ben H. H. Juurlink
2016	—	`conf`	An evaluation of current SIMD programming models for C++. WPMVP@PPoPP Angela Pohl, Biagio Cosenza, Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink
2016	C	`conf`	Efficient HEVC decoder for heterogeneous CPU with GPU systems. MMSP Biao Wang, Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink, Diego F. de Souza, Aleksandar Ilic, Nuno Roma, Leonel Sousa
2016	—	`conf`	FPGA based hardware accelerator for KAZE feature extraction algorithm. FPT Lester Kalms, Ahmed Elhossini, Ben H. H. Juurlink
2016	A	`conf`	The neuro vector engine: Flexibility to improve convolutional net efficiency for wearable vision. DATE Maurice Peemen, Runbin Shi, Sohan Lal, Ben H. H. Juurlink, Bart Mesman, Henk Corporaal
2015	A	`conf`	An Efficient and Flexible FPGA Implementation of a Face Detection System (Abstract Only). FPGA Hichem Ben Fekih, Ahmed Elhossini, Ben H. H. Juurlink
2015	—	`conf`	An Efficient and Flexible FPGA Implementation of a Face Detection System. ARC Hichem Ben Fekih, Ahmed Elhossini, Ben H. H. Juurlink
2015	Misc	`conf`	High Performance Memory Accesses on FPGA-SoCs: A Quantitative Analysis. FCCM Matthias Göbel, Chi Ching Chi, Mauricio Alvarez-Mesa, Ben H. H. Juurlink
2015	A	`conf`	Multi/many-core programming: where are we standing? DATE Jerónimo Castrillón, Lothar Thiele, Lars Schor, Weihua Sheng, Ben H. H. Juurlink, Mauricio Alvarez-Mesa, Angela Pohl, Ralph Jessenberger, Victor Reyes, Rainer Leupers
2015	A	`conf`	Nexus#: A Distributed Hardware Task Manager for Task-Based Programming Models. IPDPS Tamer Dallou, Nina Engelhardt, Ahmed Elhossini, Ben H. H. Juurlink
2015	B	`conf`	On latency in GPU throughput microarchitectures. ISPASS Michael Andersch, Jan Lucas, Mauricio Alvarez-Mesa, Ben H. H. Juurlink
2015	C	`conf`	Optimizing HEVC CABAC Decoding with a Context Model Cache and Application-Specific Prefetching. ISM Philipp Habermann, Chi Ching Chi, Mauricio Alvarez-Mesa, Ben H. H. Juurlink
2015	J	`jnl`	Parallel H.264/AVC Motion Compensation for GPUs Using OpenCL. IEEE Trans. Circuits Syst. Video Technol. Biao Wang, Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink
2015	C	`conf`	Reducing HEVC encoding complexity using two-stage motion estimation. VCIP Gabriel Cebrián-Márquez, Chi Ching Chi, José Luis Martínez, Pedro Cuenca, Mauricio Alvarez-Mesa, Sergio Sanz Rodríguez, Ben H. H. Juurlink
2015	J	`jnl`	SIMD Acceleration for HEVC Decoding. IEEE Trans. Circuits Syst. Video Technol. Chi Ching Chi, Mauricio Alvarez-Mesa, Benjamin Bross, Ben H. H. Juurlink, Thomas Schierl
2015	J	`jnl`	Spatiotemporal SIMT and Scalarization for Improving GPU Efficiency. ACM Trans. Archit. Code Optim. Jan Lucas, Michael Andersch, Mauricio Alvarez-Mesa, Ben H. H. Juurlink
2014	—	`conf`	A generic implementation of a quantified predictor on FPGAs. ACM Great Lakes Symposium on VLSI Gervin Thomas, Ahmed Elhossini, Ben H. H. Juurlink
2014	—	`conf`	An Integrated Hardware-Software Approach to Task Graph Management. HPCC/CSS/ICESS Nina Engelhardt, Tamer Dallou, Ahmed Elhossini, Ben H. H. Juurlink
2014	—	`conf`	GPGPU workload characteristics and performance analysis. ICSAMOS Sohan Lal, Jan Lucas, Michael Andersch, Mauricio Alvarez-Mesa, Ahmed Elhossini, Ben H. H. Juurlink
2014	J	`jnl`	Low-Power High-Efficiency Video Decoding using General-Purpose Processors. ACM Trans. Archit. Code Optim. Chi Ching Chi, Mauricio Alvarez-Mesa, Ben H. H. Juurlink
2014	J	`jnl`	TACO: A scheduling scheme for parallel applications on multicore architectures. Sci. Program. Jan Hendrik Schönherr, Ben H. H. Juurlink, Jan Richling
2013	—	`conf`	HEVC performance and complexity for 4K video. ICCE-Berlin Benjamin Bross, Valeri George, Mauricio Alvarez-Mesa, Tobias Mayer, Chi Ching Chi, Jens Brandenburg, Thomas Schierl, Detlev Marpe, Ben H. H. Juurlink
2013	B	`conf`	How a single chip causes massive power bills GPUSimPow: A GPGPU power simulator. ISPASS Jan Lucas, Sohan Lal, Michael Andersch, Mauricio Alvarez-Mesa, Ben H. H. Juurlink
2013	J	`jnl`	Parallel HEVC Decoding on Multi- and Many-core Architectures - A Power and Performance Analysis. J. Signal Process. Syst. Chi Ching Chi, Mauricio Alvarez-Mesa, Jan Lucas, Ben H. H. Juurlink, Thomas Schierl
2012	C	`conf`	A Predictor-Based Power-Saving Policy for DRAM Memories. DSD Gervin Thomas, Karthik Chandrasekar, Benny Akesson, Ben H. H. Juurlink, Kees Goossens
2012	J	`jnl`	Amdahl's law for predicting the future of multicores considered harmful. SIGARCH Comput. Archit. News Ben H. H. Juurlink, Cor Meenderinck
2012	—	`conf`	An Optimized Parallel IDCT on Graphics Processing Units. Euro-Par Workshops Biao Wang, Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink
2012	—	`conf`	Hardware-Based Task Dependency Resolution for the StarSs Programming Model. ICPP Workshops Tamer Dallou, Ben H. H. Juurlink
2012	B	`conf`	Improving the parallelization efficiency of HEVC decoding. ICIP Chi Ching Chi, Mauricio Alvarez-Mesa, Ben H. H. Juurlink, Valeri George, Thomas Schierl
2012	J	`jnl`	Parallel Scalability and Efficiency of HEVC Parallelization Approaches. IEEE Trans. Circuits Syst. Video Technol. Chi Ching Chi, Mauricio Alvarez-Mesa, Ben H. H. Juurlink, Gordon Clare, Félix Henry, Stéphane Pateux, Thomas Schierl
2012	Misc	`conf`	Parallel video decoding in the emerging HEVC standard. ICASSP Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink, Valeri George, Thomas Schierl
2012	B	`conf`	Programming parallel embedded and consumer applications in OpenMP superscalar. PPoPP Michael Andersch, Chi Ching Chi, Ben H. H. Juurlink
2012	—	`book`	Scalable Parallel Programming Applied to H.264/AVC Decoding. Ben H. H. Juurlink, Mauricio Alvarez-Mesa, Chi Ching Chi, Arnaldo Azevedo, Cor Meenderinck, Alex Ramírez
2012	—	`conf`	SynZEN: A hybrid TTA/VLIW architecture with a distributed register file. NORCHIP Stefan Hauser, Nico Moser, Ben H. H. Juurlink
2012	—	`conf`	Using OpenMP superscalar for parallelization of embedded and consumer applications. ICSAMOS Michael Andersch, Chi Ching Chi, Ben H. H. Juurlink
2011	J	`jnl`	A Highly Scalable Parallel Implementation of H.264. Trans. High Perform. Embed. Archit. Compil. Arnaldo Azevedo, Ben H. H. Juurlink, Cor Meenderinck, Andrei Sergeevich Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez, Mateo Valero
2011	A	`conf`	A QHD-capable parallel H.264 decoder. ICS Chi Ching Chi, Ben H. H. Juurlink
2011	—	`conf`	An Instruction to Accelerate Software Caches. ARCS Arnaldo Azevedo, Ben H. H. Juurlink
2011	—	`conf`	Composable local memory organisation for streaming applications on embedded MPSoCs. Conf. Computing Frontiers Jude Angelo Ambrose, Anca Mariana Molnos, Andrew Nelson, Sorin Cotofana, Kees Goossens, Ben H. H. Juurlink
2011	B	`conf`	Implications of Merging Phases on Scalability of Multi-core Architectures. ICPP Madhavan Manivannan, Ben H. H. Juurlink, Per Stenström
2011	—	`conf`	Multi-Core - the Future of Embedded Systems. MBMV Ben H. H. Juurlink
2011	C	`conf`	Nexus: Hardware Support for Task-Based Programming. DSD Cor Meenderinck, Ben H. H. Juurlink
2011	A	`conf`	Poster: implications of merging phases on scalability of multi-core architectures. ICS Madhavan Manivannan, Ben H. H. Juurlink, Per Stenström
2010	C	`conf`	A Case for Hardware Task Management Support for the StarSS Programming Model. DSD Cor Meenderinck, Ben H. H. Juurlink
2010	J	`jnl`	A Multidimensional Software Cache for Scratchpad-Based Systems. Int. J. Embed. Real Time Commun. Syst. Arnaldo Azevedo, Ben H. H. Juurlink
2010	A	`conf`	Evaluation of parallel H.264 decoding strategies for the Cell Broadband Engine. ICS Chi Ching Chi, Ben H. H. Juurlink, Cor Meenderinck
2010	—	`conf`	Extending the Cell SPE with Energy Efficient Branch Prediction. Euro-Par (1) Martijn Briejer, Cor Meenderinck, Ben H. H. Juurlink
2010	A	`conf`	Instruction precomputation with memoization for fault detection. DATE Demid Borodin, Ben H. H. Juurlink
2010	—	`conf`	Protective redundancy overhead reduction using instruction vulnerability factor. Conf. Computing Frontiers Demid Borodin, Ben H. H. Juurlink
2010	J	`jnl`	The SARC Architecture. IEEE Micro Alex Ramírez, Felipe Cabarcas, Ben H. H. Juurlink, Mauricio Alvarez-Mesa, Friman Sánchez, Arnaldo Azevedo, Cor Meenderinck, Catalin Bogdan Ciobanu, Sebastián Isaza, Georgi Gaydadjiev
2009	—	`conf`	An efficient software cache for H.264 motion compensation. SoC Arnaldo Azevedo, Ben H. H. Juurlink
2009	C	`conf`	Instruction Precomputation for Fault Detection. DSD Demid Borodin, Ben H. H. Juurlink, Stefanos Kaxiras
2009	J	`jnl`	Instruction-Level Fault Tolerance Configurability. J. Signal Process. Syst. Demid Borodin, Ben H. H. Juurlink, Said Hamdioui, Stamatis Vassiliadis
2009	C	`conf`	Intra-vector SIMD instructions for core specialization. ICCD Cor Meenderinck, Ben H. H. Juurlink
2009	—	`conf`	Introduction. Euro-Par Pedro C. Diniz, Ben H. H. Juurlink, Alain Darte, Wolfgang Karl
2009	J	`jnl`	Leakage-Aware Multiprocessor Scheduling. J. Signal Process. Syst. Pepijn J. de Langen, Ben H. H. Juurlink
2009	A	`conf`	Limiting the number of dirty cache lines. DATE Pepijn J. de Langen, Ben H. H. Juurlink
2009	—	`conf`	Parallel H.264 Decoding on an Embedded Multicore Processor. HiPEAC Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Andrei Sergeevich Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez
2009	J	`jnl`	Parallel Scalability of Video Decoders. J. Signal Process. Syst. Cor Meenderinck, Arnaldo Azevedo, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez
2009	—	`conf`	Performance Improvement of Multimedia Kernels by Alleviating Overhead Instructions on SIMD Devices. APPT Asadollah Shahbahrami, Ben H. H. Juurlink
2009	C	`conf`	SIMD Architectural Enhancements to Improve the Performance of the 2D Discrete Wavelet Transform. DSD Asadollah Shahbahrami, Ben H. H. Juurlink
2009	B	`conf`	Scalability of Macroblock-level Parallelism for H.264 Decoding. ICPADS Mauricio Alvarez-Mesa, Alex Ramírez, Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mateo Valero
2009	—	`conf`	Scalar Processing Overhead on SIMD-Only Architectures. ASAP Arnaldo P. Azevedo Filho, Ben H. H. Juurlink
2009	—	`conf`	Specialization of the Cell SPE for Media Applications. ASAP Cor Meenderinck, Ben H. H. Juurlink
2009	—	`conf`	The 3TU embedded systems master in the Netherlands. WESE@ESWEEK Gerard J. M. Smit, Gerrit F. van der Hoeven, Jan Friso Groote, Ralph H. J. M. Otten, Hans Tonino, Ben H. H. Juurlink, Boudewijn R. H. M. Haverkort
2008	—	`conf`	(When) Will CMPs Hit the Power Wall?. Euro-Par Workshops Cor Meenderinck, Ben H. H. Juurlink
2008	C	`conf`	A Low-Cost Cache Coherence Verification Method for Snooping Systems. DSD Demid Borodin, Ben H. H. Juurlink
2008	C	`conf`	Analysis of video filtering on the cell processor. ISCAS Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez
2008	C	`conf`	Analyzing Scalability of Deblocking Filter of H.264 via TLP Exploitation in a New Many-Core Architecture. DSD Roberto Giorgi, Zdravko Popovic, Nikola Puzovic, Arnaldo Azevedo, Ben H. H. Juurlink
2008	J	`jnl`	GRAAL: A Framework for Low-Power 3D Graphics Accelerators. IEEE Computer Graphics and Applications Ben H. H. Juurlink, Iosif Antochi, Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis
2008	J	`jnl`	Implementing the 2-D Wavelet Transform on SIMD-Enhanced General-Purpose Processors. IEEE Trans. Multim. Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis
2008	—	`conf`	Memory copies in multi-level memory systems. ASAP Pepijn J. de Langen, Ben H. H. Juurlink
2008	C	`conf`	Optimization of Content-Based Image Retrieval Functions. ISM Asadollah Shahbahrami, Ben H. H. Juurlink
2008	J	`jnl`	Versatility of extended subwords and the matrix register file. ACM Trans. Archit. Code Optim. Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis
2007	—	`conf`	Instruction-Level Fault Tolerance Configurability. ICSAMOS Demid Borodin, Ben H. H. Juurlink, Stamatis Vassiliadis
2007	C	`conf`	Optimizing Cache Performance of the Discrete Wavelet Transform Using a Visualization Tool. ISM Jie Tao, Asadollah Shahbahrami, Ben H. H. Juurlink, Rainer Buchty, Wolfgang Karl, Stamatis Vassiliadis
2007	—	`conf`	SIMD Vectorization of Histogram Functions. ASAP Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis
2007	—	`conf`	Trade-Offs Between Voltage Scaling and Processor Shutdown for Low-Energy Embedded Multiprocessors. SAMOS Pepijn J. de Langen, Ben H. H. Juurlink
2006	C	`conf`	Accelerating Color Space Conversion Using Extended Subwords and the Matrix Register File. ISM Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis
2006	J	`jnl`	Avoiding Conversion and Rearrangement Overhead in SIMD Architectures. Int. J. Parallel Program. Asadollah Shahbahrami, Ben H. H. Juurlink, Demid Borodin, Stamatis Vassiliadis
2006	—	`conf`	Improving the memory behavior of vertical filtering in the discrete wavelet transform. Conf. Computing Frontiers Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis
2006	A	`conf`	Leakage-aware multiprocessor scheduling for low power. IPDPS Pepijn J. de Langen, Ben H. H. Juurlink
2006	Misc	`conf`	Limitations of special-purpose instructions for similarity measurements in media SIMD extensions. CASES Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis
2005	Misc	`conf`	Avoiding data conversions in embedded media processors. SAC Ben H. H. Juurlink, Asadollah Shahbahrami, Stamatis Vassiliadis
2005	—	`conf`	Implementing Hardware Multithreading in a VLIW Architecture. IASTED PDCS Stephan Suijkerbuijk, Ben H. H. Juurlink
2005	—	`conf`	Matrix register file and extended subwords: two techniques for embedded media processors. Conf. Computing Frontiers Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis
2005	—	`conf`	Performance Comparison of SIMD Implementations of the Discrete Wavelet Transform. ASAP Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis
2005	J	`jnl`	The CSI multimedia architecture. IEEE Trans. Very Large Scale Integr. Syst. Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff
2004	—	`conf`	Accelerating the secure remote password protocol using reconfigurable hardware. Conf. Computing Frontiers Peter Groen, Panu Hämäläinen, Ben H. H. Juurlink, Timo Hämäläinen
2004	—	`conf`	Approximating the optimal replacement algorithm. Conf. Computing Frontiers Ben H. H. Juurlink
2004	—	`conf`	Dynamic techniques to reduce memory traffic in embedded systems. Conf. Computing Frontiers Ben H. H. Juurlink, Pepijn J. de Langen
2004	B	`conf`	GraalBench: a 3D graphics benchmark suite for mobile phones. LCTES Iosif Antochi, Ben H. H. Juurlink, Stamatis Vassiliadis, Petri Liuha
2004	—	`conf`	Memory Bandwidth Requirements of Tile-Based Rendering. SAMOS Iosif Antochi, Ben H. H. Juurlink, Stamatis Vassiliadis, Petri Liuha
2004	—	`conf`	Reducing traffic generated by conflict misses in caches. Conf. Computing Frontiers Pepijn J. de Langen, Ben H. H. Juurlink
2004	C	`conf`	Scene Management Models and Overlap Tests for Tile-Based Rendering. DSD Iosif Antochi, Ben H. H. Juurlink, Stamatis Vassiliadis, Petri Liuha
2004	A	`conf`	Sparse Matrix Transpose Unit. IPDPS Pyrrhos Stathis, Dmitry Cheresiz, Stamatis Vassiliadis, Ben H. H. Juurlink
2003	J	`jnl`	Implementation of a streaming execution unit. J. Syst. Archit. Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff
2003	J	`jnl`	Optimal broadcast on parallel locality models. J. Discrete Algorithms Ben H. H. Juurlink, Petr Kolman, Friedhelm Meyer auf der Heide, Ingo Rieping
2003	J	`jnl`	The Paderborn University BSP (PUB) library. Parallel Comput. Olaf Bonorden, Ben H. H. Juurlink, Ingo von Otte, Ingo Rieping
2003	C	`conf`	Unified Dual Data Caches. DSD Ben H. H. Juurlink
2002	—	`conf`	Architectural Support for 3D Graphics in the Complex Streamed Instruction Set. IASTED PDCS Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff
2002	C	`conf`	Implementation of a Streaming Execution Unit. DSD Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff
2002	—	`conf`	Performance Scalability of Multimedia Instruction Set Extensions. Euro-Par Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff
2001	—	`conf`	Implementation and Evaluation of the Complex Streamed Instruction Set. IEEE PACT Ben H. H. Juurlink, Stamatis Vassiliadis, Dmitri Tcheressiz, Harry A. G. Wijshoff
2001	—	`conf`	Performance of the Complex Streamed Instruction Set on Image Processing Kernels. Euro-Par Dmitri Tcheressiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff
2000	—	`conf`	Complex Streamed Instructions: Introduction and Initial Evaluatio. EUROMICRO Stamatis Vassiliadis, Ben H. H. Juurlink, Edwin A. Hakkennes
2000	—	`conf`	Counter Based Superscalar Instruction Issuing. EUROMICRO Sorin Cotofana, Ben H. H. Juurlink, Stamatis Vassiliadis
2000	B	`conf`	Optimal broadcast on parallel locality models. SIROCCO Ben H. H. Juurlink, Petr Kolman, Friedhelm Meyer auf der Heide, Ingo Rieping
1999	—	`conf`	The Paderborn University BSP (PUB) Library - Design, Implementation and Performance. IPPS/SPDP Olaf Bonorden, Ben H. H. Juurlink, Ingo von Otte, Ingo Rieping
1998	J	`jnl`	A Quantitative Comparison of Parallel Computation Models. ACM Trans. Comput. Syst. Ben H. H. Juurlink, Harry A. G. Wijshoff
1998	B	`conf`	Communication-Optimal Parallel Minimum Spanning Tree Algorithms (Extended Abstract). SPAA Micah Adler, Wolfgang Dittrich, Ben H. H. Juurlink, Miroslaw Kutylowski, Ingo Rieping
1998	—	`conf`	Experimental Validation of Parallel Computation Models on the Intel Paragon. IPPS/SPDP Ben H. H. Juurlink
1998	J	`jnl`	Gossiping on Meshes and Tori. IEEE Trans. Parallel Distributed Syst. Ben H. H. Juurlink, Jop F. Sibeyn, P. S. Rao
1996	B	`conf`	A Quantitative Comparison of Parallel Computation Models. SPAA Harry A. G. Wijshoff, Ben H. H. Juurlink
1996	J	`jnl`	Communication Primitives for BSP Computers. Inf. Process. Lett. Ben H. H. Juurlink, Harry A. G. Wijshoff
1996	—	`conf`	The E-BSP Model: Incorporating General Locality and Unbalanced Communication into the BSP Model. Euro-Par, Vol. II Ben H. H. Juurlink, Harry A. G. Wijshoff
1996	—	`conf`	Worm-Hole Gossiping on Meshes. Euro-Par, Vol. I Ben H. H. Juurlink, P. S. Rao, Jop F. Sibeyn
1994	—	`conf`	The Parallel Hierarchical Memory Model. SWAT Ben H. H. Juurlink, Harry A. G. Wijshoff
1993	A*	`conf`	Experiences with a Model for Parallel Computation. PODC Ben H. H. Juurlink, Harry A. G. Wijshoff