Basireddy Karunakar Reddy

21 papers A 1C 1Misc 2Journal 11Unranked 6
YearRankTypeTitle / Venue / Authors
2020 J jnl
AdaMD: Adaptive Mapping and DVFS for Energy-Efficient Heterogeneous Multicores.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Basireddy Karunakar Reddy, Amit Kumar Singh, Bashir M. Al-Hashimi, Geoff V. Merrett
2020 J jnl
Collaborative Adaptation for Energy-Efficient Heterogeneous Mobile SoCs.
IEEE Trans. Computers
Amit Kumar Singh, Basireddy Karunakar Reddy, Alok Prakash, Geoff V. Merrett, Bashir M. Al-Hashimi
2020 J jnl
Dynamic Energy and Thermal Management of Multi-core Mobile Platforms: A Survey.
IEEE Des. Test
Amit Kumar Singh, Somdip Dey, Klaus D. McDonald-Maier, Basireddy Karunakar Reddy, Geoff V. Merrett, Bashir M. Al-Hashimi
2019 Misc conf
EdgeCoolingMode: An Agent Based Thermal Management Mechanism for DVFS Enabled Heterogeneous MPSoCs.
VLSID
Somdip Dey, Enrique Zaragoza Guajardo, Basireddy Karunakar Reddy, Xiaohang Wang, Amit Kumar Singh, Klaus D. McDonald-Maier
2019 J jnl
Predictive Thermal Management for Energy-Efficient Execution of Concurrent Applications on Heterogeneous Multicores.
IEEE Trans. Very Large Scale Integr. Syst.
Eduardo Weber Wächter, Cedric de Bellefroid, Basireddy Karunakar Reddy, Amit Kumar Singh, Bashir M. Al-Hashimi, Geoff V. Merrett
2018 J jnl
Cut-less Technology Mapping Using Shannon Factor Graph with on-the-fly Size Reduction.
J. Low Power Electron.
Basireddy Karunakar Reddy, Srinivas Sabbavarapu, Amit Acharyya
2018 J jnl
Inter-Cluster Thread-to-Core Mapping and DVFS on Heterogeneous Multi-Cores.
IEEE Trans. Multi Scale Comput. Syst.
Basireddy Karunakar Reddy, Amit Kumar Singh, Dwaipayan Biswas, Geoff V. Merrett, Bashir M. Al-Hashimi
2018 J jnl
Novel ASIC Design Flow Using Dynamic Libraries for Reducing Design Time.
J. Low Power Electron.
Srinivas Sabbavarapu, Basireddy Karunakar Reddy, Amit Acharyya
2018 A conf
Online concurrent workload classification for multi-core energy management.
DATE
Basireddy Karunakar Reddy, Geoff V. Merrett, Bashir M. Al-Hashimi, Amit Kumar Singh
2018 — conf
Workload-Aware Runtime Energy Management for HPC Systems.
HPCS
Basireddy Karunakar Reddy, Eduardo Weber Wächter, Bashir M. Al-Hashimi, Geoff V. Merrett
2017 — conf
Empirical CPU power modelling and estimation in the gem5 simulator.
PATMOS
Basireddy Karunakar Reddy, Matthew J. Walker, Domenico Balsamo, Stephan Diestelhorst, Bashir M. Al-Hashimi, Geoff V. Merrett
2017 J jnl
Energy-Efficient Run-Time Mapping and Thread Partitioning of Concurrent OpenCL Applications on CPU-GPU MPSoCs.
ACM Trans. Embed. Comput. Syst.
Amit Kumar Singh, Alok Prakash, Basireddy Karunakar Reddy, Geoff V. Merrett, Bashir M. Al-Hashimi
2017 J jnl
Improved Wire Length-Driven Placement Technique for Minimizing Wire Length, Area and Timing.
J. Low Power Electron.
Srinivas Sabbavarapu, Basireddy Karunakar Reddy, Amit Acharyya, S. Saqib Khursheed
2017 J jnl
Learning-Based Run-Time Power and Energy Management of Multi/Many-Core Systems: Current and Future Trends.
J. Low Power Electron.
Amit Kumar Singh, Charles Leech, Basireddy Karunakar Reddy, Bashir M. Al-Hashimi, Geoff V. Merrett
2014 — conf
A New Dynamic Library Based IC Design Automation Methodology Using Functional Symmetry with NPN Class Representation Approach to Reduce NRE Costs and Time-to-Market.
ISED
Srinivas Sabbavarapu, Basireddy Karunakar Reddy, Amit Acharyya
2014 J jnl
A Novel Integrated Circuit Design Methodology Using Dynamic Library Concept with Reduced Non-Recurring Engineering Cost and Time-to-Market.
J. Low Power Electron.
Srinivas Sabbavarapu, Basireddy Karunakar Reddy, N. Srinivasulu, Amit Acharyya, Jimson Mathew
2014 C conf
A new VLSI IC design automation methodology with reduced NRE costs and time-to-market using the NPN class Representation and functional symmetry.
ISCAS
Basireddy Karunakar Reddy, Srinivas Sabbavarapu, Amit Acharyya
2014 Misc conf
Active Cooling Technique for Efficient Heat Mitigation in 3D-ICs.
VLSID
Pramod Kaddi, Basireddy Karunakar Reddy, Shiv Govind Singh
2014 — conf
Effect of Constant One and Zero, Shared and Non-decomposed Nodes on Runtime and Graph Size of the Shannon Factor Graph (SFG).
ISED
Basireddy Karunakar Reddy, Srinivas Sabbavarapu, Amit Acharyya
2013 — conf
A Novel Physical Synthesis Methodology in the VLSI Design Automation by Introducing Dynamic Library Concept.
ISED
Srinivas Sabbavarapu, Basireddy Karunakar Reddy, Rayapati Prabhat, Kshitiz Gupta, Amit Acharyya, Rishad Ahmed Shafik, Jimson Mathew
2013 — conf
A Novel and Unified Digital IC Design and Automation Methodology with Reduced NRE Cost and Time-to-Market.
ISED
Basireddy Karunakar Reddy, Srinivas Sabbavarapu, Kshitiz Gupta, Rayapati Prabhat, Amit Acharyya, Rishad A. Shafik, Jimson Mathew