Basant Kumar Mohanty

21 papers Misc 1Journal 20
YearRankTypeTitle / Venue / Authors
2026 J jnl
Guest Editorial: Low Power Computing: Devices, Circuits & Systems for Signal Processing.
Circuits Syst. Signal Process.
Basant Kumar Mohanty, Alak Majumdar, Durgesh Nandan, Gyungsu Byun
2024 J jnl
Memory-Efficient Multiplier-Less 2-D DWT Design Using Combined Convolution and Lifting Schemes for Wireless Visual Sensors.
IEEE Trans. Very Large Scale Integr. Syst.
Basant Kumar Mohanty
2023 J jnl
Efficient Approximate Multiplier Design Based on Hybrid Higher Radix Booth Encoding.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Basant Kumar Mohanty
2020 J jnl
An Efficient Parallel DA-Based Fixed-Width Design for Approximate Inner-Product Computation.
IEEE Trans. Very Large Scale Integr. Syst.
Basant Kumar Mohanty, Pramod Kumar Meher
2020 J jnl
Parallel VLSI Architecture for Approximate Computation of Discrete Hadamard Transform.
IEEE Trans. Circuits Syst. Video Technol.
Basant Kumar Mohanty
2019 J jnl
Efficient Fixed-Width Adder-Tree Design.
IEEE Trans. Circuits Syst. II Express Briefs
Basant Kumar Mohanty
2018 J jnl
Hardware Design for VLSI Implementation of Acoustic Feedback Canceller in Hearing Aids.
Circuits Syst. Signal Process.
Vasundhara, Basant Kumar Mohanty, Ganapati Panda, Niladri B. Puhan
2018 J jnl
Novel Data-Access Scheme and Efficient Parallel Architecture for Multi-level Lifting 2-D DWT.
Circuits Syst. Signal Process.
Abhishek Choubey, Basant Kumar Mohanty
2017 J jnl
Efficient Design for Radix-8 Booth Multiplier and Its Application in Lifting 2-D DWT.
Circuits Syst. Signal Process.
Basant Kumar Mohanty, Abhishek Choubey
2017 J jnl
Hardware Design for VLSI Implementation of FxLMS- and FsLMS-Based Active Noise Controllers.
Circuits Syst. Signal Process.
Basant Kumar Mohanty, Gaurav Singh, Ganapati Panda
2016 J jnl
A High-Performance FIR Filter Architecture for Fixed and Reconfigurable Applications.
IEEE Trans. Very Large Scale Integr. Syst.
Basant Kumar Mohanty, Pramod Kumar Meher
2016 J jnl
A high-performance VLSI architecture for reconfigurable FIR using distributed arithmetic.
Integr.
Basant Kumar Mohanty, Pramod Kumar Meher, Subodh Kumar Singhal, M. N. S. Swamy
2016 J jnl
Area-Delay and Energy-Efficient Throughput-Scalable VLSI Architecture for SDR Channelizer.
Circuits Syst. Signal Process.
Basant Kumar Mohanty, Subodh Kumar Singhal
2016 J jnl
Efficient Parallel Architecture for Fixed-Coefficient and Variable-Coefficient FIR Filters Using Distributed Arithmetic.
J. Circuits Syst. Comput.
Subodh Kumar Singhal, Basant Kumar Mohanty
2015 J jnl
Efficient VLSI Architecture for Decimation-in-Time Fast Fourier Transform of Real-Valued Data.
IEEE Trans. Circuits Syst. I Regul. Pap.
Pramod Kumar Meher, Basant Kumar Mohanty, Sujit Kumar Patel, Soumya Ganguly, Thambipillai Srikanthan
2015 J jnl
Efficient very large-scale integration architecture for variable length block least mean square adaptive filter.
IET Signal Process.
Basant Kumar Mohanty, Sujit Kumar Patel
2015 J jnl
FPGA Implementation of Orthogonal Matching Pursuit for Compressive Sensing Reconstruction.
IEEE Trans. Very Large Scale Integr. Syst.
Hassan Rabah, Abbes Amira, Basant Kumar Mohanty, Somaya Al-Máadeed, Pramod Kumar Meher
2015 Misc conf
Low-Area and Low-Power Reconfigurable Architecture for Convolution-Based 1-D DWT Using 9/7 and 5/3 Filters.
VLSID
Pramod Kumar Meher, Basant Kumar Mohanty, M. N. S. Swamy
2015 J jnl
Novel Block-Formulation and Area-Delay-Efficient Reconfigurable Interpolation Filter Architecture for Multi-Standard SDR Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Basant Kumar Mohanty
2014 J jnl
Area-Delay-Power Efficient Carry-Select Adder.
IEEE Trans. Circuits Syst. II Express Briefs
Basant Kumar Mohanty, Sujit Kumar Patel
2014 J jnl
Efficient Integer DCT Architectures for HEVC.
IEEE Trans. Circuits Syst. Video Technol.
Pramod Kumar Meher, Sang Yoon Park, Basant Kumar Mohanty, Khoon Seong Lim, Chuohao Yeo