Barry John Muldrey

21 papers A 4Misc 7Journal 3Unranked 6

Year	Rank	Type	Title / Venue / Authors
2023	J	`jnl`	BISCC: A Novel Approach to Built In State Consistency Checking For Quick Volume Validation of Mixed-Signal/RF Systems. J. Electron. Test. Sabyasachi Deyati, Barry John Muldrey, Abhijit Chatterjee
2023	J	`jnl`	Robust Chaos With Novel 4-Transistor Maps. IEEE Trans. Circuits Syst. II Express Briefs Maisha Sadia, Partha Sarathi Paul, Md Razuan Hossain, Barry John Muldrey, Md Sakib Hasan
2022	—	`conf`	Toward the creation of a novel electric bike rental program to ease university congestion. ACM Southeast Regional Conference Jacob Barnes, Barry John Muldrey, Charles Walter
2021	—	`conf`	Self-Parameterized Chaotic Map: A Hardware-efficient Scheme Providing Wide Chaotic Range. ICECS Partha Sarathi Paul, Anurag Dhungel, Maisha Sadia, Md Razuan Hossain, Barry John Muldrey, Md Sakib Hasan
2019	—	`—`	Algorithms for Post-silicon Validation and Debug of Radio-frequency, analog, and mixed-signal Circuits and Systems. Barry John Muldrey
2019	Misc	`conf`	Mixed Signal Design Validation Using Reinforcement Learning Guided Stimulus Generation for Behavior Discovery. VTS Barry John Muldrey, Suvadeep Banerjee, Abhijit Chatterjee
2017	A	`conf`	BISCC: Efficient pre through post silicon validation of mixed-signal/RF systems using built in state consistency checking. DATE Sabyasachi Deyati, Barry John Muldrey, Abhijit Chatterjee
2017	Misc	`conf`	Post-Silicon Validation: Automatic Characterization of RF Device Nonidealities via Iterative Learning Experiments on Hardware. VLSID Barry John Muldrey, Sabyasachi Deyati, Abhijit Chatterjee
2017	J	`jnl`	Self-Learning RF Receiver Systems: Process Aware Real-Time Adaptation to Channel Conditions for Low Power Operation. IEEE Trans. Circuits Syst. I Regul. Pap. Debashis Banerjee, Barry John Muldrey, Xian Wang, Shreyas Sen, Abhijit Chatterjee
2016	Misc	`conf`	Adaptive testing of analog/RF circuits using hardware extracted FSM models. VTS Sabyasachi Deyati, Barry John Muldrey, Abhijit Chatterjee
2016	—	`conf`	Concurrent Stimulus and Defect Magnitude Optimization for Detection of Weakest Shorts and Opens in Analog Circuits. ATS Barry John Muldrey, Sabyasachi Deyati, Abhijit Chatterjee
2016	A	`conf`	DE-LOC: Design validation and debugging under limited observation and control, pre- and post-silicon for mixed-signal systems. ITC Barry John Muldrey, Sabyasachi Deyati, Abhijit Chatterjee
2016	Misc	`conf`	TRAP: Test Generation Driven Classification of Analog/RF ICs Using Adaptive Probabilistic Clustering Algorithm. VLSID Sabyasachi Deyati, Barry John Muldrey, Abhijit Chatterjee
2016	—	`conf`	Trojan detection in digital systems using current sensing of pulse propagation in logic gates. ISQED Sabyasachi Deyati, Barry John Muldrey, Abhijit Chatterjee
2015	—	`conf`	Challenge Engineering and Design of Analog Push Pull Amplifier Based Physically Unclonable Function for Hardware Security. ATS Sabyasachi Deyati, Barry John Muldrey, Adit D. Singh, Abhijit Chatterjee
2014	Misc	`conf`	Atomic model learning: A machine learning paradigm for post silicon debug of RF/analog circuits. VTS Sabyasachi Deyati, Barry John Muldrey, Aritra Banerjee, Abhijit Chatterjee
2014	—	`conf`	High Resolution Pulse Propagation Driven Trojan Detection in Digital Logic: Optimization Algorithms and Infrastructure. ATS Sabyasachi Deyati, Barry John Muldrey, Adit D. Singh, Abhijit Chatterjee
2014	A	`conf`	Self-learning MIMO-RF receiver systems: process resilient real-time adaptation to channel conditions for low power operation. ICCAD Debashis Banerjee, Barry John Muldrey, Shreyas Sen, Xian Wang, Abhijit Chatterjee
2013	Misc	`conf`	RAVAGE: Post-silicon validation of mixed signal systems using genetic stimulus evolution and model tuning. VTS Barry John Muldrey, Sabyasachi Deyati, Michael Giardino, Abhijit Chatterjee
2013	Misc	`conf`	VAST: Post-Silicon VAlidation and Diagnosis of RF/Mixed-Signal Circuits Using Signature Tests. VLSI Design Sabyasachi Deyati, Aritra Banerjee, Barry John Muldrey, Abhijit Chatterjee
2012	A	`conf`	Validation signature testing: A methodology for post-silicon validation of analog/mixed-signal circuits. ICCAD Abhijit Chatterjee, Sabyasachi Deyati, Barry John Muldrey, Shyam Kumar Devarakond, Aritra Banerjee