Barry Daly

13 papers B 1Journal 5Unranked 7
YearRankTypeTitle / Venue / Authors
2015 J jnl
A 40 Gb/s Serial Link Transceiver in 28 nm CMOS Technology.
IEEE J. Solid State Circuits
Reza Navid, E-Hung Chen, Masum Hossain, Brian S. Leibowitz, Jihong Ren, Chuen-Huei Adam Chou, Barry Daly, Marko Aleksic, Bruce Su, Simon Li, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble
2014 — conf
A 40-Gb/s serial link transceiver in 28-nm CMOS technology.
VLSIC
E-Hung Chen, Masum Hossain, Brian S. Leibowitz, Reza Navid, Jihong Ren, Chuen-Huei Adam Chou, Barry Daly, Marko Aleksic, Bruce Su, Simon Li, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble
2014 — conf
A 4×40 Gb/s quad-lane CDR with shared frequency tracking and data dependent jitter filtering.
VLSIC
Masum Hossain, E-Hung Chen, Reza Navid, Brian S. Leibowitz, Chuen-Huei Adam Chou, Simon Li, Myeong-Jae Park, Jihong Ren, Barry Daly, Bruce Su, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble
2014 J jnl
A 6.4-Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems.
IEEE J. Solid State Circuits
Michael Bucher, Ravi T. Kollipara, Bruce Su, Liji Gopalakrishnan, Kashinath Prabhu, Pravin Kumar Venkatesan, Kambiz Kaviani, Barry Daly, William F. Stonecypher, Wayne D. Dettloff, Teva Stone, Fred Heaton, Yi Lu, Chris J. Madden, Sanath Bangalore, John C. Eble, Nhat Nguyen, Lei Luo
2014 J jnl
A Fast-Lock, Jitter Filtering All-Digital DLL Based Burst-Mode Memory Interface.
IEEE J. Solid State Circuits
Masum Hossain, Farrukh Aquil, Pak Shing Chau, Brian Tsang, Phuong Le, Jason Wei, Teva Stone, Barry Daly, Chanh Tran, John C. Eble, Kurt Knorpp, Jared Zerbe
2013 — conf
A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems.
ISSCC
Kambiz Kaviani, Michael Bucher, Bruce Su, Barry Daly, Bill Stonecypher, Wayne D. Dettloff, Teva Stone, Kashinath Prabhu, Pravin Kumar Venkatesan, Fred Heaton, Ravi T. Kollipara, Yi Lu, Chris J. Madden, John C. Eble, Lei Luo, Nhat Nguyen
2012 — conf
A 2.3-4GHz injection-locked clock multiplier with 55.7% lock range and 10-ns power-on.
CICC
Dustin Dunwell, Anthony Chan Carusone, Jared Zerbe, Brian S. Leibowitz, Barry Daly, John C. Eble
2012 — conf
A 6.4/3.2/1.6 Gb/s low power interface with all digital clock multiplier for on-the-fly rate switching.
CICC
Masum Hossain, Kambiz Kaviani, Barry Daly, Makarand Shirasgaonkar, Wayne D. Dettloff, Teva Stone, Kashinath Prabhu, Brian Tsang, John C. Eble, Jared Zerbe
2011 J jnl
A 5 Gb/s Link With Matched Source Synchronous and Common-Mode Clocking Techniques.
IEEE J. Solid State Circuits
Jared Zerbe, Barry Daly, Lei Luo, Bill Stonecypher, Wayne D. Dettloff, John C. Eble, Teva Stone, Jihong Ren, Brian S. Leibowitz, Michael Bucher, Patrick Satarzadeh, Qi Lin, Yue Lu, Ravi T. Kollipara
2010 — conf
A 32mW 7.4Gb/s protocol-agile source-series-terminated transmitter in 45nm CMOS SOI.
ISSCC
Wayne D. Dettloff, John C. Eble, Lei Luo, Pravin Kumar Venkatesan, Fred Heaton, Teva Stone, Barry Daly
2007 — conf
A 7.5Gb/s 10-Tap DFE Receiver with First Tap Partial Response, Spectrally Gated Adaptation, and 2nd-Order Data-Filtered CDR.
ISSCC
Brian S. Leibowitz, Jade Kizer, Haechang Lee, Fred Chen, Andrew Ho, Metha Jeeradit, Akash Bansal, Trey Greer, Simon Li, Ramin Farjad-Rad, William F. Stonecypher, Yohan Frans, Barry Daly, Fred Heaton, Bruno W. Garlepp, Carl W. Werner, Nhat Nguyen, Vladimir Stojanovic, Jared Zerbe
2006 B conf
Elastic registration using 3D ChainMail: application to virtual colonoscopy.
Image Processing
Carlos R. Castro-Pareja, Barry Daly, Raj Shekhar
2006 J jnl
Use of a Thin-Section Archive and Enterprise 3D Software for Long-Term Storage of Thin-Slice CT Data Sets.
J. Digit. Imaging
Christopher Meenan, Barry Daly, Christopher Toland, Paul G. Nagy