Bardia Nadimi

14 papers A* 1Journal 11Unranked 2
YearRankTypeTitle / Venue / Authors
2025 — conf
AutoFlows: Inferring Message Flows from System Communication Traces.
ISQED
Bardia Nadimi, Hao Zheng
2025 A* conf
PyraNet: A Multi-Layered Hierarchical Dataset for Verilog.
DAC
Bardia Nadimi, Ghali Omar Boutaib, Hao Zheng
2025 J jnl
TB or Not TB: Coverage-Driven Direct Preference Optimization for Verilog Stimulus Generation.
CoRR
Bardia Nadimi, Khashayar Filom, Deming Chen, Hao Zheng
2025 J jnl
VeriMind: Agentic LLM for Automated Verilog Generation with a Novel Evaluation Metric.
CoRR
Bardia Nadimi, Ghali Omar Boutaib, Hao Zheng
2024 J jnl
A Multi-Expert Large Language Model Architecture for Verilog Code Generation.
CoRR
Bardia Nadimi, Hao Zheng
2024 J jnl
AutoModel: Automatic Synthesis of Models From Communication Traces of SoC Designs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Md Rubel Ahmed, Bardia Nadimi, Hao Zheng
2024 J jnl
Forward and Reverse Converters for the Moduli-Set {2
CoRR
Ghassem Jaberipur, Bardia Nadimi, R. Kazemi, Jeong-A Lee
2024 J jnl
Inferring Message Flows From System Communication Traces.
CoRR
Bardia Nadimi, Hao Zheng
2024 J jnl
Modulo-(2
CoRR
Ghassem Jaberipur, Bardia Nadimi, Jeong-A Lee
2024 J jnl
PyraNet: A Large Scale Hierarchical Verilog Dataset.
CoRR
Bardia Nadimi, Ghali Omar Boutaib, Hao Zheng
2023 J jnl
AutoModel: Automatic Synthesis of Models from Communication Traces of SoC Designs.
CoRR
Md Rubel Ahmed, Bardia Nadimi, Hao Zheng
2023 — conf
System-on-Chip Message Flow Mining with Masked-Language Models.
MWSCAS
Md Rubel Ahmed, Bardia Nadimi, Hao Zheng
2022 J jnl
Mining SoC Message Flows with Attention Model.
CoRR
Md Rubel Ahmed, Bardia Nadimi, Hao Zheng
2020 J jnl
Balanced $(3+2\log n)\Delta G$ Adders for Moduli Set $\{{2}^{n+1}, 2^{n}+2^{n-1}-1, 2^{n+1}-1\}$.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl.
Ghassem Jaberipur, Bardia Nadimi