Bapiraju Vinnakota

60 papers A* 6A 8C 4Misc 11Journal 18Unranked 13

Year	Rank	Type	Title / Venue / Authors
2022	—	`conf`	SCIP to the Next Generation of Computing: Extending More than Moore with Silicon Photonics Chiplets in Package (SCIP). ISQED Vivek Raghunathan, Karl Muth, Bapiraju Vinnakota, Prasad Venugopal, Rebecca Schaevitz, Manish Mehta
2021	J	`jnl`	An Open Inter-Chiplet Communication Link: Bunch of Wires (BoW). IEEE Micro Shahab Ardalan, Ramin Farjadrad, Mark Kuemerle, Ken Poulton, Suresh Subramaniam, Bapiraju Vinnakota
2021	J	`jnl`	The Open Domain-Specific Architecture. IEEE Micro Bapiraju Vinnakota, Ishwar Agarwal, Kevin Drucker, Dharmesh Jani, Gary Miller, Millind Mittal, Robert Wang
2021	—	`conf`	The Open Domain-Specific Architecture: Next Steps to Production. NANOCOM Bapiraju Vinnakota
2020	—	`conf`	Bunch of Wires: An Open Die-to-Die Interface. Hot Interconnects Shahab Ardalan, Halil Cirit, Ramin Farjad-Rad, Mark Kuemerle, Ken Poulton, Suresh Subramanian, Bapiraju Vinnakota
2020	—	`conf`	The Open Domain-Specific Architecture. Hot Interconnects Kevin Drucker, Dharmesh Jani, Ishwar Agarwal, Gary Miller, Millind Mittal, Robert Wang, Bapiraju Vinnakota
2019	—	`conf`	A Bunch of Wires (BoW) Interface for Inter-Chiplet Communication. Hot Interconnects Ramin Farjadrad, Bapiraju Vinnakota
2019	—	`conf`	High Capacity On-Package Physical Link Considerations. Hot Interconnects Greg Taylor, Ramin Farjadrad, Bapiraju Vinnakota
2004	—	`conf`	A digital DFT technique for verifying the static performance of A/D converters. CICC Wooyoung Choi, Bapiraju Vinnakota, Ramesh Harjani
2004	A*	`conf`	Combining dictionary coding and LFSR reseeding for test data compression. DAC Xiaoyun Sun, Larry L. Kinney, Bapiraju Vinnakota
2003	Misc	`conf`	Development of Energy Consumption Ratio Test. VTS Xiaoyun Sun, Larry L. Kinney, Bapiraju Vinnakota
2003	A	`conf`	Test Vector Generation Based on Correlation Model for Ratio-Iddq. ITC Xiaoyun Sun, Larry L. Kinney, Bapiraju Vinnakota
2002	J	`jnl`	Statistical threshold formulation for dynamic I IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Wanli Jiang, Bapiraju Vinnakota
2001	A	`conf`	Crosstalk Fault Detection by Dynamic Idd. ICCAD Xiaoyun Sun, Seonki Kim, Bapiraju Vinnakota
2001	Misc	`conf`	Current Measurement for Dynamic Idd Test. VTS Xiaoyun Sun, Bapiraju Vinnakota
2001	J	`jnl`	Defect-oriented test scheduling. IEEE Trans. Very Large Scale Integr. Syst. Wanli Jiang, Bapiraju Vinnakota
2001	C	`conf`	High Performance Parallel Fault Simulation. ICCD Amit K. Varshney, Bapiraju Vinnakota, Eric Skuldt, Brion L. Keller
2001	—	`conf`	Non-ideal amplifier effects on the accuracy of analog-to-digital capacitor ratio converter. ISCAS (1) Wooyoung Choi, Ramesh Harjani, Bapiraju Vinnakota
2000	A	`conf`	An analysis of the delay defect detection capability of the ECR test method. ITC Seonki Kim, Sreejit Chakravarty, Bapiraju Vinnakota
2000	Misc	`conf`	Biomedical ICs: What is Different about Testing those ICs? VTS Bapiraju Vinnakota, André Ivanov
2000	J	`jnl`	DFT for digital detection of analog parametric faults in SC filters. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Bapiraju Vinnakota, Ramesh Harjani
2000	A	`conf`	Fast Test Application Technique Without Fast Scan Clocks. ICCAD Seonki Kim, Bapiraju Vinnakota
2000	J	`jnl`	IC test using the energy consumption ratio. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Wanli Jiang, Bapiraju Vinnakota
2000	—	`conf`	Optimal test-set generation for parametric fault detection in switched capacitor filters. Asian Test Symposium Wooyoung Choi, Ramesh Harjani, Bapiraju Vinnakota
1999	J	`jnl`	Data parallel fault simulation. IEEE Trans. Very Large Scale Integr. Syst. Minesh B. Amin, Bapiraju Vinnakota
1999	A	`conf`	Deep submicron defect detection with the energy consumption ratio. ICCAD Bapiraju Vinnakota
1999	Misc	`conf`	Defect-Oriented Test Scheduling. VTS Wanli Jiang, Bapiraju Vinnakota
1999	A*	`conf`	Digital Aetection of Analog Parametric Faults in SC Filters. DAC Ramesh Harjani, Bapiraju Vinnakota
1999	—	`conf`	Digital detection of parametric faults in data converters. CICC Bapiraju Vinnakota, Ramesh Harjani
1999	A*	`conf`	IC Test Using the Energy Consumption Ratio. DAC Wanli Jiang, Bapiraju Vinnakota
1999	A	`conf`	Statistical threshold formulation for dynamic I_dd test. ITC Wanli Jiang, Bapiraju Vinnakota
1998	A*	`conf`	Fast State Verification. DAC Dechang Sun, Bapiraju Vinnakota, Wanli Jiang
1998	J	`jnl`	Fast fault translation. IEEE Trans. Very Large Scale Integr. Syst. Bapiraju Vinnakota, Jason Andrews
1998	A	`conf`	Process-tolerant test with energy consumption ratio. ITC Bapiraju Vinnakota, Wanli Jiang, Dechang Sun
1997	J	`jnl`	Monitoring Power Dissipation for Fault Detection. J. Electron. Test. Bapiraju Vinnakota
1997	Misc	`conf`	Pseudoduplication - An ACOB Technique for Single-Ended Circuits. VLSI Design Bapiraju Vinnakota, Ramesh Harjani, Wooyoung Choi
1997	J	`jnl`	Workload Distribution in Fault Simulation. J. Electron. Test. Minesh B. Amin, Bapiraju Vinnakota
1996	Misc	`conf`	Mixed-Signal Design for Test. VLSI Design Bapiraju Vinnakota, Ramesh Harjani
1996	Misc	`conf`	Monitoring power dissipation for fault detection. VTS Bapiraju Vinnakota
1996	J	`jnl`	System-level design for test of fully differential analog circuits. IEEE J. Solid State Circuits Nicholas J. Stessman, Bapiraju Vinnakota, Ramesh Harjani
1996	Misc	`conf`	ZAMBEZI: a parallel pattern parallel fault sequential circuit fault simulator. VTS Minesh B. Amin, Bapiraju Vinnakota
1996	A	`conf`	Zamlog: a parallel algorithm for fault simulation based on Zambezi. ICCAD Minesh B. Amin, Bapiraju Vinnakota
1995	C	`conf`	Data parallel fault simulation. ICCD Minesh B. Amin, Bapiraju Vinnakota
1995	J	`jnl`	Implementing Multiplication with Split Read-Only Memory. IEEE Trans. Computers Bapiraju Vinnakota
1995	Misc	`conf`	Reducing test application time in scan design schemes. VTS Bapiraju Vinnakota, Nicholas J. Stessman
1995	A*	`conf`	System-Level Design for Test of Fully Differential Analog Circuits. DAC Bapiraju Vinnakota, Ramesh Harjani, Nicholas J. Stessman
1994	J	`jnl`	A C-testable carry-free divider. IEEE Trans. Very Large Scale Integr. Syst. Hosahalli R. Srinivas, Bapiraju Vinnakota, Keshab K. Parhi
1994	Misc	`conf`	Analog circuit observer blocks. VTS Ramesh Harjani, Bapiraju Vinnakota
1994	J	`jnl`	Design of Algorithm-Based Fault-Tolerant Multiprocessor Systems for Concurrent Error Detection and Fault Diagnosis. IEEE Trans. Parallel Distributed Syst. Bapiraju Vinnakota, Niraj K. Jha
1994	J	`jnl`	Enumeration of Binary Trees. Inf. Process. Lett. Bapiraju Vinnakota, V. V. Bapeswara Rao
1994	A*	`conf`	Functional Test Generation for FSMs by Fault Extraction. DAC Bapiraju Vinnakota, Jason Andrews
1994	J	`jnl`	Generation of All Reed-Muller Expansions of a Switching Function. IEEE Trans. Computers Bapiraju Vinnakota, V. V. Bapeswara Rao
1994	Misc	`conf`	The Design of Analog Self-Checking Circuits. VLSI Design Bapiraju Vinnakota, Ramesh Harjani
1993	C	`conf`	A C-Testable Carry-Free Divider. ICCD Hosahalli R. Srinivas, Bapiraju Vinnakota, Keshab K. Parhi
1993	J	`jnl`	Diagnosability and Diagnosis of Algorithm-Based Fault-Tolerant Systems. IEEE Trans. Computers Bapiraju Vinnakota, Niraj K. Jha
1993	J	`jnl`	Synthesis of Algorithm-Based Fault-Tolerant Systems from Dependence Graphs. IEEE Trans. Parallel Distributed Syst. Bapiraju Vinnakota, Niraj K. Jha
1992	C	`conf`	Repair of RAMs With Clustered Faults. ICCD Bapiraju Vinnakota, Jason Andrews
1991	—	`conf`	Design of Multiprocessor Systems for Concurrent Error Detection and Fault Diagnosis. FTCS Bapiraju Vinnakota, Niraj K. Jha
1991	—	`conf`	MACHETE: synthesis of sequential machines for easy testability. EURO-DAC Bapiraju Vinnakota, Niraj K. Jha
1990	—	`conf`	A dependence graph-based approach to the design of algorithm-based fault tolerant systems. FTCS Bapiraju Vinnakota, Niraj K. Jha