Bang-Sup Song - RankMe

52 papers C 2Journal 38Unranked 11

Year	Rank	Type	Title / Venue / Authors
2014	J	`jnl`	A 14b 60 MS/s Pipelined ADC Adaptively Cancelling Opamp Gain and Nonlinearity. IEEE J. Solid State Circuits Yuichi Miyahara, Mitsuhiro Sano, Kazuo Koyama, Toshikazu Suzuki, Koichi Hamashita, Bang-Sup Song
2013	—	`conf`	Adaptive cancellation of gain and nonlinearity errors in pipelined ADCs. ISSCC Yuichi Miyahara, Mitsuhiro Sano, Kazuo Koyama, Toshikazu Suzuki, Koichi Hamashita, Bang-Sup Song
2010	J	`jnl`	LMS-Based Noise Leakage Calibration of Cascaded Continuous-Time Delta Sigma Modulators. IEEE J. Solid State Circuits Yun-Shiang Shu, Junpei Kamiishi, Koji Tomioka, Koichi Hamashita, Bang-Sup Song
2009	J	`jnl`	A 10∼15-bit 60-MS/s Floating-Point ADC With Digital Gain and Offset Calibration. IEEE J. Solid State Circuits Yun-Shiang Shu, Moon-Jung Kyung, Wei-Ming Lee, Bang-Sup Song, Bedabrata Pain
2009	J	`jnl`	A Fifth-Order G IEEE J. Solid State Circuits Yusuke Aiba, Koji Tomioka, Yuta Nakashima, Koichi Hamashita, Bang-Sup Song
2009	—	`conf`	A self-calibrated 2-1-1 cascaded continuous-time ΔΣ modulator. CICC Junpei Kamiishi, Yun-Shiang Shu, Koji Tomioka, Koichi Hamashita, Bang-Sup Song
2008	—	`conf`	A 10∼15b 60MS/s floating-point ADC with digital gain and offset calibration. CICC Yun-Shiang Shu, Moon-Jung Kyung, Wei-Ming Lee, Bang-Sup Song, Bedabrata Pain
2008	J	`jnl`	A 15-bit Linear 20-MS/s Pipelined ADC Digitally Calibrated With Signal-Dependent Dithering. IEEE J. Solid State Circuits Yun-Shiang Shu, Bang-Sup Song
2008	J	`jnl`	A 48-860 MHz CMOS Low-IF Direct-Conversion DTV Tuner. IEEE J. Solid State Circuits Supisa Lerstaveesin, Manoj Gupta, David Kang, Bang-Sup Song
2008	—	`conf`	A 65nm CMOS CT ΔΣ Modulator with 81dB DR and 8MHz BW Auto-Tuned by Pulse Injection. ISSCC Yun-Shiang Shu, Bang-Sup Song, Kantilal Bacrania
2007	J	`jnl`	A 10-bit 50-MS/s Pipelined ADC With Opamp Current Reuse. IEEE J. Solid State Circuits Seung-Tak Ryu, Bang-Sup Song, Kantilal Bacrania
2007	J	`jnl`	A 13-b Linear, 40-MS/s Pipelined ADC With Self-Configured Capacitor Matching. IEEE J. Solid State Circuits Sourja Ray, Bang-Sup Song
2007	—	`conf`	A 48-to-860MHz CMOS Direct-Conversion TV Tuner. ISSCC Manoj Gupta, Supisa Lerstaveesin, David Kang, Bang-Sup Song
2006	J	`jnl`	A 1.8-GHz Spur-Cancelled Fractional-N Frequency Synthesizer With LMS-Based DAC Gain Calibration. IEEE J. Solid State Circuits Manoj Gupta, Bang-Sup Song
2006	—	`conf`	A 1.8GHz Spur-Cancelled Fractional-N Frequency Synthesizer with LMS-Based DAC Gain Calibration. ISSCC Manoj Gupta, Bang-Sup Song
2006	—	`conf`	A 10b 50MS/s pipelined ADC with opamp current reuse. ISSCC Seung-Tak Ryu, Bang-Sup Song, Kantilal Bacrania
2006	—	`conf`	A 13b linear 40MS/s pipelined ADC with self-configured capacitor matching. ISSCC Sourja Ray, Bang-Sup Song
2006	J	`jnl`	A CMOS 1×-16× speed DVD write channel IC. IEEE J. Solid State Circuits Yoshiaki Konno, Koji Tomioka, Yusuke Aiba, Katsuhiko Yamazoe, Bang-Sup Song
2006	J	`jnl`	A Complex Image Rejection Circuit With Sign Detection Only. IEEE J. Solid State Circuits Supisa Lerstaveesin, Bang-Sup Song
2006	—	`conf`	A complex image rejection circuit with sign detection only. ISSCC Supisa Lerstaveesin, Bang-Sup Song
2005	J	`jnl`	A CMOS TV tuner/demodulator IC with digital image rejection. IEEE J. Solid State Circuits Chun-Huat Heng, Manoj Gupta, Sang-Hoon Lee, David Kang, Bang-Sup Song
2004	J	`jnl`	A 14-b linear capacitor self-trimming pipelined ADC. IEEE J. Solid State Circuits Seung-Tak Ryu, Sourja Ray, Bang-Sup Song, Gyu-Hyeong Cho, Kantilal Bacrania
2004	J	`jnl`	A 2.4-GHz dual-mode 0.18-μm CMOS transceiver for Bluetooth and 802.11b. IEEE J. Solid State Circuits Thomas Byunghak Cho, David Kang, Chun-Huat Heng, Bang-Sup Song
2003	J	`jnl`	A 1.8-GHz CMOS fractional-N frequency synthesizer with randomized multiphase VCO. IEEE J. Solid State Circuits Chun-Huat Heng, Bang-Sup Song
2003	J	`jnl`	Comments on "A carry-free 54 b×54 b multiplier using equivalent bit conversion algorithm". IEEE J. Solid State Circuits Milos D. Ercegovac, Tomás Lang, Y. Kim, Bang-Sup Song, John Grosspietsch, Steven F. Gillig
2003	J	`jnl`	Correction to "A carry-free 54 b x 54 b multiplier using equivalent bit conversion algorithm". IEEE J. Solid State Circuits Yun Kim, Bang-Sup Song, John Grosspietsch, Steven F. Gillig
2002	—	`conf`	A 1.8 GHz CMOS fractional-N frequency synthesizer with randomized multi-phase VCO. CICC Chun-Huat Heng, Bang-Sup Song
2002	—	`conf`	A 2 MHz GFSK IQ receiver for Bluetooth with DC-tolerant bit slicer. CICC Bang-Sup Song, Thomas Cho, David Kang, Scott Dow
2001	J	`jnl`	A 14-b 20-Msamples/s CMOS pipelined ADC. IEEE J. Solid State Circuits Hsin-Shu Chen, Bang-Sup Song, Kantilal Bacrania
2001	J	`jnl`	A carry-free 54b×54b multiplier using equivalent bit conversion algorithm. IEEE J. Solid State Circuits Yun Kim, Bang-Sup Song, John Grosspietsch, Steven F. Gillig
2001	J	`jnl`	An 8-b 100-MSample/s CMOS pipelined folding ADC. IEEE J. Solid State Circuits Myung-Jun Choe, Bang-Sup Song, Kantilal Bacrania
2000	J	`jnl`	A 1-V 6-b 50-MSamples/s current-interpolating CMOS ADC. IEEE J. Solid State Circuits Bang-Sup Song, Patrick L. Rakers, Steven F. Gillig
2000	J	`jnl`	A 1.1-GHz CMOS fractional-N frequency synthesizer with a 3-b third-order ΔΣ modulator. IEEE J. Solid State Circuits Woogeun Rhee, Bang-Sup Song, Akbar Ali
2000	J	`jnl`	A 13-b 40-MSamples/s CMOS pipelined folding ADC with background offset trimming. IEEE J. Solid State Circuits Myung-Jun Choe, Bang-Sup Song, Kantilal Bacrania
2000	J	`jnl`	A self-trimming 14-b 100-MS/s CMOS DAC. IEEE J. Solid State Circuits Alex R. Bugeja, Bang-Sup Song
1999	J	`jnl`	A 14-b, 100-MS/s CMOS DAC designed for spectral performance. IEEE J. Solid State Circuits Alex R. Bugeja, Bang-Sup Song, Patrick L. Rakers, Steven F. Gillig
1999	J	`jnl`	A 5-MHz IF digital FM demodulator. IEEE J. Solid State Circuits Jaejin Park, Eurho Joe, Myung-Jun Choe, Bang-Sup Song
1999	—	`ch.`	Nyquist-Rate ADC and DAC. The VLSI Handbook Bang-Sup Song
1998	J	`jnl`	A 200-MHz complex number multiplier using redundant binary arithmetic. IEEE J. Solid State Circuits Kyung-Wook Shin, Bang-Sup Song, Kantilal Bacrania
1998	J	`jnl`	A CMOS 4× speed DVD read channel IC. IEEE J. Solid State Circuits Chun-Sup Kim, Geo-Ok Cho, Yong-Hwan Kim, Bang-Sup Song
1997	J	`jnl`	A 15-b, 5-Msample/s low-spurious CMOS ADC. IEEE J. Solid State Circuits Sung-Ung Kwak, Bang-Sup Song, Kantilal Bacrania
1997	J	`jnl`	NRZ timing recovery technique for band-limited channels. IEEE J. Solid State Circuits Bang-Sup Song, David C. Soo
1995	J	`jnl`	A 10-b 20-Msample/s low-power CMOS ADC. IEEE J. Solid State Circuits Won-Chul Song, Hae-Wook Choi, Sung-Ung Kwak, Bang-Sup Song
1995	J	`jnl`	A 13-b 10-Msample/s ADC digitally calibrated with oversampling delta-sigma converter. IEEE J. Solid State Circuits Tzi-Hsiung Shu, Bang-Sup Song, Kantilal Bacrania
1995	J	`jnl`	A fourth-order bandpass delta-sigma modulator with reduced numbers of op amps. IEEE J. Solid State Circuits Bang-Sup Song
1993	J	`jnl`	Design of a low-distortion 22-kHz fifth-order Bessel filter. IEEE J. Solid State Circuits Un-Ku Moon, Bang-Sup Song
1993	C	`conf`	Low-distortion Continuous-time R-MOSFET-C Filters. ISCAS Un-Ku Moon, Bang-Sup Song
1993	C	`conf`	Simplified Digital Calibration for Multi-stage Analog-to-digital Converters. ISCAS Seung-Hoon Lee, Bang-Sup Song
1992	J	`jnl`	Digital-domain calibration of multistep analog-to-digital converters. IEEE J. Solid State Circuits Seung-Hoon Lee, Bang-Sup Song
1990	J	`jnl`	A 10-b 15-MHz CMOS recycling two-step A/D converter. IEEE J. Solid State Circuits Bang-Sup Song, Seung-Hoon Lee, Michael F. Tompsett
1989	J	`jnl`	A 10.7-MHz switched-capacitor bandpass filter. IEEE J. Solid State Circuits Bang-Sup Song
1988	J	`jnl`	A 12-bit 1-Msample/s capacitor error-averaging pipelined A/D converter. IEEE J. Solid State Circuits Bang-Sup Song, Michael F. Tompsett, Kadaba R. Lakshmikumar