Balaji Narasimham

14 papers Unranked 14

Year	Rank	Type	Title / Venue / Authors
2024	—	`conf`	Scaling Trends and Bias Dependence of SRAM SER from 16-nm to 3-nm FinFET. IRPS Balaji Narasimham, A-R. Montoya, C. Paone, T. Riehle, Mike Smith, Liming Tsau, Dennis R. Ball, Bharat L. Bhuva
2023	—	`conf`	Scaling Trends and the Effect of Process Variations on the Soft Error Rate of advanced FinFET SRAMs. IRPS Balaji Narasimham, H. Luk, C. Paone, A-R. Montoya, T. Riehle, Mike Smith, Liming Tsau
2022	—	`conf`	Soft Error Characterization of D-FFs at the 5-nm Bulk FinFET Technology for the Terrestrial Environment. IRPS Yoni Xiong, Alexandra Feeley, Nicholas J. Pieper, Dennis R. Ball, Balaji Narasimham, John Brockman, N. A. Dodds, S. A. Wender, Shi-Jie Wen, Rita Fung, Bharat L. Bhuva
2021	—	`conf`	Effects of Temperature and Supply Voltage on Soft Errors for 7-nm Bulk FinFET Technology. IRPS Alexandra Feeley, Yoni Xiong, Bharat L. Bhuva, Balaji Narasimham, Shi-Ji Wen, Rita Fung
2021	—	`conf`	Scaling Trends in the Soft Error Rate of SRAMs from Planar to 5-nm FinFET. IRPS Balaji Narasimham, Vikas Chaudhary, Mike Smith, Liming Tsau, Dennis R. Ball, Bharat L. Bhuva
2020	—	`conf`	Temperature Dependence of Single-Event Transient Pulse Widths for 7-nm Bulk FinFET Technology. IRPS Jingchen Cao, Lyuan Xu, Shi-Jie Wen, Rita Fung, Balaji Narasimham, Lloyd W. Massengill, Bharat L. Bhuva
2019	—	`conf`	Alpha Particle Soft-Error Rates for D-FF Designs in 16-Nm and 7-Nm Bulk FinFET Technologies. IRPS Jingchen Cao, Lyuan Xu, Bharat L. Bhuva, Shi-Jie Wen, Richard Wong, Balaji Narasimham, Lloyd W. Massengill
2019	—	`conf`	Soft Error Performance of High-Speed Pulsed-DICE-Latch Design in 16 nm and 7 nm FinFET Processes. IRPS Balaji Narasimham, K. Chandrasekharan, J. K. Wang, Bharat L. Bhuva
2018	—	`conf`	Designing soft-error-aware circuits with power and speed optimization. IRPS H. Jiang, H. Zhang, Balaji Narasimham, Lloyd W. Massengill, Bharat L. Bhuva
2018	—	`conf`	Evaluation of the system-level SER performance of gigabit ethernet transceiver devices. IRPS Balaji Narasimham, Tim Wu, Jung K. Wang, Bruce Conway
2018	—	`conf`	Evaluation on flip-flop physical unclonable functions in a 14/16-nm bulk FinFET technology. IRPS H. Zhang, H. Jiang, M. R. Eaker, Kurt J. Lezon, Balaji Narasimham, Nihaar N. Mahatme, Lloyd W. Massengill, Bharat L. Bhuva
2018	—	`conf`	Scaling trends and bias dependence of the soft error rate of 16 nm and 7 nm FinFET SRAMs. IRPS Balaji Narasimham, Saket Gupta, Daniel S. Reed, J. K. Wang, Nick Hendrickson, Hasan Taufique
2015	—	`conf`	Influence of supply voltage on the multi-cell upset soft error sensitivity of dual- and triple-well 28 nm CMOS SRAMs. IRPS Balaji Narasimham, Jung K. Wang, Narayana Vedula, Saket Gupta, Brandon Bartz, Carl Monzel, Indranil Chatterjee, Bharat L. Bhuva, Ronald D. Schrimpf, Robert A. Reed
2015	—	`conf`	Terrestrial SER characterization for nanoscale technologies: A comparative study. IRPS Nihaar N. Mahatme, Bharat L. Bhuva, Nelson J. Gaspard, T. Assis, Y. Xu, P. Marcoux, M. Vilchis, Balaji Narasimham, A. Shih, Shi-Jie Wen, Rick Wong, N. Tam, M. Shroff, S. Koyoma, A. Oates