Babita Jajodia

14 papers C 1Journal 6Unranked 7
YearRankTypeTitle / Venue / Authors
2026 J jnl
Division-Free Four-Way Toom-Cook Polynomial Multiplication Architecture for Large Integer Arithmetic on FPGAs and ASICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Monalisa Das, Babita Jajodia
2025 J jnl
ATP-Optimized Implementation of Four-Way Toom-Cook Multiplications on FPGAs for Large Integer Arithmetic.
Circuits Syst. Signal Process.
Monalisa Das, Babita Jajodia
2025 J jnl
Area and Delay Trade-Offs in Three-Way Toom-Cook Large Integer Multipliers Implemented on FPGAs.
IEEE Trans. Circuits Syst. I Regul. Pap.
Monalisa Das, Babita Jajodia
2025 J jnl
Hybrid Recursive Karatsuba Multiplications on FPGAs.
IEEE Embed. Syst. Lett.
Monalisa Das, Babita Jajodia
2022 C conf
ART-MAC: Approximate Rounding and Truncation based MAC Unit for Fault-Tolerant Applications.
ISCAS
Vishesh Mishra, Divy Pandey, Saurabh Singh, Sagar Satapathy, Kaustav Goswami, Babita Jajodia, Dip Sankar Banerjee
2022 — conf
EFCSA: An Efficient Carry Speculative Approximate Adder with Rectification.
ISQED
Saurabh Singh, Vishesh Mishra, Sagar Satapathy, Divy Pandey, Kaustav Goswami, Dip Sankar Banerjee, Babita Jajodia
2022 — conf
FPGA Implementation of Hybrid Karatsuba Multiplications for NIST Post-Quantum Cryptographic Hardware Primitives.
ISOCC
Monalisa Das, Babita Jajodia
2022 — conf
HPAM: An 8-bit High-Performance Approximate Multiplier Design for Error Resilient Applications.
ISQED
Divy Pandey, Vishesh Mishra, Saurabh Singh, Sagar Satapathy, Babita Jajodia, Dip Sankar Banerjee
2022 — conf
Hardware Design of Optimized Large Integer Schoolbook Polynomial Multiplications on FPGA.
ISOCC
Monalisa Das, Babita Jajodia
2022 — conf
Optimized Hardware Implementation of Vedic Binary Multiplier using Nikhilam Sutra on FPGA.
LASCAS
Palak Yash, Mansi Thakare, Babita Jajodia
2021 — conf
Efficient Hardware Implementation of Cube Architecture using Yavadunam Sutra on FPGA.
MWSCAS
Mansi Thakare, Palak Yash, Debaleena Chakraborty, Babita Jajodia
2021 J jnl
Towards an Optimal Hybrid Algorithm for EV Charging Stations Placement using Quantum Annealing and Genetic Algorithms.
CoRR
Aman Chandra, Jitesh Lalwani, Babita Jajodia
2018 J jnl
Mixed-signal demodulator for IEEE 802.15.6 IR-UWB WBAN energy detection-based receiver.
IET Circuits Devices Syst.
Babita Jajodia, Anil Mahanta, Shaik Rafi Ahamed
2014 — conf
A Six-Segment SRRC Pulse Generator for IEEE 802.15.6 WBAN Standard.
BODYNETS
Shaik Rafi Ahamed, Babita Jajodia, Anil Mahanta