B. Yamuna - RankMe

12 papers C 1Misc 1Journal 7Unranked 3

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Scalable FPGA Implementation of a Reliability-Based Direct Turbo Decoder for Short Block Codes. IEEE Access Senthil Murugan, Ramesh Bhakthavatchalu, Karthi Balasubramanian, B. Yamuna, Deepak Mishra, Sree Ranjani Rajendran
2022	J	`jnl`	A Generic Reliability Based Direct Decoding Algorithm for Turbo Codes. Wirel. Pers. Commun. Salija P, B. Yamuna, T. R. Padmanabhan, Deepak Mishra
2020	J	`jnl`	A Viterbi decoder and its hardware Trojan models: an FPGA-based implementation study. PeerJ Comput. Sci. Varsha Kakkara, Karthi Balasubramanian, B. Yamuna, Deepak Mishra, Karthikeyan Lingasubramanian, Senthil Murugan
2020	J	`jnl`	A novel reliability-based high performance decoding algorithm for short block length turbo codes. Int. J. Ad Hoc Ubiquitous Comput. Salija P, B. Yamuna, T. R. Padmanabhan, Deepak Mishra
2019	Misc	`conf`	Effect of sign-bit-flipping trojan on turbo coded communication systems. ICDCN Karthi Balasubramanian, B. Yamuna, Salija P, Karthikeyan Lingasubramanian, Deepak Mishra
2018	C	`conf`	Effect of hardware Trojans on the performance of a coded communication system. ICCE A. R. Aravind, S. R. Kesavaraman, Karthi Balasubramanian, B. Yamuna, Karthikeyan Lingasubramanian
2018	—	`conf`	FPGA Implementation of an Efficient High Speed Max-log-MAP Decoder. ICACCI Aishwarya Ambat, Karthi Balasubramanian, B. Yamuna, Deepak Mishra
2018	—	`conf`	Low Power and Area Efficient Max-log -MAP Decoder. ICACCI Kalpana Eluri, B. Yamuna, Karthi Balasubramanian, Deepak Mishra
2017	—	`conf`	A low complex turbo decoding algorithm with early iteration termination. ICACCI C. R. Seethal, B. Yamuna
2016	J	`jnl`	Reliability level list-based decoding of multilevel modulated block codes. Int. J. Inf. Commun. Technol. B. Yamuna, T. R. Padmanabhan
2014	J	`jnl`	A minimal search soft decision list decoding algorithm for Reed-Solomon codes. Int. J. Inf. Commun. Technol. B. Yamuna, T. R. Padmanabhan
2012	J	`jnl`	A Reliability Level List based SDD Algorithm for Binary Cyclic Block Codes. Int. J. Comput. Commun. Control B. Yamuna, T. R. Padmanabhan

Kai Greshake, Sahar Abdelnabi, Shailesh Mishra, Christoph Endres, Thorsten Holz, Mario Fritz