Aydin Aysu - RankMe

117 papers A* 4A 11B 1C 7Misc 3Journal 61Unranked 29

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	FeatureBleed: Inferring Private Enriched Attributes From Sparsity-Optimized AI Accelerators. IEEE Comput. Archit. Lett. Darsh Asher, Farshad Dizani, Joshua Kalyanapu, Rosario Cammarota, Aydin Aysu, Samira Mirbagher Ajorpaz
2026	J	`jnl`	FeatureBleed: Inferring Private Enriched Attributes From Sparsity-Optimized AI Accelerators. CoRR Darsh Asher, Farshad Dizani, Joshua Kalyanapu, Rosario Cammarota, Aydin Aysu, Samira Mirbagher Ajorpaz
2026	J	`jnl`	Preemption-Enhanced Benchmark Suite for FPGAs. IEEE Access Arsalan Ali Malik, John Buchanan, Aydin Aysu
2025	—	`conf`	A Comparison of Unified Multiplier Designs for the Falcon Post-quantum Digital Signature - A Case Study of Baseline, Tiling, Comba and Karatsuba Approaches for FPGA and ASIC. LightSec Rahul Magesh, Modini Ayyagari, Sharath Pendyala, Aydin Aysu
2025	—	`conf`	CRAFT: Characterizing and Root-Causing Fault Injection Threats at Pre-Silicon. HASP@MICRO Arsalan Ali Malik, Harshvadan Mihir, Aydin Aysu
2025	J	`jnl`	CRAFT: Characterizing and Root-Causing Fault Injection Threats at Pre-Silicon. CoRR Arsalan Ali Malik, Harshvadan Mihir, Aydin Aysu
2025	J	`jnl`	CRAFT: Characterizing and Root-Causing Fault Injection Threats at Pre-Silicon. IACR Cryptol. ePrint Arch. Arsalan Ali Malik, Harshvadan Mihir, Aydin Aysu
2025	C	`conf`	Deus Ex LLMs: AI vs Humans in Post-Quantum Cryptographic Hardware Code Generation. VLSI-SoC Ethan Cornett, Rahul Magesh, Sharath Pendyala, Elif Bilge Kavun, Aydin Aysu
2025	J	`jnl`	EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems. CoRR Arsalan Ali Malik, Emre Karabulut, Aydin Aysu
2025	A*	`conf`	Exploiting Power Side-Channel Vulnerabilities in XGBoost Accelerator. DAC Yimeng Xiao, Archit Gajjar, Aydin Aysu, Paul Franzon
2025	J	`jnl`	GATEBLEED: Exploiting On-Core Accelerator Power Gating for High Performance & Stealthy Attacks on AI. CoRR Joshua Kalyanapu, Farshad Dizani, Darsh Asher, Azam Ghanbari, Rosario Cammarota, Aydin Aysu, Samira Mirbagher Ajorpaz
2025	A*	`conf`	GateBleed: Exploiting On-Core Accelerator Power Gating for High Performance and Stealthy Attacks on AI. MICRO Joshua Kalyanapu, Farshad Dizani, Darsh Asher, Azam Ghanbari, Rosario Cammarota, Aydin Aysu, Samira Mirbagher Ajorpaz
2025	J	`jnl`	Hardware-Enabled Mechanisms for Verifying Responsible AI Development. CoRR Aidan O'Gara, Gabriel Kulp, Will Hodgkins, James Petrie, Vincent Immler, Aydin Aysu, Kanad Basu, Shivam Bhasin, Stjepan Picek, Ankur Srivastava
2025	J	`jnl`	Honest to a Fault: Root-Causing Fault Attacks with Pre-Silicon RISC Pipeline Characterization. CoRR Arsalan Ali Malik, Harshvadan Mihir, Aydin Aysu
2025	J	`jnl`	Outrunning the Millennium FALCON: Speed Records for FALCON on FPGAs. IACR Cryptol. ePrint Arch. Sharath Pendyala, Rahul Magesh, Elif Bilge Kavun, Aydin Aysu
2025	J	`jnl`	Precision Strike: Targeted Misclassification of Accelerated CNNs with a Single Clock Glitch. IACR Cryptol. ePrint Arch. Arsalan Ali Malik, Furkan Aydin, Aydin Aysu
2025	J	`jnl`	Preemption-Enhanced Benchmark Suite for FPGAs. CoRR Arsalan Ali Malik, John Buchanan, Aydin Aysu
2025	—	`conf`	Quantum Leak: Timing Side-Channel Attacks on Cloud-Based Quantum Services. ACM Great Lakes Symposium on VLSI Chao Lu, Esha Telang, Aydin Aysu, Kanad Basu
2025	J	`jnl`	SHIFT SNARE: Uncovering Secret Keys in FALCON via Single-Trace Analysis. CoRR Jinyi Qiu, Aydin Aysu
2025	J	`jnl`	SHIFT SNARE: Uncovering Secret Keys in FALCON via Single-Trace Analysis. IACR Cryptol. ePrint Arch. Jinyi Qiu, Aydin Aysu
2025	J	`jnl`	Stochastic Training for Side-Channel Resilient AI. CoRR Anuj Dubey, Aydin Aysu
2025	J	`jnl`	THEMIS: Time, Heterogeneity, and Energy Minded Scheduling for Fair Multi-Tenant Use in FPGAs. IEEE Trans. Computers Emre Karabulut, Arsalan Ali Malik, Amro Awad, Aydin Aysu
2025	J	`jnl`	TPUXtract: An Exhaustive Hyperparameter Extraction Framework. IACR Trans. Cryptogr. Hardw. Embed. Syst. Ashley Kurian, Anuj Dubey, Ferhat Yaman, Aydin Aysu
2025	A	`conf`	The Fellowship of the Leak: Power Analysis of a Masked FrodoKEM Hardware Accelerator. ICCAD Martin Schmid, Giuseppe Manzoni, Aydin Aysu, Elif Bilge Kavun
2025	J	`jnl`	Train to Defend: First Defense Against Cryptanalytic Neural Network Parameter Extraction Attacks. CoRR Ashley Kurian, Aydin Aysu
2024	—	`conf`	A Hardware-Software Co-Design for the Discrete Gaussian Sampling of FALCON Digital Signature. HOST Emre Karabulut, Aydin Aysu
2024	J	`jnl`	An Open Source Ecosystem for Implementation Security Testing. IACR Cryptol. ePrint Arch. Aydin Aysu, Fatemeh Ganji, Trey Marcantonio, Patrick Schaumont
2024	J	`jnl`	Enabling Secure and Efficient Sharing of Accelerators in Expeditionary Systems. J. Hardw. Syst. Secur. Arsalan Ali Malik, Emre Karabulut, Amro Awad, Aydin Aysu
2024	—	`conf`	Extended Abstract: Pre-Silicon Vulnerability Assessment for AI/ML Hardware. ACM Great Lakes Symposium on VLSI Furkan Aydin, Emre Karabulut, Aydin Aysu
2024	J	`jnl`	Leaking secrets in homomorphic encryption with side-channel attacks. J. Cryptogr. Eng. Furkan Aydin, Aydin Aysu
2024	J	`jnl`	Masking FALCON's Floating-Point Multiplication in Hardware. IACR Trans. Cryptogr. Hardw. Embed. Syst. Emre Karabulut, Aydin Aysu
2024	J	`jnl`	Quantum Leak: Timing Side-Channel Attacks on Cloud-Based Quantum Services. CoRR Chao Lu, Esha Telang, Aydin Aysu, Kanad Basu
2024	J	`jnl`	RD-FAXID: Ransomware Detection with FPGA-Accelerated XGBoost. ACM Trans. Reconfigurable Technol. Syst. Archit Gajjar, Priyank Kashyap, Aydin Aysu, Paul Franzon, Yongjin Choi, Chris Cheng, Giacomo Pedretti, Jim Ignowski
2024	J	`jnl`	THEMIS: Time, Heterogeneity, and Energy Minded Scheduling for Fair Multi-Tenant Use in FPGAs. CoRR Emre Karabulut, Arsalan Ali Malik, Amro Awad, Aydin Aysu
2023	A	`conf`	A Full-Stack Approach for Side-Channel Secure ML Hardware. ITC Anuj Dubey, Aydin Aysu
2023	J	`jnl`	A Hardware-Software Co-Design for the Discrete Gaussian Sampling of FALCON Digital Signature. IACR Cryptol. ePrint Arch. Emre Karabulut, Aydin Aysu
2023	—	`conf`	A Survey of Software Implementations for the Number Theoretic Transform. SAMOS Ahmet Can Mert, Ferhat Yaman, Emre Karabulut, Erdinç Öztürk, Erkay Savas, Aydin Aysu
2023	—	`conf`	Hardware-Software Co-design for Side-Channel Protected Neural Network Inference. HOST Anuj Dubey, Rosario Cammarota, Avinash Varna, Raghavan Kumar, Aydin Aysu
2023	J	`jnl`	Hardware-Software Co-design for Side-Channel Protected Neural Network Inference. IACR Cryptol. ePrint Arch. Anuj Dubey, Rosario Cammarota, Avinash Varna, Raghavan Kumar, Aydin Aysu
2023	J	`jnl`	Introduction to the Special Issue on the Digital Threats of Hardware Security. DTRAP Aydin Aysu, Scott R. Graham
2023	J	`jnl`	Leaking Secrets in Homomorphic Encryption with Side-Channel Attacks. IACR Cryptol. ePrint Arch. Furkan Aydin, Aydin Aysu
2023	C	`conf`	SS-AXI: Secure and Safe Access Control Mechanism for Multi-Tenant Cloud FPGAs. ISCAS Emre Karabulut, Amro Awad, Aydin Aysu
2023	J	`jnl`	SeqL+: Secure Scan-Obfuscation With Theoretical and Empirical Validation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Seetal Potluri, Shamik Kundu, Akash Kumar, Kanad Basu, Aydin Aysu
2022	J	`jnl`	An Extensive Study of Flexible Design Methods for the Number Theoretic Transform. IEEE Trans. Computers Ahmet Can Mert, Emre Karabulut, Erdinç Öztürk, Erkay Savas, Aydin Aysu
2022	J	`jnl`	Apple vs. EMA: Electromagnetic Side Channel Attacks on Apple CoreCrypto. IACR Cryptol. ePrint Arch. Gregor Haas, Aydin Aysu
2022	A*	`conf`	Apple vs. EMA: electromagnetic side channel attacks on apple CoreCrypto. DAC Gregor Haas, Aydin Aysu
2022	J	`jnl`	Efficient, Flexible, and Constant-Time Gaussian Sampling Hardware for Lattice Cryptography. IEEE Trans. Computers Emre Karabulut, Erdem Alkim, Aydin Aysu
2022	—	`conf`	Exposing Side-Channel Leakage of SEAL Homomorphic Encryption Library. ASHES@CCS Furkan Aydin, Aydin Aysu
2022	Misc	`conf`	FAXID: FPGA-Accelerated XGBoost Inference for Data Centers using HLS. FCCM Archit Gajjar, Priyank Kashyap, Aydin Aysu, Paul D. Franzon, Sumon Dey, Chris Cheng
2022	J	`jnl`	Guarding Machine Learning Hardware Against Physical Side-channel Attacks. ACM J. Emerg. Technol. Comput. Syst. Anuj Dubey, Rosario Cammarota, Vikram B. Suresh, Aydin Aysu
2022	—	`conf`	Hands-On Teaching of Hardware Security for Machine Learning. ACM Great Lakes Symposium on VLSI Ashley Calhoun, Erick Ortega, Ferhat Yaman, Anuj Dubey, Aydin Aysu
2022	—	`conf`	High-Fidelity Model Extraction Attacks via Remote Power Monitors. AICAS Anuj Dubey, Emre Karabulut, Amro Awad, Aydin Aysu
2022	J	`jnl`	ModuloNET: Neural Networks Meet Modular Arithmetic for Efficient Hardware Masking. IACR Trans. Cryptogr. Hardw. Embed. Syst. Anuj Dubey, Afzal Ahmad, Muhammad Adeel Pasha, Rosario Cammarota, Aydin Aysu
2022	—	`conf`	Multi-Tenant Cloud FPGAs: Side-Channel Security and Safety. CCSW Aydin Aysu
2022	—	`conf`	PR Crisis: Analyzing and Fixing Partial Reconfiguration in Multi-Tenant Cloud FPGAs. ASHES@CCS Emre Karabulut, Chandu Yuvarajappa, Mohammed Iliyas Shaik, Seetal Potluri, Amro Awad, Aydin Aysu
2022	A	`conf`	RevEAL: Single-Trace Side-Channel Leakage of the SEAL Homomorphic Encryption Library. DATE Furkan Aydin, Emre Karabulut, Seetal Potluri, Erdem Alkim, Aydin Aysu
2022	J	`jnl`	RevEAL: Single-Trace Side-Channel Leakage of the SEAL Homomorphic Encryption Library. IACR Cryptol. ePrint Arch. Furkan Aydin, Emre Karabulut, Seetal Potluri, Erdem Alkim, Aydin Aysu
2022	J	`jnl`	Single-Trace Side-Channel Attacks on Ï-Small Polynomial Sampling: With Applications to NTRU, NTRU Prime, and CRYSTALS-DILITHIUM. IACR Cryptol. ePrint Arch. Emre Karabulut, Erdem Alkim, Aydin Aysu
2022	C	`conf`	Towards AI-Enabled Hardware Security: Challenges and Opportunities. IOLTS Hossein Sayadi, Mehrdad Aliasgari, Furkan Aydin, Seetal Potluri, Aydin Aysu, Jack Edmonds, Sara Tehranipoor
2021	J	`jnl`	2Deep: Enhancing Side-Channel Attacks on Lattice-Based Key-Exchange via 2-D Deep Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Priyank Kashyap, Furkan Aydin, Seetal Potluri, Paul D. Franzon, Aydin Aysu
2021	C	`conf`	An Efficient Non-Profiled Side-Channel Attack on the CRYSTALS-Dilithium Post-Quantum Signature. ICCD Zhaohui Chen, Emre Karabulut, Aydin Aysu, Yuan Ma, Jiwu Jing
2021	A*	`conf`	FALCON Down: Breaking FALCON Post-Quantum Signature Scheme through Side-Channel Attacks. DAC Emre Karabulut, Aydin Aysu
2021	J	`jnl`	Falcon Down: Breaking Falcon Post-Quantum Signature Scheme through Side-Channel Attacks. IACR Cryptol. ePrint Arch. Emre Karabulut, Aydin Aysu
2021	J	`jnl`	Guarding Machine Learning Hardware Against Physical Side-Channel Attacks. CoRR Anuj Dubey, Rosario Cammarota, Vikram B. Suresh, Aydin Aysu
2021	J	`jnl`	Horizontal Side-Channel Vulnerabilities of Post-Quantum Key Exchange and Encapsulation Protocols. ACM Trans. Embed. Comput. Syst. Furkan Aydin, Aydin Aysu, Mohit Tiwari, Andreas Gerstlauer, Michael Orshansky
2021	J	`jnl`	ModuloNET: Neural Networks Meet Modular Arithmetic for Efficient Hardware Masking. IACR Cryptol. ePrint Arch. Anuj Dubey, Afzal Ahmad, Muhammad Adeel Pasha, Rosario Cammarota, Aydin Aysu
2021	J	`jnl`	SeqL+: Secure Scan-Obfuscation with Theoretical and Empirical Validation. IACR Cryptol. ePrint Arch. Seetal Potluri, Shamik Kundu, Akash Kumar, Kanad Basu, Aydin Aysu
2021	—	`conf`	Single-Trace Side-Channel Attacks on ω-Small Polynomial Sampling: With Applications to NTRU, NTRU Prime, and CRYSTALS-DILITHIUM. HOST Emre Karabulut, Erdem Alkim, Aydin Aysu
2021	A	`conf`	Stealing Neural Network Models through the Scan Chain: A New Threat for ML Hardware. ICCAD Seetal Potluri, Aydin Aysu
2021	J	`jnl`	Stealing Neural Network Models through the Scan Chain: A New Threat for ML Hardware. IACR Cryptol. ePrint Arch. Seetal Potluri, Aydin Aysu
2021	—	`conf`	iTimed: Cache Attacks on the Apple A10 Fusion SoC. HOST Gregor Haas, Seetal Potluri, Aydin Aysu
2021	J	`jnl`	iTimed: Cache Attacks on the Apple A10 Fusion SoC. IACR Cryptol. ePrint Arch. Gregor Haas, Seetal Potluri, Aydin Aysu
2020	A	`conf`	A Flexible and Scalable NTT Hardware : Applications from Homomorphically Encrypted Deep Learning to Post-Quantum Cryptography. DATE Ahmet Can Mert, Emre Karabulut, Erdinç Öztürk, Erkay Savas, Michela Becchi, Aydin Aysu
2020	A	`conf`	BoMaNet: Boolean Masking of an Entire Neural Network. ICCAD Anuj Dubey, Rosario Cammarota, Aydin Aysu
2020	J	`jnl`	BoMaNet: Boolean Masking of an Entire Neural Network. CoRR Anuj Dubey, Rosario Cammarota, Aydin Aysu
2020	—	`conf`	DeePar-SCA: Breaking Parallel Architectures of Lattice Cryptography via Learning Based Side-Channel Attacks. SAMOS Furkan Aydin, Priyank Kashyap, Seetal Potluri, Paul D. Franzon, Aydin Aysu
2020	J	`jnl`	Efficacy of Satisfiability Based Attacks in the Presence of Circuit Reverse Engineering Errors. CoRR Qinhan Tan, Seetal Potluri, Aydin Aysu
2020	C	`conf`	Efficacy of Satisfiability-Based Attacks in the Presence of Circuit Reverse-Engineering Errors. ISCAS Qinhan Tan, Seetal Potluri, Aydin Aysu
2020	J	`jnl`	High-Level Synthesis of Number-Theoretic Transform: A Case Study for Future Cryptosystems. IEEE Embed. Syst. Lett. Erdem Ozcan, Aydin Aysu
2020	A	`conf`	Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk-. ICCAD Francesco Regazzoni, Shivam Bhasin, Amir Alipour, Ihab Alshaer, Furkan Aydin, Aydin Aysu, Vincent Beroulle, Giorgio Di Natale, Paul D. Franzon, David Hély, Naofumi Homma, Akira Ito, Dirmanto Jap, Priyank Kashyap, Ilia Polian, Seetal Potluri, Rei Ueno, Elena-Ioana Vatajelu, Ville Yli-Mäyry
2020	—	`conf`	MaskedNet: The First Hardware Inference Engine Aiming Power Side-Channel Protection. HOST Anuj Dubey, Rosario Cammarota, Aydin Aysu
2020	B	`conf`	RANTT: A RISC-V Architecture Extension for the Number Theoretic Transform. FPL Emre Karabulut, Aydin Aysu
2020	—	`conf`	SeqL: Secure Scan-Locking for IP Protection. ISQED Seetal Potluri, Aydin Aysu, Akash Kumar
2020	J	`jnl`	SeqL: Secure Scan-Locking for IP Protection. CoRR Seetal Potluri, Aydin Aysu, Akash Kumar
2020	J	`jnl`	Trustworthy AI Inference Systems: An Industry Research View. CoRR Rosario Cammarota, Matthias Schunter, Anand Rajan, Fabian Boemer, Ágnes Kiss, Amos Treiber, Christian Weinert, Thomas Schneider, Emmanuel Stapf, Ahmad-Reza Sadeghi, Daniel Demmler, Huili Chen, Siam Umar Hussain, M. Sadegh Riazi, Farinaz Koushanfar, Saransh Gupta, Tajana Simunic Rosing, Kamalika Chaudhuri, Hamid Nejatollahi, Nikil D. Dutt, Mohsen Imani, Kim Laine, Anuj Dubey, Aydin Aysu, Fateme Sadat Hosseini, Chengmo Yang, Eric Wallace, Pamela Norton
2019	—	`conf`	Fast and Efficient Implementation of Lightweight Crypto Algorithm PRESENT on FPGA through Processor Instruction Set Extension. EWDTS Abdullah Varici, Gurol Saglam, Seckin Ipek, Abdullah Yildiz, Sezer Gören, Aydin Aysu, Deniz Iskender, T. Baris Aktemur, H. Fatih Ugurdag
2019	J	`jnl`	MaskedNet: A Pathway for Secure Inference against Power Side-Channel Attacks. CoRR Anuj Dubey, Rosario Cammarota, Aydin Aysu
2019	—	`conf`	Teaching the Next Generation of Cryptographic Hardware Design to the Next Generation of Engineers. ACM Great Lakes Symposium on VLSI Aydin Aysu
2019	—	`conf`	Using Power-Anomalies to Counter Evasive Micro-Architectural Attacks in Embedded Systems. HOST Shijia Wei, Aydin Aysu, Michael Orshansky, Andreas Gerstlauer, Mohit Tiwari
2018	A	`conf`	Binary Ring-LWE hardware with power side-channel countermeasures. DATE Aydin Aysu, Michael Orshansky, Mohit Tiwari
2018	—	`conf`	Fresh re-keying with strong PUFs: A new approach to side-channel security. HOST Xiaodan Xi, Aydin Aysu, Michael Orshansky
2018	—	`conf`	Horizontal side-channel vulnerabilities of post-quantum key exchange protocols. HOST Aydin Aysu, Youssef Tobah, Mohit Tiwari, Andreas Gerstlauer, Michael Orshansky
2017	—	`conf`	A new maskless debiasing method for lightweight physical unclonable functions. HOST Aydin Aysu, Ye Wang, Patrick Schaumont, Michael Orshansky
2016	A	`conf`	A design method for remote integrity checking of complex PCBs. DATE Aydin Aysu, Shravya Gaddam, Harsha Mandadi, Carol Pinto, Luke Wegryn, Patrick Schaumont
2016	J	`jnl`	Compact and low-power ASIP design for lightweight PUF-based authentication protocols. IET Inf. Secur. Aydin Aysu, Ege Gulcan, Daisuke Moriyama, Patrick Schaumont
2016	J	`jnl`	Precomputation Methods for Hash-Based Signatures on Energy-Harvesting Platforms. IEEE Trans. Computers Aydin Aysu, Patrick Schaumont
2016	—	`—`	Resource-constrained and Resource-efficient Modern Cryptosystem Design. Aydin Aysu
2016	Misc	`conf`	Secure and Private, yet Lightweight, Authentication for the IoT via PUF and CBKA. ICISC Christopher Huth, Aydin Aysu, Jorge Guajardo, Paul Duplys, Tim Güneysu
2015	J	`jnl`	BitCryptor: Bit-Serialized Compact Crypto Engine on Reconfigurable Hardware. IACR Cryptol. ePrint Arch. Ege Gulcan, Aydin Aysu, Patrick Schaumont
2015	Misc	`conf`	BitCryptor: Bit-Serialized Flexible Crypto Engine for Lightweight Applications. INDOCRYPT Ege Gulcan, Aydin Aysu, Patrick Schaumont
2015	A	`conf`	End-To-End Design of a PUF-Based Privacy Preserving Authentication Protocol. CHES Aydin Aysu, Ege Gulcan, Daisuke Moriyama, Patrick Schaumont, Moti Yung
2015	J	`jnl`	End-to-end Design of a PUF-based Privacy Preserving Authentication Protocol. IACR Cryptol. ePrint Arch. Aydin Aysu, Ege Gulcan, Daisuke Moriyama, Patrick Schaumont, Moti Yung
2015	J	`jnl`	Hardware/software co-design of physical unclonable function based authentications on FPGAs. Microprocess. Microsystems Aydin Aysu, Patrick Schaumont
2015	J	`jnl`	Precomputation Methods for Faster and Greener Post-Quantum Cryptography on Emerging Embedded Platforms. IACR Cryptol. ePrint Arch. Aydin Aysu, Patrick Schaumont
2015	J	`jnl`	The Future of Real-Time Security: Latency-Optimized Lattice-Based Digital Signatures. ACM Trans. Embed. Comput. Syst. Aydin Aysu, Bilgiday Yuce, Patrick Schaumont
2014	—	`conf`	A Flexible and Compact Hardware Architecture for the SIMON Block Cipher. LightSec Ege Gulcan, Aydin Aysu, Patrick Schaumont
2014	—	`conf`	A low power adaptive H.264 video encoder hardware. ICCE-Berlin Ilker Hamzaoglu, Aydin Aysu, Onur Can Ulusel
2014	A	`conf`	Analyzing and eliminating the causes of fault sensitivity analysis. DATE Nahid Farhady Ghalaty, Aydin Aysu, Patrick Schaumont
2014	J	`jnl`	SIMON Says, Break the Area Records for Symmetric Key Block Ciphers on FPGAs. IACR Cryptol. ePrint Arch. Aydin Aysu, Ege Gulcan, Patrick Schaumont
2014	J	`jnl`	SIMON Says: Break Area Records of Block Ciphers on FPGAs. IEEE Embed. Syst. Lett. Aydin Aysu, Ege Gulcan, Patrick Schaumont
2013	—	`conf`	Digital fingerprints for low-cost platforms using MEMS sensors. WESS Aydin Aysu, Nahid Farhady Ghalaty, Zane R. Franklin, Moein Pahlavan Yali, Patrick Schaumont
2013	C	`conf`	Low cost FPGA design and implementation of a stereo matching system for 3D-TV applications. VLSI-SoC Aydin Aysu, Murat Sayinta, Cevahir Cigla
2013	—	`conf`	Low-cost and area-efficient FPGA implementations of lattice-based cryptography. HOST Aydin Aysu, Cameron Patterson, Patrick Schaumont
2013	—	`conf`	PASC: Physically authenticated stable-clocked soc platform on low-cost FPGAs. ReConFig Aydin Aysu, Patrick Schaumont
2013	—	`conf`	Three Design Dimensions of Secure Embedded Systems. SPACE Patrick Schaumont, Aydin Aysu
2011	J	`jnl`	A low energy adaptive hardware for H.264 multiple reference frame motion estimation. IEEE Trans. Consumer Electron. Aydin Aysu, Gokhan Sayilar, Ilker Hamzaoglu
2010	C	`conf`	Efficient hardware implementations of high throughput SHA-3 candidates keccak, luffa and blue midnight wish for single- and multi-message hashing. SIN Abdulkadir Akin, Aydin Aysu, Onur Can Ulusel, Erkay Savas