Ayan Banerjee

29 papers Journal 20Unranked 9
YearRankTypeTitle / Venue / Authors
2024 — conf
A Dynamic Window Size-Based VLSI Architecture Design of Moving Average Filter and Its Vulnerability to Hardware Trojans.
VDAT
Moitreya Chaudhury, Binit Kumar Pandit, Ayan Banerjee
2023 J jnl
3D EdgeSegNET: a deep neural network framework for simultaneous edge detection and segmentation of medical images.
Signal Image Video Process.
Binit Kumar Pandit, Ayan Banerjee
2023 — conf
Resource-efficient VLSI Architecture of Softmax Activation Function for Real-time Inference in Deep Learning Applications.
ISDCS
Akash Ther, Binit Kumar Pandit, Anirban Ganguly, Anirban Chakraborty, Ayan Banerjee
2022 J jnl
A Novel Reconfigurable Analog VLSI Architecture of M-point DFT Using Complex Matrix Multiplier and Graph-Based Signal Routing Method.
Circuits Syst. Signal Process.
Anirban Ganguly, Ayan Banerjee
2022 J jnl
Analysis of V-Net Architecture for Iris Segmentation in Unconstrained Scenarios.
SN Comput. Sci.
Ayan Banerjee, Chinmoy Ghosh, Satyendra Nath Mandal
2022 J jnl
Cell-Based Synthesis of Multiple Analog Filter and Oscillator Topologies Employing Graph.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Baidyanath Ray, Debanjana Datta, Mousumi Bhanja, Ayan Banerjee
2022 J jnl
Systematic realization of non-linear arithmetic functions using hexagonal Field Programmable Analog Array.
Microelectron. J.
Debanjana Datta, Ayan Banerjee
2021 J jnl
A Novel Paradigm of CORDIC-Based FFT Architecture Framed on the Optimality of High-Radix Computation.
Circuits Syst. Signal Process.
Ayan Banerjee, Anindya Sundar Dhar
2021 J jnl
CORDIC-Based High-Speed VLSI Architecture of Transform Model Estimation for Real-Time Imaging.
IEEE Trans. Very Large Scale Integr. Syst.
Anirban Chakraborty, Ayan Banerjee
2021 J jnl
Cellular Automata based Cryptography Model for Reliable Encryption Using State Transition in Wireless Network Optimizing Data Security.
Wirel. Pers. Commun.
Ayan Banerjee, Anirban Kundu
2021 J jnl
Cloud Based e-Feedback Services Using Performance Analysis: A Linear Approach.
Trans. Large Scale Data Knowl. Centered Syst.
Ayan Banerjee, Anirban Kundu
2021 J jnl
Precise realization of one-staged 2-D DCT using analog current mode architecture in compressed sensing front-end.
Microelectron. J.
Anirban Ganguly, Ayan Banerjee
2021 — conf
VLSI Architecture of Sigmoid Activation Function for Rapid Prototyping of Machine Learning Applications.
iSES
Binit Kumar Pandit, Ayan Banerjee
2020 J jnl
A Memory Efficient, Multiplierless & Modular VLSI Architecture of 1D/2D Re-Configurable 9/7 & 5/3 DWT Filters Using Distributed Arithmetic.
J. Circuits Syst. Comput.
Anirban Chakraborty, Ayan Banerjee
2020 J jnl
A memory and area-efficient distributed arithmetic based modular VLSI architecture of 1D/2D reconfigurable 9/7 and 5/3 DWT filters for real-time image decomposition.
J. Real Time Image Process.
Anirban Chakraborty, Ayan Banerjee
2020 — conf
Comparative Analysis of Cellular Automata Based Multilingual Encryption Using Syndicate Rules for Data Security.
IBICA
Ayan Banerjee, Anirban Kundu
2019 J jnl
A unified block-based sparse domain solution for quasi-periodic de-noising from different genres of images with iterative filtering.
Multim. Tools Appl.
Debolina Chakraborty, Anirban Chakraborty, Ayan Banerjee, S. R. Bhadra Chaudhuri
2019 — conf
Cell-based Coherent Design Methodology for Linear and Non-linear Analog Circuits.
SoCC
Debanjana Datta, Mousumi Bhanja, Anirban Chaudhuri, Baidyanath Ray, Ayan Banerjee
2019 — conf
Design of Current Mode Sigmoid Function and Hyperbolic Tangent Function.
VDAT
Debanjana Datta, Sweta Agarwal, Vikash Kumar, Mayank Raj, Baidyanath Ray, Ayan Banerjee
2019 J jnl
Gabor-based spectral domain automated notch-reject filter for quasi-periodic noise reduction from digital images.
Multim. Tools Appl.
Debolina Chakraborty, Milan Kumar Tarafder, Ayan Banerjee, Sekhar R. Bhadra Chaudhuri
2019 J jnl
Modular and parallel VLSI architecture of multi-dimensional quad-core GA co-processor for real time image/video processing.
Microprocess. Microsystems
Anirban Chakraborty, Ayan Banerjee
2019 J jnl
Software for Feedback System Using Adaptive Categorization and Authenticated Recommendation.
Int. J. Open Source Softw. Process.
Ayan Banerjee, Anirban Kundu
2019 — conf
Synthesis of Linear and Non-linear Analog Circuits.
SoCC
Debanjana Datta, Baidyanath Ray, Ayan Banerjee
2018 — conf
A Highly Accurate Current Mode Analog Implementation of Radix-2 FFT/IFFT Processor.
ISED
Anirban Ganguly, Anirban Chakraborty, Ayan Banerjee
2018 J jnl
Automated spectral domain approach of quasi-periodic denoising in natural images using notch filtration with exact noise profile.
IET Image Process.
Debolina Chakraborty, Anirban Chakraborty, Ayan Banerjee, Sekhar R. Bhadra Chaudhuri
2018 — conf
Low Area & Memory Efficient VLSI Architecture of 1D/2D DWT for Real Time Image Decomposition.
ISED
Anirban Chakraborty, Ayan Banerjee
2013 J jnl
Pipelined VLSI Architecture using CORDIC for Transform Domain Equalizer.
J. Signal Process. Syst.
Ayan Banerjee, Anindya Sundar Dhar
2005 J jnl
Novel architecture for QAM modulator-demodulator and its generalization to multicarrier modulation.
Microprocess. Microsystems
Ayan Banerjee, Anindya Sundar Dhar
2001 J jnl
FPGA realization of a CORDIC based FFT processor for biomedical signal processing.
Microprocess. Microsystems
Ayan Banerjee, Anindya Sundar Dhar, Swapna Banerjee