Avesta Sasan - RankMe

144 papers A* 10A 12B 2C 7Misc 5Journal 51Unranked 53

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Energy-Efficient Quantization-Aware Training with Dynamic Bit-Width Optimization. ACM Great Lakes Symposium on VLSI Ali Karkehabadi, Avesta Sasan
2025	J	`jnl`	Optimizing Vision Transformers: Unveiling 'Focus and Forget' for Enhanced Computational Efficiency. IEEE Access Banafsheh Saber Latibari, Houman Homayoun, Avesta Sasan
2025	—	`conf`	Prompting for Power: Benchmarking Large Language Models for Low-Power RTL Design Generation. MLCAD Kevin Immanuel Gubbi, Marcus Halm, Sarbani Kumar, Arvind Sudarshan, Pavan Dheeraj Kota, Mohammadnavid Tarighat, Avesta Sasan, Houman Homayoun
2025	—	`conf`	State of Hardware Fuzzing: Current Methods and the Potential of Machine Learning and Large Language Models. ISQED Kevin Immanuel Gubbi, Mohammadnavid Tarighat, Arvind Sudarshan, Inderpreet Kaur, Pavan Dheeraj Kota, Avesta Sasan, Houman Homayoun
2025	—	`conf`	Transformers for Secure Hardware Systems: Applications, Challenges, and Outlook. ACM Great Lakes Symposium on VLSI Banafsheh Saber Latibari, Najmeh Nazari, Avesta Sasan, Houman Homayoun, Pratik Satam, Soheil Salehi, Hossein Sayadi
2025	J	`jnl`	Transformers for Secure Hardware Systems: Applications, Challenges, and Outlook. CoRR Banafsheh Saber Latibari, Najmeh Nazari, Avesta Sasan, Houman Homayoun, Pratik Satam, Soheil Salehi, Hossein Sayadi
2025	—	`conf`	Unified Gravity Loss for Robust Neural Networks Through Feature Space Optimization. ACM Great Lakes Symposium on VLSI Ali Karkehabadi, Houman Homayoun, Avesta Sasan
2024	A*	`conf`	Architectural Whispers: Robust Machine Learning Models Fingerprinting via Frequency Throttling Side-Channels. DAC Najmeh Nazari, Chongzhou Fang, Hosein Mohammadi Makrani, Behnam Omidi, Mahdi Eslamimehr, Setareh Rafatirad, Avesta Sasan, Hossein Sayadi, Khaled N. Khasawneh, Houman Homayoun
2024	J	`jnl`	Automated Hardware Logic Obfuscation Framework Using GPT. CoRR Banafsheh Saber Latibari, Sujan Ghimire, Muhtasim Alam Chowdhury, Najmeh Nazari, Kevin Immanuel Gubbi, Houman Homayoun, Avesta Sasan, Soheil Salehi
2024	J	`jnl`	FFCL: Forward-Forward Net with Cortical Loops, Training and Inference on Edge Without Backpropagation. CoRR Ali Karkehabadi, Houman Homayoun, Avesta Sasan
2024	—	`conf`	FFCL: Forward-Forward Net with Cortical Loops, Training and Inference on Edge Without Backpropogation. ACM Great Lakes Symposium on VLSI Ali Karkehabadi, Houman Homayoun, Avesta Sasan
2024	J	`jnl`	Generative AI-Based Effective Malware Detection for Embedded Computing Systems. CoRR Sreenitha Kasarapu, Sanket Shukla, Rakibul Hassan, Avesta Sasan, Houman Homayoun, Sai Manoj Pudukotai Dinakarrao
2024	—	`conf`	IRET: Incremental Resolution Enhancing Transformer. ACM Great Lakes Symposium on VLSI Banafsheh Saber Latibari, Soheil Salehi, Houman Homayoun, Avesta Sasan
2024	J	`jnl`	Optimized and Automated Secure IC Design Flow: A Defense-in-Depth Approach. IEEE Trans. Circuits Syst. I Regul. Pap. Kevin Immanuel Gubbi, Banafsheh Saber Latibari, Muhtasim Alam Chowdhury, Afrooz Jalilzadeh, Erfan Yazdandoost Hamedani, Setareh Rafatirad, Avesta Sasan, Houman Homayoun, Soheil Salehi
2024	C	`conf`	Securing On-Chip Learning: Navigating Vulnerabilities and Potential Safeguards in Spiking Neural Network Architectures. ISCAS Najmeh Nazari, Kevin Immanuel Gubbi, Banafsheh Saber Latibari, Muhtasim Alam Chowdhury, Chongzhou Fang, Avesta Sasan, Setareh Rafatirad, Houman Homayoun, Soheil Salehi
2024	A	`conf`	SpecScope: Automating Discovery of Exploitable Spectre Gadgets on Black-Box Microarchitectures. DATE Najmeh Nazari, Behnam Omidi, Chongzhou Fang, Hosein Mohammadi Makrani, Setareh Rafatirad, Avesta Sasan, Houman Homayoun, Khaled N. Khasawneh
2024	J	`jnl`	Transformers: A Security Perspective. IEEE Access Banafsheh Saber Latibari, Najmeh Nazari, Muhtasim Alam Chowdhury, Kevin Immanuel Gubbi, Chongzhou Fang, Sujan Ghimire, Elahe Hosseini, Hossein Sayadi, Houman Homayoun, Soheil Salehi, Avesta Sasan
2023	J	`jnl`	Advanced Reinforcement Learning Solution for Clock Skew Engineering: Modified Q-Table Update Technique for Peak Current and IR Drop Minimization. IEEE Access Sayed Aresh Beheshti-Shirazi, Najmeh Nazari, Kevin Immanuel Gubbi, Banafsheh Saber Latibari, Setareh Rafatirad, Houman Homayoun, Avesta Sasan, Sai Manoj P. D.
2023	A*	`conf`	Gotcha! I Know What You Are Doing on the FPGA Cloud: Fingerprinting Co-Located Cloud FPGA Accelerators via Measuring Communication Links. CCS Chongzhou Fang, Ning Miao, Han Wang, Jiacheng Zhou, Tyler Sheaves, John Marty Emmert, Avesta Sasan, Houman Homayoun
2023	J	`jnl`	Gotcha! I Know What You are Doing on the FPGA Cloud: Fingerprinting Co-Located Cloud FPGA Accelerators via Measuring Communication Links. CoRR Chongzhou Fang, Ning Miao, Han Wang, Jiacheng Zhou, Tyler Sheaves, John Marty Emmert, Avesta Sasan, Houman Homayoun
2023	J	`jnl`	HW-V2W-Map: Hardware Vulnerability to Weakness Mapping Framework for Root Cause Analysis with GPT-assisted Mitigation Suggestion. CoRR Yu-Zheng Lin, Muntasir Mamun, Muhtasim Alam Chowdhury, Shuyu Cai, Mingyu Zhu, Banafsheh Saber Latibari, Kevin Immanuel Gubbi, Najmeh Nazari Bavarsad, Arjun Caputo, Avesta Sasan, Houman Homayoun, Setareh Rafatirad, Pratik Satam, Soheil Salehi
2023	J	`jnl`	Hardware Trojan Detection Using Machine Learning: A Tutorial. ACM Trans. Embed. Comput. Syst. Kevin Immanuel Gubbi, Banafsheh Saber Latibari, Anirudh Srikanth, Tyler Sheaves, Sayed Arash Beheshti-Shirazi, Sai Manoj PD, Setareh Rafatirad, Avesta Sasan, Houman Homayoun, Soheil Salehi
2023	J	`jnl`	SMOOT: Saliency Guided Mask Optimized Online Training. CoRR Ali Karkehabadi, Houman Homayoun, Avesta Sasan
2023	—	`conf`	Securing AI Hardware: Challenges in Detecting and Mitigating Hardware Trojans in ML Accelerators. MWSCAS Kevin Immanuel Gubbi, Inderpreet Kaur, Abdallah Hashem, Sai Manoj P. D., Houman Homayoun, Avesta Sasan, Soheil Salehi
2022	—	`conf`	Adaptive-Gravity: A Defense Against Adversarial Samples. ISQED Ali Mirzaeian, Zhi Tian, Sai Manoj P. D., Banafsheh S. Latibari, Ioannis Savidis, Houman Homayoun, Avesta Sasan
2022	J	`jnl`	Adaptive-Gravity: A Defense Against Adversarial Samples. CoRR Ali Mirzaeian, Zhi Tian, Sai Manoj P. D., Banafsheh S. Latibari, Ioannis Savidis, Houman Homayoun, Avesta Sasan
2022	—	`conf`	Analysis of the Security Vulnerabilities of 2.5-D and 3-D Integrated Circuits. ISQED Vaibhav Venugopal Rao, Avesta Sasan, Ioannis Savidis
2022	J	`jnl`	Breaking the Design and Security Trade-off of Look-up-table-based Obfuscation. ACM Trans. Design Autom. Electr. Syst. Gaurav Kolhe, Tyler David Sheaves, Sai Manoj P. D., Hamid Mahmoodi, Setareh Rafatirad, Avesta Sasan, Houman Homayoun
2022	—	`conf`	CAD-FSL: Code-Aware Data Generation based Few-Shot Learning for Efficient Malware Detection. ACM Great Lakes Symposium on VLSI Sreenitha Kasarapu, Sanket Shukla, Rakibul Hassan, Avesta Sasan, Houman Homayoun, Sai Manoj P. D.
2022	—	`ed.`	GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6 - 8, 2022 ACM Great Lakes Symposium on VLSI Ioannis Savidis, Avesta Sasan, Himanshu Thapliyal, Ronald F. DeMara
2022	A*	`conf`	LOCK&ROLL: deep-learning power side-channel attack mitigation using emerging reconfigurable devices and logic locking. DAC Gaurav Kolhe, Tyler David Sheaves, Kevin Immanuel Gubbi, Soheil Salehi, Setareh Rafatirad, Sai Manoj P. D., Avesta Sasan, Houman Homayoun
2022	—	`conf`	Neuromorphic-Enabled Security for IoT. NEWCAS Soheil Salehi, Tyler David Sheaves, Kevin Immanuel Gubbi, Sayed Arash Beheshti, Sai Manoj P. D., Setareh Rafatirad, Avesta Sasan, Tinoosh Mohsenin, Houman Homayoun
2022	—	`conf`	RAPTA: A Hierarchical Representation Learning Solution For Real-Time Prediction of Path-Based Static Timing Analysis. ACM Great Lakes Symposium on VLSI Tanmoy Chowdhury, Ashkan Vakil, Banafsheh Saber Latibari, Sayed Aresh Beheshti-Shirazi, Ali Mirzaeian, Xiaojie Guo, Sai Manoj P. D., Houman Homayoun, Ioannis Savidis, Liang Zhao, Avesta Sasan
2022	A*	`conf`	Repttack: Exploiting Cloud Schedulers to Guide Co-Location Attacks. NDSS Chongzhou Fang, Han Wang, Najmeh Nazari, Behnam Omidi, Avesta Sasan, Khaled N. Khasawneh, Setareh Rafatirad, Houman Homayoun
2022	A*	`conf`	Silicon validation of LUT-based logic-locked IP cores. DAC Gaurav Kolhe, Tyler Sheaves, Kevin Immanuel Gubbi, Tejas Kadale, Setareh Rafatirad, Sai Manoj P. D., Avesta Sasan, Hamid Mahmoodi, Houman Homayoun
2022	—	`conf`	Survey of Machine Learning for Electronic Design Automation. ACM Great Lakes Symposium on VLSI Kevin Immanuel Gubbi, Sayed Aresh Beheshti-Shirazi, Tyler David Sheaves, Soheil Salehi, Sai Manoj P. D., Setareh Rafatirad, Avesta Sasan, Houman Homayoun
2021	—	`conf`	A Reinforced Learning Solution for Clock Skew Engineering to Reduce Peak Current and IR Drop. ACM Great Lakes Symposium on VLSI Sayed Aresh Beheshti-Shirazi, Ashkan Vakil, Sai Manoj P. D., Ioannis Savidis, Houman Homayoun, Avesta Sasan
2021	J	`jnl`	AVATAR: NN-Assisted Variation Aware Timing Analysis and Reporting for Hardware Trojan Detection. IEEE Access Ashkan Vakil, Ali Mirzaeian, Houman Homayoun, Naghmeh Karimi, Avesta Sasan
2021	J	`jnl`	Adaptive Performance Modeling of Data-intensive Workloads for Resource Provisioning in Virtualized Environment. ACM Trans. Model. Perform. Evaluation Comput. Syst. Hosein Mohammadi Makrani, Hossein Sayadi, Najmeh Nazari, Sai Manoj Pudukotai Dinakarrao, Avesta Sasan, Tinoosh Mohsenin, Setareh Rafatirad, Houman Homayoun
2021	J	`jnl`	CPM: A general feature dependency pattern mining framework for contrast multivariate time series. Pattern Recognit. Qingzhe Li, Liang Zhao, Yi-Ching Lee, Avesta Sasan, Jessica Lin
2021	—	`conf`	ChaoLock: Yet Another SAT-hard Logic Locking using Chaos Computing. ISQED Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
2021	—	`conf`	Cloak & Co-locate: Adversarial Railroading of Resource Sharing-based Attacks on the Cloud. SEED Hosein Mohammadi Makrani, Hossein Sayadi, Najmeh Nazari, Khaled N. Khasawneh, Avesta Sasan, Setareh Rafatirad, Houman Homayoun
2021	—	`conf`	Conditional Classification: A Solution for Computational Energy Reduction. ISQED Ali Mirzaeian, Sai Manoj P. D., Ashkan Vakil, Houman Homayoun, Avesta Sasan
2021	J	`jnl`	Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits. IEEE Trans. Very Large Scale Integr. Syst. Kimia Zamiri Azar, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, Christos P. Sotiriou, Avesta Sasan
2021	—	`conf`	Diverse Knowledge Distillation (DKD): A Solution for Improving The Robustness of Ensemble Models Against Adversarial Attacks. ISQED Ali Mirzaeian, Jana Kosecka, Houman Homayoun, Tinoosh Mohsenin, Avesta Sasan
2021	J	`jnl`	Enabling Micro AI for Securing Edge Devices at Hardware Level. IEEE J. Emerg. Sel. Topics Circuits Syst. Han Wang, Hossein Sayadi, Sai Manoj Pudukotai Dinakarrao, Avesta Sasan, Setareh Rafatirad, Houman Homayoun
2021	—	`conf`	Energy-Efficient and Adversarially Robust Machine Learning with Selective Dynamic Band Filtering. ACM Great Lakes Symposium on VLSI Neha Nagarkar, Khaled N. Khasawneh, Setareh Rafatirad, Avesta Sasan, Houman Homayoun, Sai Manoj Pudukotai Dinakarrao
2021	—	`conf`	Evaluation of Machine Learning-based Detection against Side-Channel Attacks on Autonomous Vehicle. AICAS Han Wang, Soheil Salehi, Hossein Sayadi, Avesta Sasan, Tinoosh Mohsenin, Sai Manoj P. D., Setareh Rafatirad, Houman Homayoun
2021	J	`jnl`	From Cryptography to Logic Locking: A Survey on the Architecture Evolution of Secure Scan Chains. IEEE Access Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2021	—	`ed.`	GLSVLSI '21: Great Lakes Symposium on VLSI 2021, Virtual Event, USA, June 22-25, 2021. ACM Great Lakes Symposium on VLSI Yiran Chen, Victor V. Zhirnov, Avesta Sasan, Ioannis Savidis
2021	—	`conf`	Learning Assisted Side Channel Delay Test for Detection of Recycled ICs. ASP-DAC Ashkan Vakil, Farzad Niknia, Ali Mirzaeian, Avesta Sasan, Naghmeh Karimi
2021	—	`conf`	Machine Learning-Assisted Website Fingerprinting Attacks with Side-Channel Information: A Comprehensive Analysis and Characterization. ISQED Han Wang, Hossein Sayadi, Avesta Sasan, Sai Manoj P. D., Setareh Rafatirad, Houman Homayoun
2021	—	`conf`	RANE: An Open-Source Formal De-obfuscation Attack for Reverse Engineering of Logic Encrypted Circuits. ACM Great Lakes Symposium on VLSI Shervin Roshanisefat, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2021	J	`jnl`	Repttack: Exploiting Cloud Schedulers to Guide Co-Location Attacks. CoRR Chongzhou Fang, Han Wang, Najmeh Nazari, Behnam Omidi, Avesta Sasan, Khaled N. Khasawneh, Setareh Rafatirad, Houman Homayoun
2021	—	`conf`	SAT-attack Resilience Measure for Access Restricted Circuits. ACM Great Lakes Symposium on VLSI Saran Phatharodom, Avesta Sasan, Ioannis Savidis
2021	A*	`conf`	Securing Hardware via Dynamic Obfuscation Utilizing Reconfigurable Interconnect and Logic Blocks. DAC Gaurav Kolhe, Soheil Salehi, Tyler David Sheaves, Houman Homayoun, Setareh Rafatirad, Sai Manoj P. D., Avesta Sasan
2020	—	`conf`	CSCMAC - Cyclic Sparsely Connected Neural Network Manycore Accelerator. ISQED Hirenkumar Paneliya, Morteza Hosseini, Avesta Sasan, Houman Homayoun, Tinoosh Mohsenin
2020	J	`jnl`	Cluster-Based Partitioning of Convolutional Neural Networks, A Solution for Computational Energy and Complexity Reduction. CoRR Ali Mirzaeian, Masoud PourReza, Mohammad Sabokrou, Ashkan Vakil, Tinoosh Mohsenin, Houman Homayoun, Avesta Sasan
2020	—	`conf`	Code-Bridged Classifier (CBC): A Low or Negative Overhead Defense for Making a CNN Classifier Robust Against Adversarial Attacks. ISQED Farnaz Behnia, Ali Mirzaeian, Mohammad Sabokrou, Sai Manoj P. D., Tinoosh Mohsenin, Khaled N. Khasawneh, Liang Zhao, Houman Homayoun, Avesta Sasan
2020	J	`jnl`	Code-Bridged Classifier (CBC): A Low or Negative Overhead Defense for Making a CNN Classifier Robust Against Adversarial Attacks. CoRR Farnaz Behnia, Ali Mirzaeian, Mohammad Sabokrou, Sai Manoj P. D., Tinoosh Mohsenin, Khaled N. Khasawneh, Liang Zhao, Houman Homayoun, Avesta Sasan
2020	J	`jnl`	Cognitive and Scalable Technique for Securing IoT Networks Against Malware Epidemics. IEEE Access Sai Manoj Pudukotai Dinakarrao, Xiaojie Guo, Hossein Sayadi, Cameron Nowzari, Avesta Sasan, Setareh Rafatirad, Liang Zhao, Houman Homayoun
2020	—	`conf`	Comprehensive Evaluation of Machine Learning Countermeasures for Detecting Microarchitectural Side-Channel Attacks. ACM Great Lakes Symposium on VLSI Han Wang, Hossein Sayadi, Avesta Sasan, Setareh Rafatirad, Tinoosh Mohsenin, Houman Homayoun
2020	Misc	`conf`	DFSSD: Deep Faults and Shallow State Duality, A Provably Strong Obfuscation Solution for Circuits with Restricted Access to Scan Chain. VTS Shervin Roshanisefat, Hadi Mardani Kamali, Kimia Zamiri Azar, Sai Manoj Pudukotai Dinakarrao, Naghmeh Karimi, Houman Homayoun, Avesta Sasan
2020	J	`jnl`	DFSSD: Deep Faults and Shallow State Duality, A Provably Strong Obfuscation Solution for Circuits with Restricted Access to Scan Chain. CoRR Shervin Roshanisefat, Hadi Mardani Kamali, Kimia Zamiri Azar, Sai Manoj Pudukotai Dinakarrao, Naghmeh Karimi, Houman Homayoun, Avesta Sasan
2020	—	`conf`	Energy-Efficient Hardware for Language Guided Reinforcement Learning. ACM Great Lakes Symposium on VLSI Aidin Shiri, Arnab Neelim Mazumder, Bharat Prakash, Nitheesh Kumar Manjunath, Houman Homayoun, Avesta Sasan, Nicholas R. Waytowich, Tinoosh Mohsenin
2020	J	`jnl`	ExTru: A Lightweight, Fast, and Secure Expirable Trust for the Internet of Things. CoRR Hadi Mardani Kamali, Kimia Zamiri Azar, Shervin Roshanisefat, Ashkan Vakil, Avesta Sasan
2020	C	`conf`	HybriDG: Hybrid Dynamic Time Warping and Gaussian Distribution Model for Detecting Emerging Zero-Day Microarchitectural Side-Channel Attacks. ICMLA Han Wang, Hossein Sayadi, Avesta Sasan, Setareh Rafatirad, Houman Homayoun
2020	A	`conf`	Hybrid-Shield: Accurate and Efficient Cross-Layer Countermeasure for Run-Time Detection and Mitigation of Cache-Based Side-Channel Attacks. ICCAD Han Wang, Hossein Sayadi, Avesta Sasan, Setareh Rafatirad, Houman Homayoun
2020	J	`jnl`	ICNN: The Iterative Convolutional Neural Network. ACM Trans. Embed. Comput. Syst. Katayoun Neshatpour, Houman Homayoun, Avesta Sasan
2020	A	`conf`	InterLock: An Intercorrelated Logic and Routing Locking. ICCAD Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
2020	J	`jnl`	InterLock: An Intercorrelated Logic and Routing Locking. CoRR Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
2020	—	`conf`	LASCA: Learning Assisted Side Channel Delay Analysis for Hardware Trojan Detection. ISQED Ashkan Vakil, Farnaz Behnia, Ali Mirzaeian, Houman Homayoun, Naghmeh Karimi, Avesta Sasan
2020	J	`jnl`	LASCA: Learning Assisted Side Channel Delay Analysis for Hardware Trojan Detection. CoRR Ashkan Vakil, Farnaz Behnia, Ali Mirzaeian, Houman Homayoun, Naghmeh Karimi, Avesta Sasan
2020	J	`jnl`	Learning Assisted Side Channel Delay Test for Detection of Recycled ICs. CoRR Ashkan Vakil, Farzad Niknia, Ali Mirzaeian, Avesta Sasan, Naghmeh Karimi
2020	J	`jnl`	Learning Diverse Latent Representations for Improving the Resilience to Adversarial Attacks. CoRR Ali Mirzaeian, Mohammad Sabokrou, Mohammad Khalooei, Jana Kosecka, Houman Homayoun, Tinoosh Mohsenin, Avesta Sasan
2020	A	`conf`	Mitigating Cache-Based Side-Channel Attacks through Randomization: A Comprehensive System and Architecture Level Analysis. DATE Han Wang, Hossein Sayadi, Tinoosh Mohsenin, Liang Zhao, Avesta Sasan, Setareh Rafatirad, Houman Homayoun
2020	—	`conf`	NESTA: Hamming Weight Compression-Based Neural Proc. EngineAli Mirzaeian. ASP-DAC Ali Mirzaeian, Houman Homayoun, Avesta Sasan
2020	A	`conf`	NNgSAT: Neural Network guided SAT Attack on Logic Locked Complex Structures. ICCAD Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2020	J	`jnl`	NNgSAT: Neural Network guided SAT Attack on Logic Locked Complex Structures. CoRR Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2020	—	`conf`	On Designing Secure and Robust Scan Chain for Protecting Obfuscated Logic. ACM Great Lakes Symposium on VLSI Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
2020	J	`jnl`	On Designing Secure and Robust Scan Chain for Protecting Obfuscated Logic. CoRR Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
2020	C	`conf`	Phased-Guard: Multi-Phase Machine Learning Framework for Detection and Identification of Zero-Day Microarchitectural Side-Channel Attacks. ICCD Han Wang, Hossein Sayadi, Gaurav Kolhe, Avesta Sasan, Setareh Rafatirad, Houman Homayoun
2020	J	`jnl`	SAT-Hard Cyclic Logic Obfuscation for Protecting the IP in the Manufacturing Supply Chain. IEEE Trans. Very Large Scale Integr. Syst. Shervin Roshanisefat, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2020	J	`jnl`	SAT-hard Cyclic Logic Obfuscation for Protecting the IP in the Manufacturing Supply Chain. CoRR Shervin Roshanisefat, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2020	C	`conf`	SCARF: Detecting Side-Channel Attacks at Real-time using Low-level Hardware Features. IOLTS Han Wang, Hossein Sayadi, Setareh Rafatirad, Avesta Sasan, Houman Homayoun
2020	—	`conf`	SCRAMBLE: The State, Connectivity and Routing Augmentation Model for Building Logic Encryption. ISVLSI Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
2020	J	`jnl`	SCRAMBLE: The State, Connectivity and Routing Augmentation Model for Building Logic Encryption. CoRR Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
2020	—	`conf`	StealthMiner: Specialized Time Series Machine Learning for Run-Time Stealthy Malware Detection based on Microarchitectural Features. ACM Great Lakes Symposium on VLSI Hossein Sayadi, Yifeng Gao, Hosein Mohammadi Makrani, Tinoosh Mohsenin, Avesta Sasan, Setareh Rafatirad, Jessica Lin, Houman Homayoun
2019	A	`conf`	2SMaRT: A Two-Stage Machine Learning-Based Approach for Run-Time Specialized Hardware-Assisted Malware Detection. DATE Hossein Sayadi, Hosein Mohammadi Makrani, Sai Manoj Pudukotai Dinakarrao, Tinoosh Mohsenin, Avesta Sasan, Setareh Rafatirad, Houman Homayoun
2019	A*	`conf`	Adversarial Attack on Microarchitectural Events based Malware Detectors. DAC Sai Manoj Pudukotai Dinakarrao, Sairaj Amberkar, Sahil Bhat, Abhijitt Dhavlle, Hossein Sayadi, Avesta Sasan, Houman Homayoun, Setareh Rafatirad
2019	A	`conf`	COMA: Communication and Obfuscation Management Architecture. RAID Kimia Zamiri Azar, Farnoud Farahmand, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, William Diehl, Kris Gaj, Avesta Sasan
2019	J	`jnl`	COMA: Communication and Obfuscation Management Architecture. CoRR Kimia Zamiri Azar, Farnoud Farahmand, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, William Diehl, Kris Gaj, Avesta Sasan
2019	B	`conf`	ECoST: Energy-Efficient Co-Locating and Self-Tuning MapReduce Applications. ICPP Maria Malik, Hassan Ghasemzadeh, Tinoosh Mohsenin, Rosario Cammarota, Liang Zhao, Avesta Sasan, Houman Homayoun, Setareh Rafatirad
2019	—	`conf`	Exploiting Energy-Accuracy Trade-off through Contextual Awareness in Multi-Stage Convolutional Neural Networks. ISQED Katayoun Neshatpour, Farnaz Behnia, Houman Homayoun, Avesta Sasan
2019	A*	`conf`	Full-Lock: Hard Distributions of SAT instances for Obfuscating Circuits using Fully Configurable Logic and Routing Blocks. DAC Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
2019	—	`conf`	IR-ATA: IR annotated timing analysis, a flow for closing the loop between PDN design, IR analysis & timing closure. ASP-DAC Ashkan Vakil, Houman Homayoun, Avesta Sasan
2019	—	`conf`	Mitigating the Performance and Quality of Parallelized Compressive Sensing Reconstruction Using Image Stitching. ACM Great Lakes Symposium on VLSI Mahmoud Namazi, Hosein Mohammadi Makrani, Zhi Tian, Setareh Rafatirad, Mohamad Hosein Akbari, Avesta Sasan, Houman Homayoun
2019	J	`jnl`	NESTA: Hamming Weight Compression-Based Neural Proc. Engine. CoRR Ali Mirzaeian, Houman Homayoun, Avesta Sasan
2019	—	`conf`	On Custom LUT-based Obfuscation. ACM Great Lakes Symposium on VLSI Gaurav Kolhe, Sai Manoj P. D., Setareh Rafatirad, Hamid Mahmoodi, Avesta Sasan, Houman Homayoun
2019	J	`jnl`	Pyramid: Machine Learning Framework to Estimate the Optimal Timing and Resource Usage of a High-Level Synthesis Design. CoRR Hosein Mohammadi Makrani, Farnoud Farahmand, Hossein Sayadi, Sara Bondi, Sai Manoj Pudukotai Dinakarrao, Liang Zhao, Avesta Sasan, Houman Homayoun, Setareh Rafatirad
2019	J	`jnl`	SMT Attack: Next Generation Attack on Obfuscated Circuits with Capabilities and Performance Beyond the SAT Attacks. IACR Trans. Cryptogr. Hardw. Embed. Syst. Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2019	A	`conf`	Security and Complexity Analysis of LUT-based Obfuscation: From Blueprint to Reality. ICCAD Gaurav Kolhe, Hadi Mardani Kamali, Miklesh Naicker, Tyler David Sheaves, Hamid Mahmoodi, Sai Manoj P. D., Houman Homayoun, Setareh Rafatirad, Avesta Sasan
2019	—	`conf`	TCD-NPE: A Re-configurable and Efficient Neural Processing Engine, Powered by Novel Temporal-Carry-deferring MACs. ReConFig Ali Mirzaeian, Houman Homayoun, Avesta Sasan
2019	J	`jnl`	TCD-NPE: A Re-configurable and Efficient Neural Processing Engine, Powered by Novel Temporal-Carry-deferring MACs. CoRR Ali Mirzaeian, Houman Homayoun, Avesta Sasan
2019	—	`conf`	Threats on Logic Locking: A Decade Later. ACM Great Lakes Symposium on VLSI Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2019	J	`jnl`	Threats on Logic Locking: A Decade Later. CoRR Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2019	—	`conf`	XPPE: cross-platform performance estimation of hardware accelerators using machine learning. ASP-DAC Hosein Mohammadi Makrani, Hossein Sayadi, Tinoosh Mohsenin, Setareh Rafatirad, Avesta Sasan, Houman Homayoun
2018	Misc	`conf`	Advances and throwbacks in hardware-assisted security: special session. CASES Ferdinand Brasser, Lucas Davi, Abhijitt Dhavlle, Tommaso Frassetto, Sai Manoj Pudukotai Dinakarrao, Setareh Rafatirad, Ahmad-Reza Sadeghi, Avesta Sasan, Hossein Sayadi, Shaza Zeitouni, Houman Homayoun
2018	—	`conf`	Architectural considerations for FPGA acceleration of machine learning applications in MapReduce. SAMOS Katayoun Neshatpour, Hosein Mohammadi Makrani, Avesta Sasan, Hassan Ghasemzadeh, Setareh Rafatirad, Houman Homayoun
2018	C	`conf`	Benchmarking the Capabilities and Limitations of SAT Solvers in Defeating Obfuscation Schemes. IOLTS Shervin Roshanisefat, Harshith K. Thirumala, Kris Gaj, Houman Homayoun, Avesta Sasan
2018	J	`jnl`	Benchmarking the Capabilities and Limitations of SAT Solvers in Defeating Obfuscation Schemes. CoRR Shervin Roshanisefat, Harshith K. Thirumala, Kris Gaj, Houman Homayoun, Avesta Sasan
2018	Misc	`conf`	Design Space Exploration for Hardware Acceleration of Machine Learning Applications in MapReduce. FCCM Katayoun Neshatpour, Hosein Mohammadi Makrani, Avesta Sasan, Hassan Ghasemzadeh, Setareh Rafatirad, Houman Homayoun
2018	J	`jnl`	Energy-efficient acceleration of MapReduce applications using FPGAs. J. Parallel Distributed Comput. Katayoun Neshatpour, Maria Malik, Avesta Sasan, Setareh Rafatirad, Tinoosh Mohsenin, Hassan Ghasemzadeh, Houman Homayoun
2018	A*	`conf`	Ensemble learning for effective run-time hardware-based malware detection: a comprehensive analysis and classification. DAC Hossein Sayadi, Nisarg Patel, Sai Manoj P. D., Avesta Sasan, Setareh Rafatirad, Houman Homayoun
2018	J	`jnl`	Hardware Accelerated Mappers for Hadoop MapReduce Streaming. IEEE Trans. Multi Scale Comput. Syst. Katayoun Neshatpour, Maria Malik, Avesta Sasan, Setareh Rafatirad, Houman Homayoun
2018	A	`conf`	ICNN: An iterative implementation of convolutional neural networks to enable energy and computational complexity aware dynamic approximation. DATE Katayoun Neshatpour, Farnaz Behnia, Houman Homayoun, Avesta Sasan
2018	—	`conf`	LUT-Lock: A Novel LUT-Based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection. ISVLSI Hadi Mardani Kamali, Kimia Zamiri Azar, Kris Gaj, Houman Homayoun, Avesta Sasan
2018	J	`jnl`	LUT-Lock: A Novel LUT-based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection. CoRR Hadi Mardani Kamali, Kimia Zamiri Azar, Kris Gaj, Houman Homayoun, Avesta Sasan
2018	—	`conf`	Low Power and Trusted Machine Learning. ACM Great Lakes Symposium on VLSI Avesta Sasan, Qi Zhu, Yanzhi Wang, Jae-sun Seo, Tinoosh Mohsenin
2018	—	`conf`	MUCH-SWIFT: A High-Throughput Multi-Core HW/SW Co-design K-means Clustering Architecture. ACM Great Lakes Symposium on VLSI Hadi Mardani Kamali, Avesta Sasan
2018	—	`conf`	SRCLock: SAT-Resistant Cyclic Logic Locking for Protecting the Hardware. ACM Great Lakes Symposium on VLSI Shervin Roshanisefat, Hadi Mardani Kamali, Avesta Sasan
2018	J	`jnl`	SRCLock: SAT-Resistant Cyclic Logic Locking for Protecting the Hardware. CoRR Shervin Roshanisefat, Hadi Mardani Kamali, Avesta Sasan
2017	—	`conf`	A Power Delivery Network and Cell Placement Aware IR-Drop Mitigation Technique: Harvesting Unused Timing Slacks to Schedule Useful Skews. ISVLSI Lakshmi Bhamidipati, Bhoopal Gunna, Houman Homayoun, Avesta Sasan
2017	A*	`conf`	Analyzing Hardware Based Malware Detectors. DAC Nisarg Patel, Avesta Sasan, Houman Homayoun
2017	A	`conf`	Big vs little core for energy-efficient Hadoop computing. DATE Maria Malik, Katayoun Neshatpour, Tinoosh Mohsenin, Avesta Sasan, Houman Homayoun
2017	C	`conf`	Machine Learning-Based Approaches for Energy-Efficiency Prediction and Scheduling in Composite Cores Architectures. ICCD Hossein Sayadi, Nisarg Patel, Avesta Sasan, Houman Homayoun
2017	A	`conf`	Spatial and temporal scheduling of clock arrival times for IR hot-spot mitigation, reformulation of peak current reduction. ISLPED Bhoopal Gunna, Lakshmi Bhamidipati, Houman Homayoun, Avesta Sasan
2016	C	`conf`	Big biomedical image processing hardware acceleration: A case study for K-means and image filtering. ISCAS Katayoun Neshatpour, Arezou Koohi, Farnoud Farahmand, Rajiv V. Joshi, Setareh Rafatirad, Avesta Sasan, Houman Homayoun
2016	Misc	`conf`	Big data analytics on heterogeneous accelerator architectures. CODES+ISSS Katayoun Neshatpour, Avesta Sasan, Houman Homayoun
2016	B	`conf`	Characterizing Hadoop applications on microservers for performance and energy efficiency optimizations. ISPASS Maria Malik, Avesta Sasan, Rajiv V. Joshi, Setareh Rafatirah, Houman Homayoun
2016	—	`ch.`	Erratum to: Chapter 4 Resizable Data Composer (RDC) Cache: A Near-Threshold Cache Tolerating Process Variation via Architectural Fault Tolerance. Near Threshold Computing Avesta Sasan, Fadi J. Kurdahi, Ahmed M. Eltawil
2016	—	`ch.`	Resizable Data Composer (RDC) Cache: A Near-Threshold Cache Tolerating Process Variation via Architectural Fault Tolerance. Near Threshold Computing Avesta Sasan, Fadi J. Kurdahi, Ahmed M. Eltawil
2015	—	`conf`	Energy-efficient acceleration of big data analytics applications using FPGAs. IEEE BigData Katayoun Neshatpour, Maria Malik, Mohammad Ali Ghodrat, Avesta Sasan, Houman Homayoun
2015	—	`conf`	System and architecture level characterization of big data applications on big and little core server architectures. IEEE BigData Maria Malik, Setareh Rafatirah, Avesta Sasan, Houman Homayoun
2012	—	`conf`	History & Variation Trained Cache (HVT-Cache): A process variation aware and fine grain voltage scalable cache with active access history monitoring. ISQED Avesta Sasan, Houman Homayoun, Kiarash Amiri, Ahmed M. Eltawil, Fadi J. Kurdahi
2012	J	`jnl`	Variation Trained Drowsy Cache (VTD-Cache): A History Trained Variation Aware Drowsy Cache for Fine Grain Voltage Scaling. IEEE Trans. Very Large Scale Integr. Syst. Avesta Sasan, Kiarash Amiri, Houman Homayoun, Ahmed M. Eltawil, Fadi J. Kurdahi
2011	J	`jnl`	Inquisitive Defect Cache: A Means of Combating Manufacturing Induced Process Variation. IEEE Trans. Very Large Scale Integr. Syst. Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, Fadi J. Kurdahi
2011	J	`jnl`	MZZ-HVS: Multiple Sleep Modes Zig-Zag Horizontal and Vertical Sleep Transistor Sharing to Reduce Leakage Power in On-Chip SRAM Peripheral Circuits. IEEE Trans. Very Large Scale Integr. Syst. Houman Homayoun, Avesta Sasan, Alexander V. Veidenbaum, Hsin-Cheng Yao, Shahin Golshan, Payam Heydari
2011	J	`jnl`	Reducing Power in All Major CAM and SRAM-Based Processor Units via Centralized, Dynamic Resource Size Management. IEEE Trans. Very Large Scale Integr. Syst. Houman Homayoun, Avesta Sasan, Jean-Luc Gaudiot, Alexander V. Veidenbaum
2010	—	`conf`	Multiple sleep modes leakage control in peripheral circuits of a all major SRAM-based processor units. Conf. Computing Frontiers Houman Homayoun, Avesta Sasan, Aseem Gupta, Alexander V. Veidenbaum, Fadi J. Kurdahi, Nikil D. Dutt
2010	—	`conf`	RELOCATE: Register File Local Access Pattern Redistribution Mechanism for Power and Thermal Management in Out-of-Order Embedded Processor. HiPEAC Houman Homayoun, Aseem Gupta, Alexander V. Veidenbaum, Avesta Sasan, Fadi J. Kurdahi, Nikil D. Dutt
2009	Misc	`conf`	A fault tolerant cache architecture for sub 500mV operation: resizable data composer cache (RDC-cache). CASES Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, Fadi J. Kurdahi
2009	—	`conf`	Fuzzy Based Trust Estimation for Congestion Control in Wireless Sensor Networks. INCoS Mani Zarei, Amir Masoud Rahmani, Avesta Sasan, Mohammad Teshnehlab
2009	A	`conf`	Process Variation Aware SRAM/Cache for aggressive voltage-frequency scaling. DATE Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, Fadi J. Kurdahi