Austin Rovinski

18 papers A* 2A 4C 1Journal 7Unranked 3

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Accelerating Detailed Routing Convergence through Offline Reinforcement Learning. CoRR Afsara Khan, Austin Rovinski
2025	J	`jnl`	Optically Connected Multi-Stack HBM Modules for Large Language Model Training and Inference. IEEE Comput. Archit. Lett. Yanghui Ou, Hengrui Zhang, Austin Rovinski, David Wentzlaff, Christopher Batten
2025	C	`conf`	Scaling Co-Packaged Optical Interconnects Using Hybrid 2.5D/3D Integration. ISCAS Austin Rovinski, Yanghui Ou, Christine Ou, Devesh Khilwani, Yuyang Wang, Songli Wang, Sunwoo Lee, Keren Bergman, Alyosha C. Molnar, Christopher Batten
2024	J	`jnl`	EDA Corpus: A Large Language Model Dataset for Enhanced Interaction with OpenROAD. CoRR Bing-Yue Wu, Utsav Sharma, Sai Rahul Dhanvi Kankipati, Ajay Yadav, Bintu Kappil George, Sai Ritish Guntupalli, Austin Rovinski, Vidya A. Chhabria
2024	A	`conf`	Generative Methods in EDA: Innovations in Dataset Generation and EDA Tool Assistants. ICCAD Vidya A. Chhabria, Bing-Yue Wu, Utsav Sharma, Kishor Kunal, Austin Rovinski, Sachin S. Sapatnekar
2024	—	`conf`	OpenROAD-Assistant: An Open-Source Large Language Model for Physical Design Tasks. MLCAD Utsav Sharma, Bing-Yue Wu, Sai Rahul Dhanvi Kankipati, Vidya A. Chhabria, Austin Rovinski
2022	—	`—`	Towards Free, Open, and Ubiquitous Hardware Design Austin Rovinski
2020	J	`jnl`	A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix-Matrix Multiplication Accelerator. IEEE J. Solid State Circuits Dong-Hyeon Park, Subhankar Pal, Siying Feng, Paul Gao, Jielun Tan, Austin Rovinski, Shaolin Xie, Chun Zhao, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont, Kuan-Yu Chen, Chaitali Chakrabarti, Michael Bedford Taylor, Trevor N. Mudge, David T. Blaauw, Hun-Seok Kim, Ronald G. Dreslinski
2020	A	`conf`	Bridging Academic Open-Source EDA to Real-World Usability. ICCAD Austin Rovinski, Tutu Ajayi, Minsoo Kim, Guanru Wang, Mehdi Saligane
2020	A	`conf`	Sparse-TPU: adapting systolic arrays for sparse matrices. ICS Xin He, Subhankar Pal, Aporva Amarnath, Siying Feng, Dong-Hyeon Park, Austin Rovinski, Haojie Ye, Kuan-Yu Chen, Ronald G. Dreslinski, Trevor N. Mudge
2019	—	`conf`	A 1.4 GHz 695 Giga Risc-V Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS. VLSI Circuits Austin Rovinski, Chun Zhao, Khalid Al-Hawaj, Paul Gao, Shaolin Xie, Christopher Torng, Scott Davidson, Aporva Amarnath, Luis Vega, Bandhav Veluri, Anuj Rao, Tutu Ajayi, Julian Puscar, Steve Dai, Ritchie Zhao, Dustin Richmond, Zhiru Zhang, Ian Galton, Christopher Batten, Michael B. Taylor, Ronald G. Dreslinski
2019	—	`conf`	A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm. VLSI Circuits Subhankar Pal, Dong-Hyeon Park, Siying Feng, Paul Gao, Jielun Tan, Austin Rovinski, Shaolin Xie, Chun Zhao, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont, Kuan-Yu Chen, Chaitali Chakrabarti, Michael B. Taylor, Trevor N. Mudge, David T. Blaauw, Hun-Seok Kim, Ronald G. Dreslinski
2018	J	`jnl`	The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips. IEEE Micro Scott Davidson, Shaolin Xie, Christopher Torng, Khalid Al-Hawaj, Austin Rovinski, Tutu Ajayi, Luis Vega, Chun Zhao, Ritchie Zhao, Steve Dai, Aporva Amarnath, Bandhav Veluri, Paul Gao, Anuj Rao, Gai Liu, Rajesh K. Gupta, Zhiru Zhang, Ronald G. Dreslinski, Christopher Batten, Michael B. Taylor
2017	A	`conf`	A carbon nanotube transistor based RISC-V processor using pass transistor logic. ISLPED Aporva Amarnath, Siying Feng, Subhankar Pal, Tutu Ajayi, Austin Rovinski, Ronald G. Dreslinski
2017	A*	`conf`	Neurosurgeon: Collaborative Intelligence Between the Cloud and Mobile Edge. ASPLOS Yiping Kang, Johann Hauswald, Cao Gao, Austin Rovinski, Trevor N. Mudge, Jason Mars, Lingjia Tang
2016	J	`jnl`	Designing Future Warehouse-Scale Computers for Sirius, an End-to-End Voice and Vision Personal Assistant. ACM Trans. Comput. Syst. Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Hailong Yang, Yiping Kang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars
2016	J	`jnl`	Sirius Implications for Future Warehouse-Scale Computers. IEEE Micro Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars
2015	A*	`conf`	Sirius: An Open End-to-End Voice and Vision Personal Assistant and Its Implications for Future Warehouse Scale Computers. ASPLOS Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars