Atsushi Maeda - RankMe

12 papers A* 1Journal 7Unranked 4

Year	Rank	Type	Title / Venue / Authors
2012	—	`conf`	Changes that modularization makes in antenna design. ICDIM Atsushi Maeda, Keiichi Ohizumi
2000	A*	`conf`	3D Viewpoint Selection and Bilateral Control for Bio-Micromanipulation. ICRA Fumihito Arai, Tomohiko Sugiyama, Poom Luangjarmekorn, Akiko Kawaji, Toshio Fukuda, Kouichi Itoigawa, Atsushi Maeda
1996	J	`jnl`	Performance analysis of parallel garbage collection using partial marking. Syst. Comput. Jpn. Yoshio Tanaka, Atsushi Maeda, Masakazu Nakanishi, Shogo Matsui
1995	—	`conf`	Complementary Garbage Collector IWMM Shogo Matsui, Yoshio Tanaka, Atsushi Maeda, Masakazu Nakanishi
1994	—	`conf`	Partial Marking GC. CONPAR Yoshio Tanaka, Shogo Matsui, Atsushi Maeda, Masakazu Nakanishi
1992	J	`jnl`	A refreshable analog VLSI neural network chip with 400 neurons and 40 K synapses. IEEE J. Solid State Circuits Yutaka Arima, Mitsuhiro Murasaki, Tsuyoshi Yamada, Atsushi Maeda, Hirofumi Shinohara
1991	J	`jnl`	A 10-b 70-MS/s CMOS D/A converter. IEEE J. Solid State Circuits Yasuyuki Nakamura, Takahiro Miki, Atsushi Maeda, Harufusa Kondoh, Nobuharu Yazawa
1991	J	`jnl`	A 336-neuron, 28 K-synapse, self-learning neural network chip with branch-neuron-unit architecture. IEEE J. Solid State Circuits Yutaka Arima, Koichiro Mashiko, Keisuke Okada, Tsuyoshi Yamada, Atsushi Maeda, Hiromi Notani, Harufusa Kondoh, Shinpei Kayano
1991	J	`jnl`	A self-learning neural network chip with 125 neurons and 10 K self-organization synapses. IEEE J. Solid State Circuits Yutaka Arima, Koichiro Mashiko, Keisuke Okada, Tsuyoshi Yamada, Atsushi Maeda, Harufusa Kondoh, Shimpei Kayano
1990	J	`jnl`	A 30-MHz mixed analog/digital signal processor. IEEE J. Solid State Circuits Sumitaka Takeuchi, Hiroyuki Kouno, Yoshinori Hayashi, Atsushi Maeda, Keisuke Okada, Nobuharu Yazawa
1990	J	`jnl`	An 8-bit 20-MS/s CMOS A/D converter with 50-mW power consumption. IEEE J. Solid State Circuits Shiro Hosotani, Takahiro Miki, Atsushi Maeda, Nobuharu Yazawa
1987	—	`conf`	SYNAPSE: A Multi-Microprocessor Lisp Machine with Parallel Garbage Collector. Parallel Algorithms and Architectures Shogo Matsui, Yoshinobu Kato, Shinsuke Teramura, Tomoyuki Tanaka, Nobuyuki Mohri, Atsushi Maeda, Masakazu Nakanishi