Atsuki Inoue

25 papers B 2C 2Misc 1Journal 4Unranked 16
YearRankTypeTitle / Venue / Authors
2025 J jnl
Greedy search algorithm for partial quantization of convolutional neural networks inspired by submodular optimization.
Neural Comput. Appl.
Satoki Tsuji, Fuyuka Yamada, Hiroshi Kawaguchi, Atsuki Inoue, Yasufumi Sakai
2024 B conf
Active Learning for Graph Neural Networks Training in Catalyst Energy Prediction.
IJCNN
Yasufumi Sakai, Naoki Matsumura, Atsuki Inoue, Hiroshi Kawaguchi, Thang Dang, Atsushi Ishikawa, Árni Björn Höskuldsson, Egill Skúlason
2023 C conf
A Mixed-Precision Quantization Method without Accuracy Degradation Using Semilayers.
ACML
Kengo Matsumoto, Tomoya Matsuda, Atsuki Inoue, Hiroshi Kawaguchi, Yasufumi Sakai
2023 — conf
Self-Supervised Learning with Atom Replacement for Catalyst Energy Prediction by Graph Neural Networks.
INNS DLIA@IJCNN
Yasufumi Sakai, Thang Dang, Shigeki Fukuta, Koichi Shirahata, Atsushi Ishikawa, Atsuki Inoue, Hiroshi Kawaguchi, Árni Björn Höskuldsson, Egill Skúlason
2023 — conf
Semilayer-Wise Partial Quantization Without Accuracy Degradation or Back Propagation.
ICANN (9)
Tomoya Matsuda, Kengo Matsumoto, Atsuki Inoue, Hiroshi Kawaguchi, Yasufumi Sakai
2022 B conf
Automatic Pruning Rate Derivation for Structured Pruning of Deep Neural Networks.
ICPR
Yasufumi Sakai, Akinori Iwakawa, Tsuguchika Tabaru, Atsuki Inoue, Hiroshi Kawaguchi
2022 — conf
Channel-wise quantization without accuracy degradation using Δloss analysis.
ICMLT
Kazuki Okado, Kengo Matsumoto, Atsuki Inoue, Hiroshi Kawaguchi, Yasufumi Sakai
2021 Misc conf
A High-Speed Neural Architecture Search Considering the Number of Weights.
KI
Fuyuka Yamada, Satoki Tsuji, Hiroshi Kawaguchi, Atsuki Inoue, Yasufumi Sakai
2021 C conf
Greedy Search Algorithm for Mixed Precision in Post-Training Quantization of Convolutional Neural Network Inspired by Submodular Optimization.
ACML
Satoki Tsuji, Hiroshi Kawaguchi, Atsuki Inoue, Yasufumi Sakai, Fuyuka Yamada
2021 — conf
Real-time concentration measurement through forehead cerebral blood flow dynamics using NIRS.
BCI
Koji Tsuru, Atsuki Inoue
2019 — conf
Neural-network assistance to calculate precise eigenvalue for fitness evaluation of real product design.
GECCO (Companion)
Yukito Tsunoda, Takahiro Notsu, Yasufumi Sakai, Naoki Hamada, Toshihiko Mori, Teruo Ishihara, Atsuki Inoue
2018 — conf
Layer Skip Learning using LARS variables for 39% Faster Conversion Time and Lower Bandwidth.
ICECS
Yuki Miyauchi, Haruki Mori, Tetsuya Youkawa, Kazuki Yamada, Shintato Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, Atsuki Inoue
2017 — conf
A layer-block-wise pipeline for memory and bandwidth reduction in distributed deep learning.
MLSP
Haruki Mori, Tetsuya Youkawa, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, Atsuki Inoue
2017 — conf
Session 20 overview: Digital voltage regulators and low-power techniques.
ISSCC
Atsuki Inoue, Dennis Sylvester, Edith Beigné
2016 — conf
ES2: Computing architectures paving the path to power efficiency.
ISSCC
Dejan Markovic, Antoine Dupret, Atsuki Inoue
2015 — conf
Session 4 overview: Processors: High-performance digital subcommittee.
ISSCC
Atsuki Inoue, Jinuk Luke Shin
2013 — conf
Session 14 overview: Digital PLLs and building blocks.
ISSCC
Anthony Hill, Atsuki Inoue
2012 — conf
Comparison between power gating and DVFS from the viewpoint of energy efficiency.
ISQED
Atsuki Inoue
2012 — conf
Vision for future television.
ISSCC
Atsuki Inoue, Masaitsu Nakajima
2011 — conf
Design constraint of fine grain supply voltage control LSI.
ASP-DAC
Atsuki Inoue
2009 J jnl
A Sub-µs Wake-Up Time Power Gating Technique With Bypass Power Line for Rush Current Support.
IEEE J. Solid State Circuits
Kenichi Kawasaki, Tetsuyoshi Shiota, Koichi Nakayama, Atsuki Inoue
2007 — conf
On-Die Supply-Voltage Noise Sensor with Real-Time Sampling Mode for Low-Power Processor Applications.
ISSCC
Tomio Sato, Atsuki Inoue, Tetsuyoshi Shiota, Tomoko Inoue, Yukihito Kawabe, Tetsutaro Hashimoto, Toshifumi Imamura, Yoshitaka Murasaka, Makoto Nagata, Atsushi Iwata
2006 — conf
Single-chip multi-processor integrating quadruple 8-way VLIW processors with interface timing analysis considering power supply noise.
ASP-DAC
Satoshi Imai, Atsuki Inoue, Motoaki Matsumura, Kenichi Kawasaki, Atsuhiro Suga
1991 J jnl
Josephson macrocell array.
IEEE J. Solid State Circuits
Seigo Kotani, Atsuki Inoue, Shinya Hasuo
1990 J jnl
An 8-b Josephson digital signal processor.
IEEE J. Solid State Circuits
Seigo Kotani, Atsuki Inoue, Takeshi Imamura, Shinya Hasuo