Astrit Ademaj

18 papers A 5B 1C 3Misc 1Journal 2Unranked 6
YearRankTypeTitle / Venue / Authors
2017 C conf
Self-configuration of IEEE 802.1 TSN networks.
ETFA
Marina Gutiérrez, Astrit Ademaj, Wilfried Steiner, Radu Dobrin, Sasikumar Punnekkat
2011 J jnl
Application-Level Diagnostic and Membership Protocols for Generic Time-Triggered Systems.
IEEE Trans. Dependable Secur. Comput.
Marco Serafini, Péter Bokor, Neeraj Suri, Jonny Vinter, Astrit Ademaj, Wolfgang Brandstätter, Fulvio Tagliabo, Jens Koch
2008 C conf
Segmentation of standard ethernet messages in the time-triggered ethernet.
ETFA
Vaclav Mikolasek, Astrit Ademaj, Stanislav Racek
2007 A conf
A Tunable Add-On Diagnostic Protocol for Time-Triggered Systems.
DSN
Marco Serafini, Neeraj Suri, Jonny Vinter, Astrit Ademaj, Wolfgang Brandstätter, Fulvio Tagliabo, Jens Koch
2007 B conf
Experimental Evaluation of the DECOS Fault-Tolerant Communication Layer.
SAFECOMP
Jonny Vinter, Henrik Eriksson, Astrit Ademaj, Bernhard Leiner, Martin Schlager
2007 — conf
Hardware Implementation of the Time-Triggered Ethernet Controller.
IESS
Klaus Steinhammer, Astrit Ademaj
2006 — conf
A Composable Algorithm for Clock Synchronization in Multi-Cluster Real-Time Systems.
WISES
Alexander Hanzlik, Astrit Ademaj
2006 A conf
A time-triggered ethernet (TTE) switch.
DATE
Klaus Steinhammer, Petr Grillinger, Astrit Ademaj, Hermann Kopetz
2006 J jnl
Combination of clock-state and clock-rate correction in fault-tolerant distributed systems.
Real Time Syst.
Hermann Kopetz, Astrit Ademaj, Alexander Hanzlik
2006 — conf
Fault-Tolerant Time-Triggered Ethernet Configuration with Star Topology.
ARCS Workshops
Astrit Ademaj, Hermann Kopetz, Petr Grillinger, Klaus Steinhammer, Alexander Hanzlik
2005 A conf
A Maintenance-Oriented Fault Model for the DECOS Integrated Diagnostic Architecture.
IPDPS
Philipp Peti, Roman Obermaisser, Astrit Ademaj, Hermann Kopetz
2005 C conf
The Time-Triggered Ethernet (TTE) Design.
ISORC
Hermann Kopetz, Astrit Ademaj, Petr Grillinger, Klaus Steinhammer
2004 A conf
Integration of Internal and External Clock Synchronization by the Combination of Clock-State and Clock-Rate Correction in Fault-Tolerant Distributed Systems.
RTSS
Hermann Kopetz, Astrit Ademaj, Alexander Hanzlik
2003 A conf
Evaluation of Fault Handling of the Time-Triggered Architecture with Bus and Star Topology.
DSN
Astrit Ademaj, Håkan Sivencrona, Günther Bauer, Jan Torin
2002 Misc conf
A Methodology for Dependability Evaluation of the Time-Triggered Architecture Using Software Implemented Fault Injection.
EDCC
Astrit Ademaj
2002 — conf
Fault Tolerance Evaluation Using Two Software Based Fault Injection Methods.
IOLTW
Astrit Ademaj, Petr Grillinger, Pavel Herout, Jan Hlavicka
2002 — conf
Setting break-points in distributed time-triggered architecture.
HLDVT
Idriz Smaili, Astrit Ademaj
2002 — conf
Slightly-off-specification failures in the time-triggered architecture.
HLDVT
Astrit Ademaj