Asim J. Al-Khalili

55 papers A* 2A 3C 3Misc 2Journal 19Unranked 26
YearRankTypeTitle / Venue / Authors
2021 J jnl
A finite element-guided mathematical surrogate modeling approach for assessing occupant injury trends across variations in simplified vehicular impact conditions.
Medical Biol. Eng. Comput.
P. R. Berthelson, Payam Ghassemi, J. W. Wood, G. G. Stubblefield, Asim J. Al-Khalili, M. D. Jones, Mark F. Horstemeyer, Souma Chowdhury, R. K. Prabhu
2014 — conf
10 GHz throughput FinFET dual-edge triggered flip-flops.
CCECE
Seyed Ebrahim Esmaeili, Asim J. Al-Khalili
2014 — conf
Vt-conscious repeater insertion in power-managed VLSI.
ISIC
Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria
2013 J jnl
Integrated Power and Clock Distribution Network.
IEEE Trans. Very Large Scale Integr. Syst.
Seyed Ebrahim Esmaeili, Asim J. Al-Khalili
2012 — conf
Clock tree structure with reduced wire length using the matched-delay skew compensation technique.
CCECE
Seyed Ebrahim Esmaeili, Ali M. Farhangi, Asim J. Al-Khalili, Glenn E. R. Cowan
2012 — conf
Dual-edge triggered sense amplifier flip-flop utilizing an improved scheme to reduce area, power, and complexity.
ICECS
Seyed Ebrahim Esmaeili, Riadul Islam, Asim J. Al-Khalili, Glenn E. R. Cowan
2012 J jnl
Low-Swing Differential Conditional Capturing Flip-Flop for LC Resonant Clock Distribution Networks.
IEEE Trans. Very Large Scale Integr. Syst.
Seyed Ebrahim Esmaeili, Asim J. Al-Khalili, Glenn E. R. Cowan
2012 J jnl
Postsilicon Tuning of Standby Supply Voltage in SRAMs to Reduce Yield Losses Due to Parametric Data-Retention Failures.
IEEE Trans. Very Large Scale Integr. Syst.
Afshin Nourivand, Asim J. Al-Khalili, Yvon Savaria
2011 J jnl
Analysis of Resistive Open Defects in Drowsy SRAM Cells.
J. Electron. Test.
Afshin Nourivand, Asim J. Al-Khalili, Yvon Savaria
2011 — conf
Repeater insertion in power-managed VLSI systems.
ACM Great Lakes Symposium on VLSI
Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria
2011 — conf
SRAM read-assist scheme for high performanc low power applications.
ISOCC
Ali Valaee, Asim J. Al-Khalili
2010 C conf
An interconnect-aware Dynamic Voltage Scaling scheme for DSM VLSI.
ISCAS
Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria
2010 — conf
Estimating required driver strength in the resonant clock generator.
APCCAS
Seyed Ebrahim Esmaeili, Asim J. Al-Khalili, Glenn E. R. Cowan
2010 — conf
Pattern-Driven Clock Tree Routing with Via Minimization.
ISVLSI
Ali M. Farhangi, Asim J. Al-Khalili, Dhamin Al-Khalili
2010 J jnl
Skew compensation in energy recovery clock distribution networks.
IET Comput. Digit. Tech.
Seyed Ebrahim Esmaeili, Ali M. Farhangi, Asim J. Al-Khalili, Glenn E. R. Cowan
2009 — conf
An interconnect-aware delay model for dynamic voltage scaling in NM technologies.
ACM Great Lakes Symposium on VLSI
Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria
2009 — conf
Estimation of energy performance in computing platforms.
ICECS
Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria
2006 — conf
A CAD Tool for Generation of Synthesizable and Scalable Square of Binary Numbers.
ICN/ICONS/MCL
Asim J. Al-Khalili
2006 C conf
Zero skew differential clock distribution network.
ISCAS
Houman Zarrabi, Haydar Saaied, Asim J. Al-Khalili, Yvon Savaria
2005 — conf
An Area-Reduced Scheme for Modulo 2n-1 Addition/Subtraction.
IWSOC
Shaoqiang Bi, Warren J. Gross, Wei Wang, Asim J. Al-Khalili, M. N. S. Swamy
2005 J jnl
Delay analysis of CMOS gates using modified logical effort model.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Adnan Kabbani, Dhamin Al-Khalili, Asim J. Al-Khalili
2005 J jnl
Simultaneous adaptive wire adjustment and local topology modification for tuning a bounded-skew clock tree.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Haydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili, Mohamed Nekili
2004 — conf
Clock tree tuning using shortest paths polygon.
SoCC
Haydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili
2004 — conf
Modulo deflation in (2
ISCAS (2)
Shaoqiang Bi, Wei Wang, Asim J. Al-Khalili
2004 — conf
New modulo decomposed residue-to-binary algorithm for general moduli sets.
ICASSP (5)
Shaoqiang Bi, Wei Wang, Asim J. Al-Khalili
2003 — conf
Adaptive wire adjustment for bounded skew Clock Distribution Network.
ASP-DAC
Haydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili, Mohamed Nekili
2003 — conf
Design of a 32-bit squarer - exploiting addition redundancy.
ISCAS (5)
Asim J. Al-Khalili, Aiping Hu
2003 J jnl
Low-Power Constant-Coefficient Multiplier Generator.
J. VLSI Signal Process.
Cheng-Yu Pai, Asim J. Al-Khalili, William E. Lynch
2003 J jnl
Technology-portable analytical model for DSM CMOS inverter transition-time estimation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Adnan Kabbani, Dhamin Al-Khalili, Asim J. Al-Khalili
2002 — conf
Quadratic deferred-merge embedding algorithm for zero skew clock distribution network.
Timing Issues in the Specification and Synthesis of Digital Systems
Haydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili, Mohamed Nekili
2001 J jnl
A Low Power Approach to Floating Point Adder Design for DSP Applications.
J. VLSI Signal Process.
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili, S. Y. A. Shah
1999 — conf
An IEEE Compliant Floating Point MAF.
VLSI
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili
1999 Misc conf
Lossy Compression of Images Using Logic Minimization.
VLSI Design
Jacob Augustine, William E. Lynch, Yuke Wang, Asim J. Al-Khalili
1999 — conf
Power implications of precision limited arithmetic in floating point FIR filters.
ISCAS (1)
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili
1998 Misc conf
A Low Power Floating Point Accumulator.
VLSI Design
R. V. K. Pillai, Asim J. Al-Khalili, Dhamin Al-Khalili
1997 C conf
A Low Power Approach to Floating Point Adder Design.
ICCD
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili
1997 A conf
Energy delay measures of barrel switch architectures for pre-alignment of floating point operands for addition.
ISLPED
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili
1996 — conf
A 2D micromachined accelerometer.
ICECS
H. Ahmad, Asim J. Al-Khalili, L. Landsberger, M. Kahrizi
1996 A conf
Energy delay analysis of partial product reduction methods for parallel multiplier implementation.
ISLPED
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili
1995 J jnl
Area efficient computing structures for concurrent error detection in systolic arrays.
J. VLSI Signal Process.
Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri
1995 J jnl
Design techniques for fault-tolerant systolic arrays.
J. VLSI Signal Process.
Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri, Dhamin Al-Khalili
1992 — conf
Design Methodology for Fault-Tolerant Systolic Array Architectures.
ICPP (2)
Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri
1992 A conf
Power estimation tool for sub-micron CMOS VLSI circuits.
ICCAD
F. Rouatbi, Baher Haroun, Asim J. Al-Khalili
1991 — conf
Area Efficient Computing Structures for Concurrent Error Detection in Systolic Architectures.
ICPP (1)
Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri
1991 — conf
On the Design of Optimal Fault-Tolerant Systolic Array Architecures.
IPPS
Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri
1990 J jnl
A module generator for optimized CMOS buffers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Asim J. Al-Khalili, Yong Zhu, Dhamin Al-Khalili
1990 — conf
Design of optimal systolic arrays: a systematic approach.
SPDP
Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri
1989 A* conf
A Module Generator for Optimized CMOS Buffers.
DAC
Asim J. Al-Khalili, Yong Zhu, Dhamin Al-Khalili
1988 A* conf
A micro-manipulator vision in IC Manufacturing.
ICRA
Ram Dantu, Nikitas J. Dimopoulos, Rajni V. Patel, Asim J. Al-Khalili
1988 J jnl
An algorithm for polygon conversion to boxes for VLSI layouts.
Integr.
Asim J. Al-Khalili, Dhamin Al-Khalili, Khaled Ammar
1985 J jnl
A general approach to relative offset settings of traffic signals.
IEEE Trans. Syst. Man Cybern.
Asim J. Al-Khalili
1985 J jnl
The optimum green split of a cycle time.
IEEE Trans. Syst. Man Cybern.
Asim J. Al-Khalili
1985 J jnl
Urban traffic control - A general approach.
IEEE Trans. Syst. Man Cybern.
Asim J. Al-Khalili
1984 J jnl
An Algorithm for an Intelligent Arabic Computer Terminal.
Int. J. Man Mach. Stud.
Asim J. Al-Khalili
1973 — conf
An On-Line Optimization Procedure for an Urban Traffic System.
Optimization Techniques
C. J. Macleod, Asim J. Al-Khalili