Ashay Rane

12 papers A* 4A 1B 1C 1Journal 1Unranked 4
YearRankTypeTitle / Venue / Authors
2020 A* conf
Think Fast: A Tensor Streaming Processor (TSP) for Accelerating Deep Learning Workloads.
ISCA
Dennis Abts, Jonathan Ross, Jonathan Sparling, Mark Wong-VanHaren, Max Baker, Tom Hawkins, Andrew Bell, John Thompson, Temesghen Kahsai, Garrin Kimmell, Jennifer Hwang, Rebekah Leslie-Hurd, Michael Bye, E. R. Creswick, Matthew Boyd, Mahitha Venigalla, Evan Laforge, Jon Purdy, Purushotham Kamath, Dinesh Maheshwari, Michael Beidler, Geert Rosseel, Omar Ahmad, Gleb Gagarin, Richard Czekalski, Ashay Rane, Sahil Parmar, Jeff Werner, Jim Sproch, Adrián Macías, Brian Kurtz
2018 A conf
MicroStache: A Lightweight Execution Context for In-Process Safe Region Isolation.
RAID
Lucian Mogosanu, Ashay Rane, Nathan Dautenhahn
2017 — conf
Everest: Towards a Verified, Drop-in Replacement of HTTPS.
SNAPL
Karthikeyan Bhargavan, Barry Bond, Antoine Delignat-Lavaud, Cédric Fournet, Chris Hawblitzel, Catalin Hritcu, Samin Ishtiaq, Markulf Kohlweiss, K. Rustan M. Leino, Jay R. Lorch, Kenji Maillard, Jianyang Pan, Bryan Parno, Jonathan Protzenko, Tahina Ramananandro, Ashay Rane, Aseem Rastogi, Nikhil Swamy, Laure Thompson, Peng Wang, Santiago Zanella-Béguelin, Jean Karim Zinzindohoue
2017 A* conf
Vale: Verifying High-Performance Cryptographic Assembly Code.
USENIX Security Symposium
Barry Bond, Chris Hawblitzel, Manos Kapritsos, K. Rustan M. Leino, Jacob R. Lorch, Bryan Parno, Ashay Rane, Srinath T. V. Setty, Laure Thompson
2016 A* conf
Secure, Precise, and Fast Floating-Point Operations on x86 Processors.
USENIX Security Symposium
Ashay Rane, Calvin Lin, Mohit Tiwari
2015 A* conf
Raccoon: Closing Digital Side-Channels through Obfuscated Execution.
USENIX Security Symposium
Ashay Rane, Calvin Lin, Mohit Tiwari
2014 J jnl
Enhancing Performance Optimization of Multicore/Multichip Nodes with Data Structure Metrics.
ACM Trans. Parallel Comput.
Ashay Rane, James C. Browne
2014 — conf
Unification of Static and Dynamic Analyses to Enable Vectorization.
LCPC
Ashay Rane, Rakesh Krishnaiyer, Chris J. Newburn, James C. Browne, Leonardo Fialho, Zakhar Matveev
2012 — conf
A systematic process for efficient execution on Intel's heterogeneous computation nodes.
XSEDE
Ashay Rane, James C. Browne, Lars Koesterke
2012 B conf
Enhancing performance optimization of multicore chips and multichip nodes with data structure metrics.
PACT
Ashay Rane, James C. Browne
2011 C conf
Performance Optimization of Data Structures Using Memory Access Characterization.
CLUSTER
Ashay Rane, James C. Browne
2011 — conf
Poster: determining code segments that can benefit from execution on GPUs.
SC Companion
Ashay Rane, Saurabh Sardeshpande, James C. Browne