Arunkumar Vijayakumar

16 papers A 1Misc 1Journal 2Unranked 12
YearRankTypeTitle / Venue / Authors
2019 J jnl
Physical Design Obfuscation of Hardware: A Comprehensive Investigation of Device- and Logic-Level Techniques.
CoRR
Arunkumar Vijayakumar, Vinay C. Patil, Daniel E. Holcomb, Christof Paar, Sandip Kundu
2017 — conf
Improving reliability of weak PUFs via circuit techniques to enhance mismatch.
HOST
Vinay C. Patil, Arunkumar Vijayakumar, Daniel E. Holcomb, Sandip Kundu
2017 J jnl
Physical Design Obfuscation of Hardware: A Comprehensive Investigation of Device and Logic-Level Techniques.
IEEE Trans. Inf. Forensics Secur.
Arunkumar Vijayakumar, Vinay C. Patil, Daniel E. Holcomb, Christof Paar, Sandip Kundu
2016 Misc conf
An Efficient Method for Clock Skew Scheduling to Reduce Peak Current.
VLSID
Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu
2016 — conf
Machine learning resistant strong PUF: Possible or a pipe dream?
HOST
Arunkumar Vijayakumar, Vinay C. Patil, Charles B. Prado, Sandip Kundu
2016 — conf
On meta-obfuscation of physical layouts to conceal design characteristics.
DFT
Vinay C. Patil, Arunkumar Vijayakumar, Sandip Kundu
2016 — conf
On testing physically unclonable functions for uniqueness.
ISQED
Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu
2016 — conf
Preventing integrated circuit piracy via custom encoding of hardware instruction set.
ISQED
Vinay C. Patil, Arunkumar Vijayakumar, Sandip Kundu
2015 A conf
A novel modeling attack resistant PUF design based on non-linear voltage transfer characteristics.
DATE
Arunkumar Vijayakumar, Sandip Kundu
2014 — conf
A Chaotic Ring oscillator based Random Number Generator.
HOST
Siva Nishok Dhanuskodi, Arunkumar Vijayakumar, Sandip Kundu
2014 — conf
Glitch Power Reduction via Clock Skew Scheduling.
ISVLSI
Arunkumar Vijayakumar, Sandip Kundu
2014 — conf
On Maximizing Decoupling Capacitance of Clock-Gated Logic for Robust Power Delivery.
ISVLSI
Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu
2014 — conf
On pattern generation for maximizing IR drop.
ISQED
Arunkumar Vijayakumar, Vinay C. Patil, Girish Paladugu, Sandip Kundu
2013 — conf
A system-level solution for managing spatial temperature gradients in thinned 3D ICs.
ISQED
Arunachalam Annamalai, Raghavan Kumar, Arunkumar Vijayakumar, Sandip Kundu
2012 — conf
On Design of Low Cost Power Supply Noise Detection Sensor for Microprocessors.
ISVLSI
Arunkumar Vijayakumar, Raghavan Kumar, Sandip Kundu
2011 — conf
Stress aware switching activity driven low power design of critical paths in nanoscale CMOS circuits.
ACM Great Lakes Symposium on VLSI
Sudarshan Srinivasan, Bharath Phanibhushana, Arunkumar Vijayakumar, Sandip Kundu