Aruna Jayasena

26 papers A 1C 1Misc 1Journal 23
YearRankTypeTitle / Venue / Authors
2026 J jnl
SysFuSS: System-Level Firmware Fuzzing with Selective Symbolic Execution.
CoRR
Dakshina Tharindu, Aruna Jayasena, Prabhat Mishra
2026 J jnl
TroLL: Exploiting Structural Similarities Between Logic Locking and Hardware Trojans.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yuntao Liu, Aruna Jayasena, Prabhat Mishra, Ankur Srivastava
2025 J jnl
Application-Specific Power Side-Channel Attacks and Countermeasures: A Survey.
CoRR
Sahan Sanjaya, Aruna Jayasena, Prabhat Mishra
2025 J jnl
CiseLeaks: Information Leakage Assessment of Cryptographic Instruction Set Extension Prototypes.
IEEE Trans. Inf. Forensics Secur.
Aruna Jayasena, Richard Bachmann, Prabhat Mishra
2025 J jnl
FirmWall: Directed Symbolic Execution of Firmware Binaries for Defending Against Unauthorized System Calls.
IEEE Trans. Inf. Forensics Secur.
Aruna Jayasena, Prabhat Mishra
2025 J jnl
Formal verification of bioinformatics software using model checking and theorem proving.
Briefings Bioinform.
Hansika Weerasena, Aruna Jayasena, Christina Boucher, Prabhat Mishra
2025 J jnl
FuSS: Coverage-Directed Hardware Fuzzing with Selective Symbolic Execution.
ACM Trans. Embed. Comput. Syst.
Aruna Jayasena, Sai Suprabhanu Nallapaneni, Prabhat Mishra
2025 J jnl
Information Leakage Through Physical Layer Supply Voltage Coupling Vulnerability.
IEEE Trans. Very Large Scale Integr. Syst.
Sahan Sanjaya, Aruna Jayasena, Prabhat Mishra
2025 J jnl
SleepWalk: Exploiting Context Switching and Residual Power for Physical Side-Channel Attacks.
CoRR
Sahan Sanjaya, Aruna Jayasena, Prabhat Mishra
2025 J jnl
Towards a Functionally Complete and Parameterizable TFHE Processor.
CoRR
Valentin Reyes Häusler, Gabriel Ott, Aruna Jayasena, Andreas Peter
2024 J jnl
CISELeaks: Information Leakage Assessment of Cryptographic Instruction Set Extension Prototypes.
IACR Cryptol. ePrint Arch.
Aruna Jayasena, Richard Bachmann, Prabhat Mishra
2024 Misc conf
Design for Trust Utilizing Rareness Reduction.
VLSID
Aruna Jayasena, Prabhat Mishra
2024 J jnl
Directed Test Generation for Hardware Validation: A Survey.
ACM Comput. Surv.
Aruna Jayasena, Prabhat Mishra
2024 A conf
EvilCS: An Evaluation of Information Leakage through Context Switching on Security Enclaves.
DATE
Aruna Jayasena, Richard Bachmann, Prabhat Mishra
2024 J jnl
HIVE: Scalable Hardware-Firmware Co-Verification Using Scenario-Based Decomposition and Automated Hint Extraction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Aruna Jayasena, Prabhat Mishra
2024 J jnl
Incremental Concolic Testing of Register-Transfer Level Designs.
ACM Trans. Design Autom. Electr. Syst.
Hasini Witharana, Aruna Jayasena, Prabhat Mishra
2024 J jnl
Information Leakage through Physical Layer Supply Voltage Coupling Vulnerability.
CoRR
Sahan Sanjaya, Aruna Jayasena, Prabhat Mishra
2023 J jnl
Automated Generation of Security Assertions for RTL Models.
ACM J. Emerg. Technol. Comput. Syst.
Hasini Witharana, Aruna Jayasena, Andrew Whigham, Prabhat Mishra
2023 J jnl
DETER: Design for Trust utilizing Rareness Reduction.
CoRR
Aruna Jayasena, Prabhat Mishra
2023 J jnl
HIVE: Scalable Hardware-Firmware Co-Verification using Scenario-based Decomposition and Automated Hint Extraction.
CoRR
Aruna Jayasena, Prabhat Mishra
2023 J jnl
Logic Locking based Trojans: A Friend Turns Foe.
CoRR
Yuntao Liu, Aruna Jayasena, Prabhat Mishra, Ankur Srivastava
2023 J jnl
Scalable Detection of Hardware Trojans Using ATPG-Based Activation of Rare Events.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Aruna Jayasena, Prabhat Mishra
2023 J jnl
Sequence-Based Incremental Concolic Testing of RTL Models.
CoRR
Hasini Witharana, Aruna Jayasena, Prabhat Mishra
2023 J jnl
TVLA*: Test Vector Leakage Assessment on Hardware Implementations of Asymmetric Cryptography Algorithms.
IEEE Trans. Very Large Scale Integr. Syst.
Aruna Jayasena, Emma Andrews, Prabhat Mishra
2022 C conf
Efficient Finite State Machine Encoding for Defending Against Laser Fault Injection Attacks.
ICCD
Aruna Jayasena, Khushboo Rani, Prabhat Mishra
2022 J jnl
Network-on-Chip Trust Validation Using Security Assertions.
J. Hardw. Syst. Secur.
Aruna Jayasena, Binod Kumar, Subodha Charles, Hasini Witharana, Prabhat Mishra