Arun Subramaniyan

26 papers A* 8A 1B 2Misc 1Journal 9Unranked 3

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	GenDP: A Framework of Dynamic Programming Acceleration for Genome Sequencing Analysis. Commun. ACM Yufeng Gu, Arun Subramaniyan, Timothy Dunn, Alireza Khadem, Kuan-Yu Chen, Somnath Paul, Mohammad Vasimuddin, Sanchit Misra, David T. Blaauw, Satish Narayanasamy, Reetuparna Das
2023	J	`jnl`	Eidetic: An In-Memory Matrix Multiplication Accelerator for Neural Networks. IEEE Trans. Computers Charles Eckert, Arun Subramaniyan, Xiaowei Wang, Charles Augustine, Ravishankar Iyer, Reetuparna Das
2023	A*	`conf`	GenDP: A Framework of Dynamic Programming Acceleration for Genome Sequencing Analysis. ISCA Yufeng Gu, Arun Subramaniyan, Timothy Dunn, Alireza Khadem, Kuan-Yu Chen, Somnath Paul, Md. Vasimuddin, Sanchit Misra, David T. Blaauw, Satish Narayanasamy, Reetuparna Das
2021	J	`jnl`	A 2.46M Reads/s Seed-Extension Accelerator for Next-Generation Sequencing Using a String-Independent PE Array. IEEE J. Solid State Circuits Zhehong Wang, Tianjun Zhang, Daichi Fujiki, Arun Subramaniyan, Xiao Wu, Makoto Yasuda, Satoru Miyoshi, Masaru Kawaminami, Reetuparna Das, Satish Narayanasamy, David T. Blaauw
2021	A*	`conf`	Accelerated Seeding for Genome Sequence Alignment with Enumerated Radix Trees. ISCA Arun Subramaniyan, Jack Wadden, Kush Goliya, Nathan Ozog, Xiao Wu, Satish Narayanasamy, David T. Blaauw, Reetuparna Das
2021	—	`—`	Accelerated Systems for Pattern Matching. Arun Subramaniyan
2021	B	`conf`	GenomicsBench: A Benchmark Suite for Genomics. ISPASS Arun Subramaniyan, Yufeng Gu, Timothy Dunn, Somnath Paul, Md. Vasimuddin, Sanchit Misra, David T. Blaauw, Satish Narayanasamy, Reetuparna Das
2021	—	`book`	In-/Near-Memory Computing Daichi Fujiki, Xiaowei Wang, Arun Subramaniyan, Reetuparna Das
2020	—	`conf`	17.3 GCUPS Pruning-Based Pair-Hidden-Markov-Model Accelerator for Next-Generation DNA Sequencing. VLSI Circuits Xiao Wu, Arun Subramaniyan, Zhehong Wang, Satish Narayanasamy, Reetu Das, David T. Blaauw
2020	—	`conf`	A 2.46M reads/s Genome Sequencing Accelerator using a 625 Processing-Element Array. CICC Zhehong Wang, Tianjun Zhang, Daichi Fujiki, Arun Subramaniyan, Xiao Wu, Makoto Yasuda, Satoru Miyoshi, Masaru Kawaminami, Reetuparna Das, Satish Narayanasamy, David T. Blaauw
2020	J	`jnl`	A 28-nm Compute SRAM With Bit-Serial Logic/Arithmetic Operations for Programmable In-Memory Vector Computing. IEEE J. Solid State Circuits Jingcheng Wang, Xiaowei Wang, Charles Eckert, Arun Subramaniyan, Reetuparna Das, David T. Blaauw, Dennis Sylvester
2019	—	`conf`	A Compute SRAM with Bit-Serial Integer/Floating-Point Operations for Programmable In-Memory Vector Acceleration. ISSCC Jingcheng Wang, Xiaowei Wang, Charles Eckert, Arun Subramaniyan, Reetuparna Das, David T. Blaauw, Dennis Sylvester
2019	J	`jnl`	Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks. IEEE Micro Charles Eckert, Xiaowei Wang, Jingcheng Wang, Arun Subramaniyan, Dennis Sylvester, David T. Blaauw, Reetuparna Das, Ravi R. Iyer
2018	A*	`conf`	ASPEN: A Scalable In-SRAM Architecture for Pushdown Automata. MICRO Kevin Angstadt, Arun Subramaniyan, Elaheh Sadredini, Reza Rahimi, Kevin Skadron, Westley Weimer, Reetuparna Das
2018	A*	`conf`	GenAx: A Genome Sequencing Accelerator. ISCA Daichi Fujiki, Arun Subramaniyan, Tianjun Zhang, Yu Zeng, Reetuparna Das, David T. Blaauw, Satish Narayanasamy
2018	A*	`conf`	Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks. ISCA Charles Eckert, Xiaowei Wang, Jingcheng Wang, Arun Subramaniyan, Ravi R. Iyer, Dennis Sylvester, David T. Blaauw, Reetuparna Das
2018	J	`jnl`	Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks. CoRR Charles Eckert, Xiaowei Wang, Jingcheng Wang, Arun Subramaniyan, Ravi R. Iyer, Dennis Sylvester, David T. Blaauw, Reetuparna Das
2017	J	`jnl`	Application-Guided Power-Efficient Fault Tolerance for H.264 Context Adaptive Variable Length Coding. IEEE Trans. Computers Muhammad Shafique, Semeen Rehman, Florian Kriebel, Muhammad Usman Karim Khan, Bruno Zatt, Arun Subramaniyan, Bruno Boessio Vizzotto, Jörg Henkel
2017	B	`conf`	Cache Automaton: Repurposing Caches for Automata Processing. PACT Arun Subramaniyan, Jingcheng Wang, Ezhil R. M. Balasubramanian, David T. Blaauw, Dennis Sylvester, Reetuparna Das
2017	A*	`conf`	Cache automaton. MICRO Arun Subramaniyan, Jingcheng Wang, Ezhil R. M. Balasubramanian, David T. Blaauw, Dennis Sylvester, Reetuparna Das
2017	A*	`conf`	Compute Caches. HPCA Shaizeen Aga, Supreet Jeloka, Arun Subramaniyan, Satish Narayanasamy, David T. Blaauw, Reetuparna Das
2017	A*	`conf`	Parallel Automata Processor. ISCA Arun Subramaniyan, Reetuparna Das
2017	A	`conf`	Soft error-aware architectural exploration for designing reliability adaptive cache hierarchies in multi-cores. DATE Arun Subramaniyan, Semeen Rehman, Muhammad Shafique, Akash Kumar, Jörg Henkel
2016	J	`jnl`	Reliability-Aware Adaptations for Shared Last-Level Caches in Multi-Cores. ACM Trans. Embed. Comput. Syst. Florian Kriebel, Semeen Rehman, Arun Subramaniyan, Segnon Jean Bruno Ahandagbe, Muhammad Shafique, Jörg Henkel
2015	J	`jnl`	An adaptive migration-replication scheme (AMR) for shared cache in chip multiprocessors. J. Supercomput. Nitin Chaturvedi, Arun Subramaniyan, S. Gurunarayanan
2015	Misc	`conf`	R CODES+ISSS Florian Kriebel, Arun Subramaniyan, Semeen Rehman, Segnon Jean Bruno Ahandagbe, Muhammad Shafique, Jörg Henkel