Arthur Perais

28 papers A* 14A 2B 1C 1Journal 8Unranked 1
YearRankTypeTitle / Venue / Authors
2026 A conf
Compiler-Assisted Instruction Fusion.
CGO
Ravikiran Ravindranath Reddy, Sawan Singh, Arthur Perais, Alberto Ros, Alexandra Jimborean
2026 J jnl
The Non-Predictability of Mispredicted Branches using Timing Information.
CoRR
Ioannis Constantinou, Arthur Perais, Yiannakis Sazeides
2025 J jnl
Address/Data Instruction Steering in Clustered General Purpose Processors.
ACM Trans. Archit. Code Optim.
Chandana S. Deshpande, Arthur Perais, Frédéric Pétrot
2025 A* conf
Architecting Value Prediction around In-Order Execution.
HPCA
Pierre Ravenel, Arthur Perais, Benoît Dupont de Dinechin, Frédéric Pétrot
2024 A* conf
Alternate Path μ-op Cache Prefetching.
ISCA
Sawan Singh, Arthur Perais, Alexandra Jimborean, Alberto Ros
2023 A* conf
Branch Target Buffer Organizations.
MICRO
Arthur Perais, Rami Sheikh
2023 — conf
Rebasing Microarchitectural Research with Industry Traces.
IISWC
Josué Feliu, Arthur Perais, Daniel A. Jiménez, Alberto Ros
2023 J jnl
Toward Practical 128-Bit General Purpose Microarchitectures.
IEEE Comput. Archit. Lett.
Chandana S. Deshpande, Arthur Perais, Frédéric Pétrot
2022 A* conf
Exploring Instruction Fusion Opportunities in General Purpose Processors.
MICRO
Sawan Singh, Arthur Perais, Alexandra Jimborean, Alberto Ros
2022 A* conf
Free atomics: hardware atomic operations without fences.
ISCA
Ashkan Asgharzadeh, Juan M. Cebrian, Arthur Perais, Stefanos Kaxiras, Alberto Ros
2021 J jnl
A Case for Speculative Strength Reduction.
IEEE Comput. Archit. Lett.
Arthur Perais
2021 A* conf
Leveraging Targeted Value Prediction to Unlock New Hardware Strength Reduction Potential.
MICRO
Arthur Perais
2020 A conf
Take A Way: Exploring the Security Implications of AMD's Cache Way Predictors.
AsiaCCS
Moritz Lipp, Vedad Hadzic, Michael Schwarz, Arthur Perais, Clémentine Maurice, Daniel Gruss
2019 A* conf
Elastic Instruction Fetching.
HPCA
Arthur Perais, Rami Sheikh, Luke Yen, Michael McIlvaine, Robert D. Clancy
2018 B conf
Cost effective speculation with the omnipredictor.
PACT
Arthur Perais, André Seznec
2018 C conf
SPF: Selective Pipeline Flush.
ICCD
Vignyan Reddy Kothinti Naresh, Rami Sheikh, Arthur Perais, Harold W. Cain
2017 J jnl
On the Interactions Between Value Prediction and Compiler Optimizations in the Context of EOLE.
ACM Trans. Archit. Code Optim.
Fernando A. Endo, Arthur Perais, André Seznec
2017 J jnl
Storage-Free Memory Dependency Prediction.
IEEE Comput. Archit. Lett.
Arthur Perais, André Seznec
2016 A* conf
Cost effective physical register sharing.
HPCA
Arthur Perais, André Seznec
2016 J jnl
EOLE: Combining Static and Dynamic Scheduling Through Value Prediction to Reduce Complexity and Increase Performance.
ACM Trans. Comput. Syst.
Arthur Perais, André Seznec
2016 A* conf
Register sharing for equality prediction.
MICRO
Arthur Perais, Fernando A. Endo, André Seznec
2015 A* conf
BeBoP: A cost effective predictor infrastructure for superscalar value prediction.
HPCA
Arthur Perais, André Seznec
2015 A* conf
Cost-effective speculative scheduling in high performance processors.
ISCA
Arthur Perais, André Seznec, Pierre Michaud, Andreas Sembrant, Erik Hagersten
2015 J jnl
EOLE: Toward a Practical Implementation of Value Prediction.
IEEE Micro
Arthur Perais, André Seznec
2015 — —
Increasing the performance of superscalar processors through value prediction. (La prédiction de valeurs comme moyen d'augmenter la performance des processeurs superscalaires).
Arthur Perais
2015 A* conf
Long term parking (LTP): criticality-aware resource allocation in OOO processors.
MICRO
Andreas Sembrant, Trevor E. Carlson, Erik Hagersten, David Black-Schaffer, Arthur Perais, André Seznec, Pierre Michaud
2014 A* conf
EOLE: Paving the way for an effective implementation of value prediction.
ISCA
Arthur Perais, André Seznec
2014 A* conf
Practical data value speculation for future high-end processors.
HPCA
Arthur Perais, André Seznec