Arrvindh Shriraman

49 papers A* 17A 8B 10Journal 8Unranked 6

Year	Rank	Type	Title / Venue / Authors
2025	B	`conf`	FLASH: An Abstract Machine for Modelling Fully Homomorphic Encryption Accelerators. PACT Alireza Tabatabaeian, Arrvindh Shriraman
2025	—	`conf`	RANGE-BLOCKS: A Synchronization Facility for Domain-Specific Architectures. ASPLOS (1) Anagha Molakalmur Anil Kumar, Aditya Prasanna, Arrvindh Shriraman
2024	—	`conf`	METAL: Caching Multi-level Indexes in Domain-Specific Architectures. ASPLOS (2) Anagha Molakalmur Anil Kumar, Aditya Prasanna, Jonathan Balkind, Arrvindh Shriraman
2024	A	`conf`	TapeFlow: Streaming Gradient Tapes in Automatic Differentiation. CGO Milad Hakimi, Arrvindh Shriraman
2022	J	`jnl`	OptimizedDP: An Efficient, User-friendly Library For Optimal Control and Dynamic Programming. CoRR Minh Bui, George Giovanis, Mo Chen, Arrvindh Shriraman
2022	A*	`conf`	X-cache: a modular architecture for domain-specific caches. ISCA Ali Sedaghati, Milad Hakimi, Reza Hojabr, Arrvindh Shriraman
2022	B	`conf`	mu-grind: A Framework for Dynamically Instrumenting HLS-Generated RTL. PACT Parmida Vahdatniya, Amirali Sharifian, Reza Hojabr, Arrvindh Shriraman
2021	A	`conf`	Real-Time Hamilton-Jacobi Reachability Analysis of Autonomous System With An FPGA. IROS Minh Bui, Michael Lu, Reza Hojabr, Mo Chen, Arrvindh Shriraman
2021	A*	`conf`	SPAGHETTI: Streaming Accelerators for Highly Sparse GEMM on FPGAs. HPCA Reza Hojabr, Ali Sedaghati, Amirali Sharifian, Ahmad Khonsari, Arrvindh Shriraman
2021	B	`conf`	X-Layer: Building Composable Pipelined Dataflows for Low-Rank Convolutions. PACT Naveen Vedula, Reza Hojabr, Ahmad Khonsari, Arrvindh Shriraman
2020	J	`jnl`	Real-Time Formal Verification of Autonomous Systems With An FPGA. CoRR Minh Bui, Michael Lu, Reza Hojabr, Mo Chen, Arrvindh Shriraman
2020	—	`conf`	Safety-Guaranteed Real-Time Trajectory Planning for Underwater Vehicles in Plane-Progressive Waves. CDC Seth Siriya, Minh Bui, Arrvindh Shriraman, Mo Chen, Ye Pu
2019	B	`conf`	Deepframe: A Profile-Driven Compiler for Spatial Hardware Accelerators. PACT Apala Guha, Naveen Vedula, Arrvindh Shriraman
2019	A*	`conf`	μIR -An intermediate representation for transforming and optimizing the microarchitecture of application accelerators. MICRO Amirali Sharifian, Reza Hojabr, Navid Rahimi, Sihao Liu, Apala Guha, Tony Nowatzki, Arrvindh Shriraman
2018	A*	`conf`	NACHOS: Software-Driven Hardware-Assisted Memory Disambiguation for Accelerators. HPCA Naveen Vedula, Arrvindh Shriraman, Snehasish Kumar, William N. Sumner
2018	A	`conf`	Scalable distributed visual computing for line-rate video streams. MMSys Chen Song, Jiacheng Chen, Ryan Shea, Andy Sun, Arrvindh Shriraman, Jiangchuan Liu
2018	A*	`conf`	TAPAS: Generating Parallel Accelerators from Parallel Programs. MICRO Steve Margerm, Amirali Sharifian, Apala Guha, Arrvindh Shriraman, Gilles Pokam
2017	A*	`conf`	Needle: Leveraging Program Analysis to Analyze and Extract Accelerators from Whole Programs. HPCA Snehasish Kumar, Nick Sumner, Vijayalakshmi Srinivasan, Steve Margerm, Arrvindh Shriraman
2016	A*	`conf`	Chainsaw: Von-neumann accelerators to leverage fused instruction chains. MICRO Amirali Sharifian, Snehasish Kumar, Apala Guha, Arrvindh Shriraman
2016	—	`conf`	How to Speed Up CUDA-WSat-PcL by 5x. CANDAR Heng Liu, Arrvindh Shriraman, Evgenia Ternovska
2016	A	`conf`	Peruse and Profit: Estimating the Accelerability of Loops. ICS Snehasish Kumar, Vijayalakshmi Srinivasan, Amirali Sharifian, Nick Sumner, Arrvindh Shriraman
2016	—	`conf`	SPEC-AX and PARSEC-AX: extracting accelerator benchmarks from microprocessor benchmarks. IISWC Snehasish Kumar, William N. Sumner, Arrvindh Shriraman
2015	A	`conf`	DASX: Hardware Accelerator for Software Data Structures. ICS Snehasish Kumar, Naveen Vedula, Arrvindh Shriraman, Vijayalakshmi Srinivasan
2015	A*	`conf`	Fusion: design tradeoffs in coherent cache hierarchies for accelerators. ISCA Snehasish Kumar, Arrvindh Shriraman, Naveen Vedula
2014	B	`conf`	Bitwise data parallelism in regular expression matching. PACT Robert D. Cameron, Thomas C. Shermer, Arrvindh Shriraman, Kenneth S. Herdy, Dan Lin, Benjamin R. Hull, Meng Lin
2014	J	`jnl`	Cache Coherence for GPU Architectures. IEEE Micro Inderpreet Singh, Arrvindh Shriraman, Wilson W. L. Fung, Mike O'Connor, Tor M. Aamodt
2014	B	`conf`	SQRL: hardware accelerator for collecting software data structures. PACT Snehasish Kumar, Arrvindh Shriraman, Vijayalakshmi Srinivasan, Dan Lin, Jordon Phillips
2013	J	`jnl`	An Application-Tailored Approach to Hardware Cache Coherence. Computer Arrvindh Shriraman, Hongzhou Zhao, Sandhya Dwarkadas
2013	A*	`conf`	Cache coherence for GPU architectures. HPCA Inderpreet Singh, Arrvindh Shriraman, Wilson W. L. Fung, Mike O'Connor, Tor M. Aamodt
2013	A*	`conf`	Power containers: an OS facility for fine-grained power and energy management on multicore servers. ASPLOS Kai Shen, Arrvindh Shriraman, Sandhya Dwarkadas, Xiao Zhang, Zhuan Chen
2013	A*	`conf`	Protozoa: adaptive granularity cache coherence. ISCA Hongzhou Zhao, Arrvindh Shriraman, Snehasish Kumar, Sandhya Dwarkadas
2013	A	`conf`	Verifying safety and liveness for the FlexTM hybrid transactional memory. DATE Parosh Aziz Abdulla, Sandhya Dwarkadas, Ahmed Rezine, Arrvindh Shriraman, Yunyun Zhu
2012	A*	`conf`	Amoeba-Cache: Adaptive Blocks for Eliminating Waste in the Memory Hierarchy. MICRO Snehasish Kumar, Hongzhou Zhao, Arrvindh Shriraman, Eric Matthews, Sandhya Dwarkadas, Lesley Shannon
2012	A*	`conf`	Parabix: Boosting the efficiency of text processing on commodity processors. HPCA Dan Lin, Nigel Medforth, Kenneth S. Herdy, Arrvindh Shriraman, Robert D. Cameron
2012	A*	`conf`	Power and energy containers for multicore servers. SIGMETRICS Kai Shen, Arrvindh Shriraman, Sandhya Dwarkadas, Xiao Zhang
2011	J	`jnl`	Analyzing Conflicts in Hardware-Supported Memory Transactions. Int. J. Parallel Program. Arrvindh Shriraman, Sandhya Dwarkadas
2011	B	`conf`	SPATL: Honey, I Shrunk the Coherence Directory. PACT Hongzhou Zhao, Arrvindh Shriraman, Sandhya Dwarkadas, Vijayalakshmi Srinivasan
2010	J	`jnl`	Implementation tradeoffs in the design of flexible transactional memory support. J. Parallel Distributed Comput. Arrvindh Shriraman, Sandhya Dwarkadas, Michael L. Scott
2010	B	`conf`	SPACE: sharing pattern-based directory coherence for multicore scalability. PACT Hongzhou Zhao, Arrvindh Shriraman, Sandhya Dwarkadas
2010	A*	`conf`	Sentry: light-weight auxiliary memory access control. ISCA Arrvindh Shriraman, Sandhya Dwarkadas
2009	A	`conf`	Refereeing conflicts in hardware transactional memory. ICS Arrvindh Shriraman, Sandhya Dwarkadas
2009	J	`jnl`	Tapping into Parallelism with Transactional Memory. login Usenix Mag. Arrvindh Shriraman, Sandhya Dwarkadas, Michael L. Scott
2008	A*	`conf`	Flexible Decoupled Transactional Memory Support. ISCA Arrvindh Shriraman, Sandhya Dwarkadas, Michael L. Scott
2007	B	`conf`	Alert-on-update: a communication aid for shared memory multiprocessors. PPoPP Michael F. Spear, Arrvindh Shriraman, Hemayet Hossain, Sandhya Dwarkadas, Michael L. Scott
2007	A*	`conf`	An integrated hardware-software approach to flexible transactional memory. ISCA Arrvindh Shriraman, Michael F. Spear, Hemayet Hossain, Virendra J. Marathe, Sandhya Dwarkadas, Michael L. Scott
2007	B	`conf`	Nonblocking transactions without indirection using alert-on-update. SPAA Michael F. Spear, Arrvindh Shriraman, Luke Dalessandro, Sandhya Dwarkadas, Michael L. Scott
2006	—	`conf`	PASCOM: Power Model for Supercomputers. ARCS Arrvindh Shriraman, Nagarajan Venkateswaran, Niranjan Soundararajan
2005	A	`conf`	Memory In Processor-Supercomputer On a Chip: Processor Design and Execution Semantics for Massive Single-Chip Performance. IPDPS Nagarajan Venkateswaran, Arrvindh Shriraman, Niranjan Soundararajan
2004	J	`jnl`	Memory in processor: a novel design paradigm for supercomputing architectures. SIGARCH Comput. Archit. News Nagarajan Venkateswaran, Aditya Krishnan, S. Niranjan Kumar, Arrvindh Shriraman, Srinivas Sridharan