Arnaud Tisserand

71 papers A 2B 4C 13Misc 3Journal 24Unranked 23

Year	Rank	Type	Title / Venue / Authors
2023	—	`conf`	A RISC-V Instruction Set Extension for Flexible Hardware/Software Protection of Cryptosystems Masked at High Orders. MWSCAS Fabrice Lozachmeur, Arnaud Tisserand
2023	C	`conf`	Using Hierarchical Approach to Speed-up RNS Base Extensions in Homomorphic Encryption Context. ARITH Morgane Vollmer, Karim Bigou, Arnaud Tisserand
2022	J	`jnl`	Lattice-Based Cryptosystems on FPGA: Parallelization and Comparison Using HLS. IEEE Trans. Computers Timo Zijlstra, Karim Bigou, Arnaud Tisserand
2022	C	`conf`	Processor Extensions for Hardware Instruction Replay against Fault Injection Attacks. DDECS Noura Ait Manssour, Vianney Lapôtre, Guy Gogniat, Arnaud Tisserand
2019	—	`conf`	Evaluation of variable bit-width units in a RISC-V processor for approximate computing. CF Geneviève Ndour, Tiago Trevisan Jost, Anca Molnos, Yves Durand, Arnaud Tisserand
2019	Misc	`conf`	FPGA Implementation and Comparison of Protections Against SCAs for RLWE. INDOCRYPT Timo Zijlstra, Karim Bigou, Arnaud Tisserand
2019	J	`jnl`	Generation of Finely-Pipelined GF( IEEE Trans. Computers Gabriel Gallin, Arnaud Tisserand
2019	C	`conf`	Hierarchical Approach in RNS Base Extension for Asymmetric Cryptography. ARITH Libey Djath, Karim Bigou, Arnaud Tisserand
2018	J	`jnl`	Computation of 2D 8×8 DCT Based on the Loeffler Factorization Using Algebraic Integer Encoding. IEEE Trans. Computers Diego F. G. Coelho, Sushmabhargavi Nimmalapalli, Vassil S. Dimitrov, Arjuna Madanayake, Renato J. Cintra, Arnaud Tisserand
2018	—	`conf`	Evaluation of approximate operators case study: sobel filter application executed on an approximate RISC-V platform. SAMOS Geneviève Ndour, Tiago Trevisan Jost, Anca Molnos, Yves Durand, Arnaud Tisserand
2018	J	`jnl`	Hardware/Software Co-Design of an Accelerator for FV Homomorphic Encryption Scheme Using Karatsuba Algorithm. IEEE Trans. Computers Vincent Migliore, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat
2018	—	`conf`	Microcontroller Implementation of Simultaneous Protections Against Observation and Perturbation Attacks for ECC. ICETE (2) Audrey Lucas, Arnaud Tisserand
2017	J	`jnl`	A High-Speed Accelerator for Homomorphic Encryption using the Karatsuba Algorithm. ACM Trans. Embed. Comput. Syst. Vincent Migliore, Cédric Seguin, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat, Russell Tessier
2017	—	`conf`	An efficient framework for design and assessment of arithmetic operators with Reduced-Precision Redundancy. DASIP Imran Wali, Emmanuel Casseau, Arnaud Tisserand
2017	Misc	`conf`	Architecture Level Optimizations for Kummer Based HECC on FPGAs. INDOCRYPT Gabriel Gallin, Türkü Özlüm Çelik, Arnaud Tisserand
2017	J	`jnl`	Architecture level Optimizations for Kummer based HECC on FPGAs. IACR Cryptol. ePrint Arch. Gabriel Gallin, Türkü Özlüm Çelik, Arnaud Tisserand
2017	Misc	`conf`	Hyper-threaded multiplier for HECC. ACSSC Gabriel Gallin, Arnaud Tisserand
2017	J	`jnl`	Introduction to the Special Issue on Computer Arithmetic. IEEE Trans. Computers Javier Hormigo, Jean-Michel Muller, Stuart F. Oberman, Nathalie Revol, Arnaud Tisserand, Julio Villalba-Moreno
2016	J	`jnl`	Binary-Ternary Plus-Minus Modular Inversion in RNS. IEEE Trans. Computers Karim Bigou, Arnaud Tisserand
2016	—	`conf`	Fast polynomial arithmetic for Somewhat Homomorphic Encryption operations in hardware with Karatsuba algorithm. FPT Vincent Migliore, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat
2016	C	`conf`	Hybrid Position-Residues Number System. ARITH Karim Bigou, Arnaud Tisserand
2015	—	`conf`	Asynchronous Charge Sharing Power Consistent Montgomery Multiplier. ASYNC Jiaoyan Chen, Arnaud Tisserand, Emanuel M. Popovici, Sorin Cotofana
2015	—	`conf`	Exploration of polynomial multiplication algorithms for homomorphic encryption schemes. ReConFig Vincent Migliore, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat
2015	C	`conf`	Fast and Secure Finite Field Multipliers. DSD Danuta Pamula, Arnaud Tisserand
2015	J	`jnl`	Improving Modular Inversion in RNS using the Plus-Minus Method. IACR Cryptol. ePrint Arch. Karim Bigou, Arnaud Tisserand
2015	A	`conf`	Single Base Modular Multiplication for Efficient Hardware RNS Implementations of ECC. CHES Karim Bigou, Arnaud Tisserand
2015	—	`conf`	Small FPGA Based Multiplication-Inversion Unit for Normal Basis Representation in GF(2m). ISVLSI Jérémy Métairie, Arnaud Tisserand, Emmanuel Casseau
2015	J	`jnl`	Towards FHE in Embedded Systems: A Preliminary Codesign Space Exploration of a HW/SW Very Large Multiplier. IEEE Embed. Syst. Lett. Ghada Y. Abozaid, Arnaud Tisserand, Ahmed El-Mahdy, Yasutaka Wada
2014	—	`conf`	RNS modular multiplication through reduced base extensions. ASAP Karim Bigou, Arnaud Tisserand
2014	—	`conf`	Robust sub-powered asynchronous logic. PATMOS Jiaoyan Chen, Arnaud Tisserand, Emanuel M. Popovici, Sorin Cotofana
2013	A	`conf`	Improving Modular Inversion in RNS Using the Plus-Minus Method. CHES Karim Bigou, Arnaud Tisserand
2013	J	`jnl`	Introduction. Tech. Sci. Informatiques Loïc Lagadec, Sébastien Pillement, Arnaud Tisserand
2013	C	`conf`	On-the-Fly Multi-base Recoding for ECC Scalar Multiplication without Pre-computations. IEEE Symposium on Computer Arithmetic Thomas Chabrier, Arnaud Tisserand
2012	C	`conf`	$\textrm{GF}(2^m)$ Finite-Field Multipliers with Reduced Activity Variations. WAIFI Danuta Pamula, Arnaud Tisserand
2012	—	`conf`	Analysis of GF (2233) multipliers regarding elliptic curve cryptosystem applications. PDeS Danuta Pamula, Edward Hrynkiewicz, Arnaud Tisserand
2011	B	`conf`	A Comparison on FPGA of Modular Multipliers Suitable for Elliptic Curve Cryptography over GF(p) for Specific p Values. FPL Mark Hamilton, William P. Marnane, Arnaud Tisserand
2010	—	`conf`	Multiplication in GF(2m): Area and time dependency/efficiency/complexity analysis. PDeS Danuta Pamula, Edward Hrynkiewicz, Arnaud Tisserand
2010	—	`book`	Étude et conception d'opérateurs arithmétiques. (Study and design of arithmetic operators). Arnaud Tisserand
2009	—	`conf`	Comparison of Modular Arithmetic Algorithms on GPUs. PARCO Pascal Giorgi, Thomas Izard, Arnaud Tisserand
2009	—	`conf`	Power Consumption of GPUs from a Software Perspective. ICCS (1) Caroline Collange, David Defour, Arnaud Tisserand
2008	C	`conf`	Error Detection for Borrow-Save Adders Dedicated to ECC Unit. FDTC Julien Francq, Jean-Baptiste Rigaud, Pascal Manet, Assia Tria, Arnaud Tisserand
2008	—	`conf`	Fast and accurate activity evaluation in multipliers. ACSCC Arnaud Tisserand
2008	J	`jnl`	Optimisation d'opérateurs arithmétiques matériels à base d'approximations polynomiales. Tech. Sci. Informatiques Romain Michard, Arnaud Tisserand, Nicolas Veyrat-Charvillon
2007	J	`jnl`	Chronique : Introduction aux représentations des nombres et opérateurs arithmétiques à basse consommation d'énergie. Tech. Sci. Informatiques Arnaud Tisserand
2007	J	`jnl`	Comparison of Simple Power Analysis Attack Resistant Algorithms for an Elliptic Curve Cryptosystem. J. Comput. Andrew Byrne, Nicolas Méloni, Arnaud Tisserand, Emanuel M. Popovici, William P. Marnane
2007	J	`jnl`	High-performance hardware operators for polynomial evaluation. Int. J. High Perform. Syst. Archit. Arnaud Tisserand
2007	J	`jnl`	Multi-mode operator for SHA-2 hash functions. J. Syst. Archit. Ryan Glabb, Laurent Imbert, Graham A. Jullien, Arnaud Tisserand, Nicolas Veyrat-Charvillon
2007	—	`conf`	SPA resistant Elliptic Curve Cryptosystem using Addition Chains. ITNG Andrew Byrne, Nicolas Méloni, Francis M. Crowe, William P. Marnane, Arnaud Tisserand, Emanuel M. Popovici
2007	J	`jnl`	SPA resistant elliptic curve cryptosystem using addition chains. Int. J. High Perform. Syst. Archit. Andrew Byrne, Francis M. Crowe, William P. Marnane, Nicolas Méloni, Arnaud Tisserand, Emanuel M. Popovici
2006	—	`conf`	Carry Prediction and Selection for Truncated Multiplication. SiPS Romain Michard, Arnaud Tisserand, Nicolas Veyrat-Charvillon
2006	J	`jnl`	Computing machine-efficient polynomial approximations. ACM Trans. Math. Softw. Nicolas Brisebarre, Jean-Michel Muller, Arnaud Tisserand
2006	—	`conf`	Hardware Operator for Simultaneous Sine and Cosine Evaluation. ICASSP (3) Arnaud Tisserand
2006	—	`conf`	Multi-Mode Operator for SHA-2 Hash Functions. ERSA Ryan Glabb, Laurent Imbert, Graham A. Jullien, Arnaud Tisserand, Nicolas Veyrat-Charvillon
2006	—	`conf`	Towards the System-on-Chip Realization of a Sensorless Vector Controller with Microsecond-order Computation Time. CCECE Rachid Beguenane, Jean-Gabriel Mailloux, Stéphane Simard, Arnaud Tisserand
2005	C	`conf`	Division by Constant for the ST100 DSP Microprocessor. IEEE Symposium on Computer Arithmetic Jean-Michel Muller, Arnaud Tisserand, Benoît Dupont de Dinechin, Christophe Monat
2005	J	`jnl`	Multipartite Table Methods. IEEE Trans. Computers Florent de Dinechin, Arnaud Tisserand
2005	—	`conf`	Small FPGA polynomial approximations with 3-bit coefficients and low-precision estimations of the powers of x. ASAP Romain Michard, Arnaud Tisserand, Nicolas Veyrat-Charvillon
2005	J	`jnl`	Some Optimizations of Hardware Multiplication by Constant Matrices. IEEE Trans. Computers Nicolas Boullis, Arnaud Tisserand
2004	J	`jnl`	Évaluation polynomiale en-ligne de fonctions élémentaires sur FPGA. Tech. Sci. Informatiques Jean-Luc Beuchat, Arnaud Tisserand
2003	C	`conf`	Some Optimizations of Hardware Multiplication by Constant Matrices. IEEE Symposium on Computer Arithmetic Nicolas Boullis, Arnaud Tisserand
2002	B	`conf`	Small Multiplier-Based Multiplication and Division Operators for Virtex-II Devices. FPL Jean-Luc Beuchat, Arnaud Tisserand
2001	C	`conf`	Some Improvements on Multipartite Table Methods . IEEE Symposium on Computer Arithmetic Florent de Dinechin, Arnaud Tisserand
2000	J	`jnl`	Reciprocation, Square Root, Inverse Square Root, and Some Elementary Functions Using Small Multipliers. IEEE Trans. Computers Milos D. Ercegovac, Tomás Lang, Jean-Michel Muller, Arnaud Tisserand
1999	B	`conf`	An On-Line Arithmetic Based FPGA for Low-Power Custom Computing. FPL Arnaud Tisserand, Pierre Marchal, Christian Piguet
1998	—	`conf`	Field Programmable Processor Arrays. ICES Pascal Nussbaum, Bernard Girau, Arnaud Tisserand
1998	J	`jnl`	Semi-Logarithmic Number Systems. IEEE Trans. Computers Jean-Michel Muller, Alexandre Scherbyna, Arnaud Tisserand
1998	J	`jnl`	Toward Correctly Rounded Transcendentals. IEEE Trans. Computers Vincent Lefèvre, Jean-Michel Muller, Arnaud Tisserand
1997	—	`—`	Adéquation arithmétique architecture, problèmes et étude de cas. (Arithmetic architecture adequacy, problems and case study). Arnaud Tisserand
1997	B	`conf`	FPGA implementation of real-time digital controllers using on-line arithmetic. FPL Arnaud Tisserand, Martin Dimmler
1997	C	`conf`	Towards Correctly Rounded Transcendentals. IEEE Symposium on Computer Arithmetic Vincent Lefèvre, Arnaud Tisserand, Jean-Michel Muller
1995	C	`conf`	Semi-Logarithmic Number Systems. IEEE Symposium on Computer Arithmetic Jean-Michel Muller, Arnaud Tisserand, Alexandre Scherbyna