Arnaldo Azevedo

25 papers A 1B 2C 8Journal 7Unranked 6
YearRankTypeTitle / Venue / Authors
2013 J jnl
A reduced memory bandwidth and high throughput HDTV motion compensation decoder for H.264/AVC High 4: 2: 2 profile.
J. Real Time Image Process.
Bruno Zatt, Leandro M. de L. Silva, Arnaldo Azevedo, Luciano Volcan Agostini, Altamiro Amadeu Susin, Sergio Bampi
2013 J jnl
Virtual execution platforms for mixed-time-criticality systems: the CompSOC architecture and design flow.
SIGBED Rev.
Kees Goossens, Arnaldo Azevedo, Karthik Chandrasekar, Manil Dev Gomony, Sven Goossens, Martijn Koedam, Yonghui Li, Davit Mirzoyan, Anca Mariana Molnos, Ashkan Beyranvand Nejad, Andrew Nelson, Shubhendu Sinha
2012 C conf
Architecture and design flow for a debug event distribution interconnect.
ICCD
Arnaldo Azevedo, Bart Vermeulen, Kees Goossens
2012 — book
Scalable Parallel Programming Applied to H.264/AVC Decoding.
Ben H. H. Juurlink, Mauricio Alvarez-Mesa, Chi Ching Chi, Arnaldo Azevedo, Cor Meenderinck, Alex Ramírez
2011 J jnl
A Highly Scalable Parallel Implementation of H.264.
Trans. High Perform. Embed. Archit. Compil.
Arnaldo Azevedo, Ben H. H. Juurlink, Cor Meenderinck, Andrei Sergeevich Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez, Mateo Valero
2011 — conf
An Instruction to Accelerate Software Caches.
ARCS
Arnaldo Azevedo, Ben H. H. Juurlink
2010 J jnl
A Multidimensional Software Cache for Scratchpad-Based Systems.
Int. J. Embed. Real Time Commun. Syst.
Arnaldo Azevedo, Ben H. H. Juurlink
2010 J jnl
The SARC Architecture.
IEEE Micro
Alex Ramírez, Felipe Cabarcas, Ben H. H. Juurlink, Mauricio Alvarez-Mesa, Friman Sánchez, Arnaldo Azevedo, Cor Meenderinck, Catalin Bogdan Ciobanu, Sebastián Isaza, Georgi Gaydadjiev
2009 — conf
An efficient software cache for H.264 motion compensation.
SoC
Arnaldo Azevedo, Ben H. H. Juurlink
2009 J jnl
Evaluación del rendimiento paralelo en el nivel macro bloque del decodificador H.264 en una arquitectura multiprocesador cc-NUMA.
Rev. Avances en Sistemas Informática
Mauricio Alvarez, Alex Ramírez, Mateo Valero, Arnaldo Azevedo, Cor Meenderinck
2009 — conf
Parallel H.264 Decoding on an Embedded Multicore Processor.
HiPEAC
Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Andrei Sergeevich Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez
2009 J jnl
Parallel Scalability of Video Decoders.
J. Signal Process. Syst.
Cor Meenderinck, Arnaldo Azevedo, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez
2009 B conf
Scalability of Macroblock-level Parallelism for H.264 Decoding.
ICPADS
Mauricio Alvarez-Mesa, Alex Ramírez, Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mateo Valero
2008 C conf
Analysis of video filtering on the cell processor.
ISCAS
Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez
2008 C conf
Analyzing Scalability of Deblocking Filter of H.264 via TLP Exploitation in a New Many-Core Architecture.
DSD
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic, Arnaldo Azevedo, Ben H. H. Juurlink
2007 C conf
FPGA Prototyping Strategy for a H.264/AVC Video Decoder.
IEEE International Workshop on Rapid System Prototyping
Vagner S. Rosa, Wagston T. Staehler, Arnaldo Azevedo, Bruno Zatt, Roger Endrigo Carvalho Porto, Luciano Volcan Agostini, Sergio Bampi, Altamiro Amadeu Susin
2007 — conf
Memory Hierarchy Targeting Bi-Predictive Motion Compensation for H.264/AVC Decoder.
ISVLSI
Bruno Zatt, Arnaldo Azevedo, Luciano Volcan Agostini, Altamiro Amadeu Susin, Sergio Bampi
2007 C conf
MoCHA: a Bi-Predictive Motion Compensation Hardware for H.264/AVC Decoder Targeting HDTV.
ISCAS
Arnaldo Azevedo, Bruno Zatt, Luciano Volcan Agostini, Sergio Bampi
2006 B conf
FPGA Design of A H.264/AVC Main Profile Decoder for HDTV.
FPL
Luciano Volcan Agostini, Arnaldo Azevedo, Vagner S. Rosa, Eduardo A. Berriel, Tatiana Gadelha Serra dos Santos, Sergio Bampi, Altamiro Amadeu Susin
2006 C conf
Motion Compensation Decoder Architecture for H.264/AVC Main Profile Targeting HDTV.
VLSI-SoC
Arnaldo Azevedo, Bruno Zatt, Luciano Volcan Agostini, Sergio Bampi
2005 C conf
Accelerating a Multiprocessor Reconfigurable Architecture with Pipelined VLIW Units.
IEEE International Workshop on Rapid System Prototyping
Arnaldo Azevedo, Luciano Volcan Agostini, Flávio Rech Wagner, Sergio Bampi
2004 — conf
When reconfigurable architecture meets network-on-chip.
SBCCI
Rodrigo Soares, Ivan Saraiva Silva, Arnaldo Azevedo
2003 — conf
A New Hybrid Parallel/Reconfigurable Architecture: The X4CP32.
SBCCI
Arnaldo Azevedo, Rodrigo Soares, Ivan Saraiva Silva
2003 A conf
X4CP32: A Coarse Grain General Purpose Reconfigurable Microprocessor.
IPDPS
Rodrigo Soares, Arnaldo Azevedo, Ivan Saraiva Silva
2003 C conf
X4CP32: A New Parallel/Reconfigurable General-Purpose Processor.
SBAC-PAD
Rodrigo Soares, Arnaldo Azevedo, Ivan Saraiva Silva