Arijit Dutta

15 papers A 1Misc 2Journal 6Unranked 6
YearRankTypeTitle / Venue / Authors
2024 J jnl
A Comprehensive Review of Recent Developments in VANET for Traffic, Safety & Remote Monitoring Applications.
J. Netw. Syst. Manag.
Arijit Dutta, Luis Miguel Samaniego Campoverde, Mauro Tropea, Floriano De Rango
2023 — conf
A Hybrid Deep Learning Model-Based Intrusion Detection System for Emergency Planning Using IoT-Network.
ICT-DM
Inam Ullah Khan, Muhammad Yaseen Ayub, Asrin Abdollahi, Arijit Dutta
2022 — conf
Automatic generation of the ground truth for tumor budding using H&E stained slides.
Digital and Computational Pathology
Thomas E. Tavolara, Arijit Dutta, Martin V. Burks, Wei Chen, Wendy L. Frankel, Metin N. Gurcan, M. Khalid Khan Niazi
2021 — conf
Assisting fog-cloud computing with an adaptive traffic awareness resource provisioning algorithm for health data.
OCIT
Luina Pani, Arijit Dutta, Chinmaya Misra, Ruben Roy
2021 — conf
Finite Buffer Queueing System Performance Study with Multi Heterogeneous Fog Architecture.
OCIT
Arijit Dutta, Luina Pani, Chinmaya Misra, Ruben Roy
2021 J jnl
MProve+ : Privacy Enhancing Proof of Reserves Protocol for Monero.
IACR Cryptol. ePrint Arch.
Arijit Dutta, Suyash Bagad, Saravanan Vijayakumaran
2021 J jnl
MProve+: Privacy Enhancing Proof of Reserves Protocol for Monero.
IEEE Trans. Inf. Forensics Secur.
Arijit Dutta, Suyash Bagad, Saravanan Vijayakumaran
2019 — conf
MProve: A Proof of Reserves Protocol for Monero Exchanges.
EuroS&P Workshops
Arijit Dutta, Saravanan Vijayakumaran
2019 Misc conf
Nummatus: A Privacy Preserving Proof of Reserves Protocol for Quisquis.
INDOCRYPT
Arijit Dutta, Arnab Jana, Saravanan Vijayakumaran
2019 — conf
Revelio: A MimbleWimble Proof of Reserves Protocol.
CVCBT
Arijit Dutta, Saravanan Vijayakumaran
2019 J jnl
Revelio: A MimbleWimble Proof of Reserves Protocol.
IACR Cryptol. ePrint Arch.
Arijit Dutta, Saravanan Vijayakumaran
2018 J jnl
MProve: A Proof of Assets Protocol for Monero Exchanges.
IACR Cryptol. ePrint Arch.
Arijit Dutta, Saravanan Vijayakumaran
2008 A conf
Penalty for power reduction -: performance or schedule or yield?
ISLPED
Bodhisatya Sarker, Jaswinder Ahuja, Arijit Dutta, Srinath D., Kaip Sridhar, Radhakrishnan Nair, Jayant Lahiri
2001 Misc conf
Effect Of Fringing Capacitances In Sub 100 Nm Mosfet's With High-K Gate Dielectrics.
VLSI Design
Nihar R. Mohapatra, Arijit Dutta, Madhav P. Desai, V. Ramgopal Rao
2001 J jnl
Sub-100 nm CMOS circuit performance with high-K gate dielectrics.
Microelectron. Reliab.
Nihar R. Mohapatra, Arijit Dutta, G. Sridhar, Madhav P. Desai, V. Ramgopal Rao